Abstract: An optical waveguide device includes an active optical waveguide device and a passive optical waveguide device. The active optical waveguide device is formed at least in part on a semiconductor layer and includes an electrode portion. A region of altered effective mode index is created by the active optical waveguide device and controlled by application of an electric voltage to the electrode portion in a manner that alters a free carrier density of the region of altered effective mode index. Changing the electric voltage to the electrode portion changes the effective mode index in the region of altered effective mode index. The passive optical waveguide device is formed at least in part from a polysilicon layer deposited on the semiconductor layer. An effective mode index of a region of static effective mode index within the optical waveguide is created by the polysilicon layer of the passive optical waveguide device.

Abstract: A low loss coupling arrangement between a slab/strip waveguide and a rib waveguide in an optical waveguiding structure formed on a silicon-on-insulator (SOI) platform utilizes tapered sections at the input and/or output of the rib waveguide to reduce loss. Optical reflections are reduced by using silicon tapers (either vertical tapers, horizontal tapers, or two-dimensional tapers) that gradually transition the effective index seen by an optical signal propagating along the slab/strip waveguide and subsequently into and out of the rib waveguide. Loss can be further reduced by using adiabatically contoured silicon regions at the input and output of the rib waveguide to reduce mode mismatch between the slab/strip waveguide and rib waveguide. In a preferred embodiment, concatenated tapered and adiabatic sections can be used to provide for reduced optical reflection loss and reduced optical mode mismatch.

Abstract: A conventional CMOS fabrication technique is used to integrate the formation of passive optical devices and active electro-optic devices with standard CMOS electrical devices on a common SOI structure. The electrical devices and optical devices share the same surface SOI layer (a relatively thin, single crystal silicon layer), with various required semiconductor layers then formed over the SOI layer. In some instances, a set of process steps may be used to simultaneously form regions in both electrical and optical devices. Advantageously, the same metallization process is used to provide electrical connections to the electrical devices and the active electro-optic devices.

Abstract: A method for forming a hybrid active electronic and optical circuit using a lithography mask. The hybrid active electronic and optical circuit comprising an active electronic device and at least one optical device on a Silicon-On-Insulator (SOI) wafer. The SOI wafer including an insulator layer and an upper silicon layer. The upper silicon layer including at least one component of the active electronic device and at least one component of the optical device. The method comprising projecting the lithography mask onto the SOI waver in order to simultaneously pattern the component of the active electronic device and the component of the optical device on the SOI wafer.

Abstract: An apparatus and associated method for controlling the propagation constant of a region of focusing propagation constant in an optical waveguide. The method comprising positioning an electrode of a prescribed electrode shape proximate the waveguide. A region of focusing propagation constant is projected into the waveguides that corresponds, in shape, to the prescribed electrode shape by applying a voltage to the shaped electrode. The propagation constant of the region of focusing propagation constant is controlled by varying the voltage. Light of certain wavelengths passing through the region of focusing propagation constant has a variable focal length.

Abstract: An arrangement for providing optical coupling between a free-space propagating optical signal and an ultrathin silicon waveguide formed in an upper silicon layer of a silicon-on-insulator (SOI) structure includes a silicon nanotaper structure formed in the upper silicon layer (SOI layer) of the SOI structure and coupled to the ultrathin silicon waveguide. A dielectric waveguide coupling layer, with a refractive index greater than the index of the dielectric insulating layer but less than the refractive index of silicon, is disposed so as to overly a portion of the dielectric insulating layer in a region where an associated portion of the SOI layer has been removed. An end portion of the dielectric waveguide coupling layer is disposed to overlap an end section of the silicon nanotaper to form a mode conversion region between the free-space propagating optical signal and the ultrathin silicon waveguide.

Abstract: A method for forming a hybrid active electronic and optical circuit using a lithography mask. The hybrid active electronic and optical circuit comprising an active electronic device and at least one optical device on a Silicon-On-Insulator (SOI) wafer. The SOI wafer including an insulator layer and an upper silicon layer. The upper silicon layer including at least one component of the active electronic device and at least one component of the optical device. The method comprising projecting the lithography mask onto the SOI waver in order to simultaneously pattern the component of the active electronic device and the component of the optical device on the SOI wafer.

Abstract: A practical realization for achieving and maintaining high-efficiency transfer of light from input and output free-space optics to a high-index waveguide of sub-micron thickness is described. The required optical elements and methods of fabricating, aligning, and assembling these elements are discussed. Maintaining high coupling efficiency reliably over realistic ranges of device operating parameters is discussed in the context of the preferred embodiments.

Abstract: An optical coupling system for use with multiple wavelength optical signals provides improved coupling efficiency between a free-space optical beam and a relatively thin, surface layer of an SOI structure (“SOI layer”), allowing for sufficient coupling efficiency (greater than 50%) over a predetermined wavelength range. An evanescent coupling layer, disposed between a coupling prism and an SOI layer, is particularly configured to improve the coupling efficiency. In one embodiment, the thickness of the evanescent layer is reduced below an optimum value for a single wavelength, the reduced thickness improving coupling efficiency over a predetermined wavelength range around a defined center wavelength. Alternatively, a tapered thickness evanescent coupling layer may be used to improve coupling efficiency (or a combination of reduced thickness and tapered configuration).

Abstract: A method for forming a hybrid active electronic and optical circuit using a lithography mask. The hybrid active electronic and optical circuit comprising an active electronic device and at least one optical device on a Silicon-On-Insulator (SOI) wafer. The SOI wafer including an insulator layer and an upper silicon layer. The upper silicon layer including at least one component of the active electronic device and at least one component of the optical device. The method comprising projecting the lithography mask onto the SOT waver in order to simultaneously pattern the component of the active electronic device and the component of the optical device on the SOI wafer.

Abstract: An SOI-based opto-electronic structure includes various electronic components disposed with their associated optical components within a single SOI layer, forming a monolithic arrangement. EMI/EMC shielding is provided by forming a metallized outer layer on the surface of an external prism coupler that interfaces with the SOI layer, the metallized layer including transparent apertures to allow an optical signal to be coupled into and out of the SOI layer. The opposing surface of the prism coupler may also be coated with a metallic material to provide additional shielding. Further, metallic shielding plates may be formed on the SOI structure itself, overlying the locations of EMI-sensitive electronics. All of these metallic layers are ultimately coupled to an external ground plane to isolate the structure and provide the necessary shielding.

Abstract: An optical waveguide device includes an active optical waveguide device and a passive optical waveguide device. The active optical waveguide device is formed at least in part on a semiconductor layer and includes an electrode portion. A region of altered effective mode index is created by the active optical waveguide device and controlled by application of an electric voltage to the electrode portion in a manner that alters a free carrier density of the region of altered effective mode index. Changing the electric voltage to the electrode portion changes the effective mode index in the region of altered effective mode index. The passive optical waveguide device is formed at least in part from a polysilicon layer deposited on the semiconductor layer. An effective mode index of a region of static effective mode index within the optical waveguide is created by the polysilicon layer of the passive optical waveguide device.

Abstract: A photodetector for use with relatively thin (i.e., sub-micron) silicon optical waveguides formed in a silicon-on-insulator (SOI) structure comprises a layer of poly-germanium disposed to couple at least a portion of the optical signal propagating along the silicon optical waveguide. Tight confinement of the optical signal within the waveguide structure allows for efficient evanescent coupling into the poly-germanium detector. The silicon optical waveguide may comprise any desired geometry, with the poly-germanium detector formed to either cover a portion of the waveguide, or be butt-coupled to an end portion of the waveguide. When covering a portion of the waveguide, poly-germanium detector may comprise a “wrap-around” geometry to cover the side and top surfaces of the optical waveguide, with electrical contacts formed at opposing ends of the detector.

Abstract: A method for forming a hybrid active electronic and optical circuit using a lithography mask. The hybrid active electronic and optical circuit comprising an active electronic device and at least one optical device on a Silicon-On-Insulator (SOI) wafer. The SOI wafer including an insulator layer and an upper silicon layer. The upper silicon layer including at least one component of the active electronic device and at least one component of the optical device. The method comprising projecting the lithography mask onto the SOI waver in order to simultaneously pattern the component of the active electronic device and the component of the optical device on the SOI wafer.

Abstract: A passive optical waveguide device deposited on a wafer that includes an insulator layer and an upper semiconductor layer formed at least in part from silicon. The upper silicon layer forms at least part of an optical waveguide, such as a slab waveguide. The passive optical waveguide device includes an optical waveguide, a gate oxide, and a polysilicon layer. The polysilicon layer projects a region of static effective mode index within the optical waveguide having a different effective mode index than the optical waveguide outside of the region of the static effective mode index. The region of static effective mode index has a depth extending within the optical waveguide. The value and position of the effective mode index within the region of static effective mode index remains substantially unchanged over time.

Abstract: An anisotropically etched prism assembly including a device portion, a light coupling portion, and an alignment portion. The anisotropically etched prism assembly having a plurality of optical devices arranged in a first fixed pattern. Each pair of said plurality of optical devices spaced a first prescribed distance apart. The light coupling portion including a plurality of anisotropically etched prisms. Each one of the plurality of anisotropically etched prisms is arranged in second fixed pattern so as to correspond with a respective one of the plurality of optical devices. Each one of the pairs of said plurality of anisotropically etched prisms are spaced a second prescribed distance apart, the second prescribed distance substantially equals the first prescribed distance. The alignment portion aligns the light coupling portion and the device portion. Each one of said plurality of anisotropically etched prisms are aligned with a respective one of said plurality of optical devices.

Abstract: An effective index modifier that modifies light propagation in a waveguide. The device is formed on a wafer, such as a Silicon-On-Insulator (SOI) wafer that includes an insulator layer and an upper silicon layer. A waveguide is formed at least in part in the upper silicon layer of the SOI wafer. The waveguide guides an optical signal by total internal reflection. At least one micro-mechanical system (MEMS) having at least one movable component is disposed a positive distance away from the waveguide. Application of voltage to the MEMS results in a variation of the distance between the moveable component and the waveguide, which in turn alters the effective index of the waveguide in a location proximate the moveable object, thereby resulting in modification of light propagation in the waveguide.

Abstract: A method for forming a hybrid active electronic and optical circuit using a lithography mask. The hybrid active electronic and optical circuit comprising an active electronic device and at least one optical device on a Silicon-On-Insulator (SOI) wafer. The SOI wafer including an insulator layer and an upper silicon layer. The upper silicon layer including at least one component of the active electronic device and at least one component of the optical device. The method comprising projecting the lithography mask onto the SOI waver in order to simultaneously pattern the component of the active electronic device and the component of the optical device on the SOI wafer.

Abstract: A silicon-based electro-optic modulator is based on forming a gate region of a first conductivity to partially overly a body region of a second conductivity type, with a relatively thin dielectric layer interposed between the contiguous portions of the gate and body regions. The modulator may be formed on an SOI platform, with the body region formed in the relatively thin silicon surface layer of the SOI structure and the gate region formed of a relatively thin silicon layer overlying the SOI structure. The doping in the gate and body regions is controlled to form lightly doped regions above and below the dielectric, thus defining the active region of the device. Advantageously, the optical electric field essentially coincides with the free carrier concentration area in this active device region. The application of a modulation signal thus causes the simultaneous accumulation, depletion or inversion of free carriers on both sides of the dielectric at the same time, resulting in high speed operation.

Abstract: An integrated optical circuit comprising an optical waveguide and an evanescent coupler. The optical waveguide is located on a wafer. The optical waveguide is formed from an upper semiconductor layer of the wafer, a gate oxide layer deposited on the upper semiconductor layer, and a polysilicon layer deposited on the gate oxide layer. The evanescent coupling region is formed at least in part from a gap portion that optically couples light to the upper semiconductor layer of the optical waveguide using the evanescent coupling region. Light can be coupled from outside of the passive optical waveguide device via the evanescent coupling region into the optical waveguide. Alternatively, light can be coupled from the optical waveguide through the evanescent coupling region out of the passive optical waveguide device.