Abstract: In one implementation, a voltage boost assembly including a boost converter having a capacitive element arranged at an output, and an inductive element connectable to an electrical supply. The voltage boost assembly also includes a sensor assembly provided to generate a quick-start enable signal in response to detecting that an electrical condition relative to an electrical output of the boost converter has breached a first threshold. The voltage boost assembly further includes a quick-start module responsive to the quick-start enable signal, and configured to drive the boost converter at a relatively high duty-cycle and so that the boost converter delivers an output current that satisfies a second threshold in order to charge the capacitive element arranged at the output.

Abstract: A current mirror circuit connectible to an amplifier circuit to set a bias point thereof includes a current mirror circuit, and a bias resistor connected thereto. The bias resistor is connectible to the amplifier circuit. A first helper circuit is connected in parallel with the bias resistor, and is selectively activated for a first predetermined duration by a first control signal. The activated first helper circuit defines a lower resistance path relative to the bias resistor to shorten a rising transient response of the amplifier circuit as the current mirror circuit is activated.

Abstract: Aspects of this disclosure relate to compensating for dynamic error vector magnitude. A compensation circuit can generate a compensation signal based at least partly on an amount of time that an amplifier, such as a power amplifier, is turned off between successive transmission bursts of the amplifier. For example, the compensation circuit can charge a capacitor based at least partly on an amount of time that the amplifier is turned off between successive transmission bursts and generate the compensation signal based at least partly on an amount of charge stored on the capacitor. A bias circuit can receive the compensation signal, generate a bias signal based at least partly on the compensation signal, and provide the bias signal to the amplifier to bias the amplifier.

Abstract: An end-fire antenna for wideband low form factor applications includes a first metal layer, a second metal layer, and a dielectric layer disposed between the first and second metal layers. An open cavity formed in the dielectric layer that is filled with air, the cavity defined by a pair of sidewalls that extend from an aperture of the cavity to a rear wall of the cavity, where the depth of the aperture is defined between the aperture and the rear wall. The cavity is formed by selecting the width of the aperture of the cavity and the depth of the cavity such that the antenna achieves the same gain during operation irrespective of a variation in the thickness of the antenna.

Abstract: A voltage supply system is disclosed, comprising a boost converter configured to receive an input voltage and generate a first output voltage at a first output node, a low-voltage supply circuit configured to receive the input voltage and generate a second output voltage at a second output node, and a routing circuit configured to route the first output voltage of the boost converter to the second output node during a selected condition of the input voltage.

Abstract: A bias circuit provides additional bias current for power amplifiers during data bursts to compensate for the gain droop caused by a rise in the power amplifier temperature during the data burst. A bias circuit includes a difference amplifier and switches coupled to the difference amplifier. The switches operate the bias circuit in a first mode when a transmit data burst is detected and operate the bias circuit in a second mode after the bias circuit has operated in the first mode for a predetermined period of time. In the first mode, the bias circuit charges a storage capacitor and sets an output current to zero. In the second mode, the bias circuit outputs the output current that increases above the initial value of zero as the PA warms up, where the excursion of this increase of current is determined by a register. The switches disable the bias circuit when the transmit data burst ends.

Abstract: Disclosed are systems and methods related to reducing intermodulation products in an RF output signal by matching an impedance of the power amplifier to an impedance of the antenna and concurrently blocking signals having a second fundamental frequency received by the antenna when the antenna is transmitting to inhibit intermodulation products of the first and second fundamental frequencies from re-radiating from the antenna. The matching and blocking are performed concurrently by a single circuit with combined matching and blocking functionality.

Abstract: Described herein methods of manufacturing dual-sided packaged electronic modules that control the distribution of an under-fill material between one or more components and a packaging substrate. The disclosed technologies include under-filling one or more components and deflashing a portion of the under-fill to remove under-fill material prior to attaching solder balls. The deflashing step removes a thin layer of under-fill material that may have coated contact pads for the ball grid array. Because the solder balls are not present during under-fill, there is little capillary action drawing material away from the components being under-filled. This can reduce the frequency of voids under the components being under-filled. Accordingly, the disclosed technologies control under-fill for dual-sided ball grid array packages using under-fill deflash prior to attaching solder balls of the ball grid array.

Abstract: Field-effect transistor (FET) devices are described herein that include one or more body contacts implemented near source, gate, drain (S/G/D) assemblies to improve the influence of a voltage applied at the body contact on the S/G/D assemblies. For example, body contacts can be implemented between S/G/D assemblies rather than on the ends of such assemblies. This can advantageously improve body contact influence on the S/G/D assemblies while maintaining a targeted size for the FET device.

Abstract: Power amplification system is disclosed. A power amplification system can include a Class-E push-pull amplifier including a transformer balun. The power amplification can further include a reactance compensation circuit coupled to the transformer balun. In some embodiments, the reactance compensation circuit is configured to reduce variation over frequency of a fundamental load impedance of the power amplification system.

Abstract: Apparatus and methods for serial interfaces are provided. In one embodiment, an integrated circuit operable to communicate over a serial interface is provided. The integrated circuit includes analog circuitry, registers for controlling the operation of the analog circuitry, and a distributed slave device including a primary block and a secondary block. The registers are accessible over the serial interface using a shared register address space. Additionally, the primary block is electrically connected to the serial interface and to a first portion of the registers and the secondary block is electrically connected to the primary block and to a second portion of the registers.

Abstract: Front-end system having switchable amplifier output stage. In some embodiments, a method for operating a front-end system can include amplifying a signal in a driver stage of a power amplifier, and routing the signal from the driver stage to a selected one of a plurality of output stages, such that the selected output stage further amplifies the signal. The method can further include routing the amplified signal for transmission from the selected output stage to a selected one of a plurality of antennas.

Abstract: A wireless communication device includes a radio frequency antenna and a transceiver. The transceiver includes a receiver having a switching architecture configured to generate a plurality of output phases within a local oscillator period based on the filtered RF signal and a respective plurality of local oscillator signals. The plurality of output phases can be organized into at least K groups where K is an integer of four or greater, and each nth group of the K groups includes nth and (n+K)th output phases of the plurality of output phases. The receiver can difference the nth and (n+K)th output phases of each respective group of the K groups, resulting in gain-added output phases.

Abstract: Described herein are systems, architectures, circuits, devices, and methods for a DC-DC converter that dynamically adjusts a supply voltage to a power amplifier based on the number of resource blocks in a signal to be transmitted. The disclosed technologies estimate the number of resource blocks in a signal, generate a signal corresponding to the estimated number of resource blocks, and modify a supply voltage based on the generated signal. The disclosed DC-DC converters can be integrated into systems that employ power management strategies such as average power tracking (“APT”). In addition, the disclosed technologies can be used to improve existing APT-based systems.

Abstract: A coupling methodology and circuit arrangements to provide multi-frequency simultaneous power measurement. In one example, a wireless device front-end apparatus includes a plurality of antenna swap switches each connected to first and second antenna contacts, and a plurality of electromagnetic couplers each having an input port to receive a input signal of a unique frequency, a coupled port that provides a coupled signal based on the input signal, an output port connected to one of the plurality of antenna swap switches, and an isolation port. The apparatus further includes a termination network including a plurality of termination loads, and an output switch network configured to selectively connect the coupled port of each electromagnetic coupler to a coupler output bank to provide the coupled signals at the coupler output bank, and to selectively connect the isolation port of each electromagnetic coupler to one of the plurality of termination loads.

Abstract: Apparatus and methods for reducing inductor ringing of a voltage converter are provided. In certain configurations, a voltage converter includes an inductor connected between a first node and a second node, a plurality of switches, and a bypass circuit having an activated state and a deactivated state. The switches includes a first switch connected between a battery voltage and the first node, a second switch connected between the first node and a ground voltage, a third switch connected between the second node and the ground voltage, and a fourth switch connected between the second node and the output. The bypass circuit includes a first pair of transistors connected between the first node and the second node and configured to turn on to bypass the inductor in the activated state and to turn off in the deactivated state.

Abstract: Amplifier systems and methods are provided that include a fixed gain amplification stage coupled to an adjustable attenuation stage further coupled to a variable gain amplification stage. A controller controls an amount of attenuation provided by the adjustable attenuation stage and an amount of gain provided by the variable gain amplification stage to maintain any of various noise, efficiency, and/or linearity requirements of the amplifier system.

Abstract: Stacked wafer-level packaging devices. In some embodiments, a wireless device includes a transceiver configured to generate a radio-frequency (RF) signal. The wireless device also includes a front-end module (FEM) in communication with the transceiver, the front-end module including a packaging substrate configured to receive a plurality of components, the front-end module further including a stacked assembly implemented on the packaging substrate, the stacked assembly including a first wafer-level packaging (WLP) device having a radio-frequency (RF) shield, the stacked assembly further including a second wafer-level packaging device having an RF shield, the second wafer-level packaging device positioned over the first wafer-level packaging device such that the RF shield of the second wafer-level packaging device is electrically connected to the RF shield of the first wafer-level packaging device.

Abstract: A radio frequency front end circuit includes an output signal transmission line, an amplifier circuit with an input connected to a radio frequency signal source and an output connected to the output signal transmission line. A harmonic suppression circuit is connected to the amplifier circuit, and includes an active circuit element having a frequency-dependent impedance and is tuned as a reflective trap with a negative capacitance for one or more rejection frequency ranges each corresponding to a multiple of a fundamental frequency of a signal generated by the radio frequency signal source.

Abstract: A ceramic resonator radio frequency filter includes a printed circuit board, one or more first coaxial resonators disposed on the printed circuit board, and one or more second coaxial resonators disposed over the one or more first coaxial resonators so that the one or more first coaxial resonators and one or more second coaxial resonators are arranged in a stacked configuration. The one or more first coaxial resonators and second coaxial resonators electrically connected to the printed circuit board.