Abstract: A negative voltage level conversion control circuit comprises a negative voltage generation circuit, a bias circuit, and a level shift unit circuit, wherein an output end of the bias circuit is connected to the level shift unit circuit, and the other end of the bias circuit is connected to the negative voltage generation circuit; an output end of the negative voltage generation circuit is connected to the level shift unit circuit; the bias circuit is configured to receive an enable signal and output a bias voltage; the bias voltage is used for controlling a switching process of the level shift unit circuit; the enable signal is used for enabling the bias circuit and the negative voltage generation circuit.

Abstract: A phase shifter includes an orthogonal signal generator and an adder; the output end of the orthogonal signal generator is connected with the input end of the adder, and the orthogonal signal generator is configured to generate a first orthogonal signal; the adder is configured to carry out an amplitude adjustment on the first orthogonal signal, and to carry out vector composing and phase compensation on the adjusted first orthogonal signal to obtain a first phase shift signal.

Abstract: A radio frequency amplification processing circuit includes: a radio frequency power amplifier, a transmitting antenna and a filter element; the radio frequency power amplifier is configured to perform radio frequency amplification on a modulated first wireless communication signal, and transmit, with a first line, the amplified first wireless communication signal to the transmitting antenna for transmission, or perform radio frequency amplification on a modulated second wireless communication signal, and transmit, with a second line, the amplified second wireless communication signal to the filter element; and the filter element is configured to filter the amplified second wireless communication signal, and transmit, also with the second line, the filtered second wireless communication signal to the transmitting antenna for transmission.

Abstract: An amplifier includes an input circuit, an amplification circuit, and at least two feedback circuits. The input circuit is connected with an input end of the amplification circuit; an output end of the amplification circuit is connected with a first end of each of the feedback circuits respectively; a second end of each of the feedback circuits is connected with the input circuit respectively. The input circuit is configured to receive an input signal and a feedback signal; the amplification circuit is configured to amplify the input signal and the feedback signal to obtain an amplified signal. The feedback signal is fed back to the input circuit by feeding back at least a part of the amplified signal through a target feedback circuit; and the target feedback circuit is a feedback circuit that depends on the type of the input signal of the at least two feedback circuits.

Abstract: An architecture of radio frequency front-end includes a power amplifier module integrated duplexer (PAMiD), an antenna and at least one tunable matching network; herein, the PAMiD includes a power amplifier, and the at least one tunable matching network is located between the power amplifier and the antenna, and is configured to adjust the impedance of the output end of the power amplifier and/or the impedance of the input end of the antenna.

Abstract: An impedance adjustment circuit is connected in parallel with a bias current output end of a bias circuit. The bias circuit is configured to provide bias current to a first circuit unit. The impedance adjustment circuit is configured to adjust source impedance of the first circuit unit.

Abstract: A power distribution circuit applied to a radio frequency front-end transceiving apparatus includes a common-stage amplifying circuit and a branch-stage amplifying circuit, in which the branch-stage amplifying circuit comprises at least two parallel channel amplifying circuits; the common-stage amplifying circuit is configured to perform a first signal processing on a radio frequency signal received by an antenna of the radio frequency front-end transceiving apparatus to obtain a first power signal and output the first power signal to each of channel amplifying circuits, in which the first signal processing at least includes a buffering processing, an isolation processing and a low-noise amplifying processing; each channel amplifying circuit is configured to perform a second signal processing on the first power signal to obtain a second power signal and output the second power signal to a radio transceiving device; the second signal processing at least includes a low-noise amplifying processing.

Abstract: A switch circuit includes an antenna port and at least one switch branch. Each branch includes a first, a second, and a third switches. The antenna port has one end connected with an antenna, and another end electrically connected with one end of the first switch of each branch respectively. The other end of the first switch of each branch is electrically connected with one end of the second switch corresponding to each branch and one end of the third switch corresponding to each branch respectively; the other end of each of the second switch corresponding to each branch is connected with a ground terminal; the other end of each of the third switch corresponding to each branch is electrically connected with one end of a load corresponding to each branch; and the other end of the load corresponding to each branch is connected with the ground terminal.

Abstract: An amplifier includes an amplification circuit, a power supplying circuit and an input circuit. A first end of the amplification circuit is connected with a first end of the input circuit; a second end of the amplification circuit is connected with the power supplying circuit; and a third end of the amplification circuit is connected with a second end of the input circuit. The power supplying circuit is at least configured to supply power to the amplification circuit so that the amplification circuit operates in an amplification region. The input circuit is at least configured to receive an input signal; the amplification circuit is configured to obtain an amplification gain in case of operating in the amplification region, and amplify the input signal by using the obtained amplification gain.

Abstract: A power amplifier includes: a power amplification circuit and a linearity compensation circuit; and herein the linearity compensation circuit is connected between a transistor amplification circuit and a biasing circuit of the power amplification circuit, to linearly compensate a nonlinear distortion of the power amplification circuit.

Abstract: An amplifier assembly includes an orthogonal signal generator, an adder and an amplification circuit. An output end of the orthogonal signal generator is connected with an input end of the adder, and the orthogonal signal generator is configured to generate an orthogonal signal. An output end of the adder is connected with an input end of the amplification circuit, and the adder is configured to vector-synthesize the orthogonal signal to output a first signal. The amplification circuit is configured to amplify a power of the first signal and compensate a phase of the first signal to output a second signal.

Abstract: An orthogonal signal generator includes a first stage phase shifting circuit and a second stage phase shifting circuit. The output end of the first stage phase shifting circuit is connected with the input end of the second stage phase shifting circuit, an impedance of the first stage phase shifting circuit is adjustable based on the frequency of a first input signal. The first stage phase shifting circuit is configured to phase-shift the first input signal by a first phase shifting angle to generate a first phase shifting angle signal. An impedance of the second stage phase shifting circuit is adjustable based on a frequency of a second input signal. The second stage phase shifting circuit is configured to phase-shift the phase-shifted second input signal by a second phase shifting angle to output an orthogonal signal with the corresponding frequency.

Abstract: A power amplifier circuit includes a power amplification circuit and a diode assembly. The diode assembly is connected in series with a transistor amplification circuit of the power amplification circuit, and the transistor amplification circuit is configured to, when load of power amplifier is mismatched, turn the diode assembly on, so as to divide current voltage to at least two electrodes of the transistor amplification circuit.

Abstract: A power control circuit includes a negative feedback loop, and a radio frequency signal path including a first NMOS transistor having a gate configured as a radio frequency signal input end, a drain connected with a source of a second NMOS transistor, and a source connected with a ground terminal. A drain of the second NMOS transistor is configured as a radio frequency signal output end and connected with a first voltage source. The negative feedback loop includes a third NMOS transistor having a gate connected with an output end of a differential amplifier, a source connected with the ground terminal, and a drain connected with a source of a fourth NMOS transistor having a gate connected with a reverse input end of the differential amplifier and with a second voltage source, and a drain connected with a forward input end and a first bias current source.

Abstract: A power amplifier circuit includes N-stage power amplifiers connected in series, provided with an input end receiving a RF input signal and an output end outputting a RF output signal. In the N-stage power amplifiers, an output end of N-M stage power amplifiers and an output end of a final stage amplifier are grounded through their respective frequency doubling suppression circuits which are configured to suppress frequency doubling of the N-stage power amplifiers during operation, and N is an integer greater than or equal to 2.

Abstract: A signal receiving apparatus includes a filter, an amplifier, a lamina and a bare die disposed on the lamina. The filter is configured to filter a received signal. The filter includes at least one capacitor and at least one inductor. The at least one capacitor is disposed on the bare die. The at least one inductor is disposed on the lamina. The at least one inductor is connected to the bare die. The amplifier is configured to amplify a signal filtered through the filter. The signal receiving apparatus provided by the disclosure can solve a problem of poor overall performance of a receiving link in some implementations and improve the overall performance of the signal receiving apparatus.

Abstract: A circuit for protecting a power amplifier includes a protection control circuit, an inter-stage adjustment circuit and a multi-stage power amplification circuit. The inter-stage adjustment circuit is connected in series between at least two adjacent power amplification circuits in the multi-stage power amplification circuit. The protection control circuit is configured to: control the inter-stage adjustment circuit to be in a turn-off state when overload protection of any stage power amplification circuit is enabled; and control the inter-stage adjustment circuit to be in a turn-on state, after a preset time elapses from the overload protection of the power amplification circuit being closed. In this way, damage of the power amplifier due to excessive input power may be avoided by the inter-stage adjustment circuit, thereby achieving a function of protecting the power amplifier.

Abstract: A protection circuit for the power amplifier includes a detection circuit, a controller and an input impedance adjustment circuit. The detection circuit is provided with an input end connected to the power amplifier and an output end connected to an input end of the controller, and is configured to detect an operation electrical signal of the power amplifier and generate a trigger electrical signal. The controller is configured to generate a first control signal and a second control signal, the first control signal is configured to control a bias current or bias voltage of the power amplifier to reduce or recover a gain of the power amplifier, and the second control signal is configured to adjust characteristic parameters of the input impedance adjustment circuit. The input impedance adjustment circuit is configured to decrease or increase input power of the power amplifier in response to the second control signal.

Abstract: A circuit for protecting an amplifier includes a detection circuit, a controller and a bypass impedance adjustment circuit. The detection circuit is configured to detect an operation electrical signal of a power amplifier and generate a trigger electrical signal based on the operation electrical signal correspondingly. A first output end of the controller is connected to a base or a gate or a bias circuit of the power amplifier, and a second output end of the controller is connected to a control input end of the bypass impedance adjustment circuit. The bypass impedance adjustment circuit is connected in parallel with the power amplifier. The controller is configured to generate a first control signal and a second control signal based on the trigger electrical signal, and the first control signal is configured to control a bias current or bias voltage of the power amplifier.

Abstract: A band-gap reference source circuit is configured to be connected with an electronic device. The band-gap reference source circuit comprises: a power supply, a start circuit, a core circuit, an output circuit and a shunt circuit, wherein the power supply is connected to first ends of the start circuit, the core circuit and the output circuit; a second end of the start circuit is connected to the core circuit; a second end of the core circuit is connected to the output circuit, and a control end of the core circuit is connected to the shunt circuit and used for providing a control signal for the shunt circuit; an output end of the output circuit is used for connecting to an electronic device; and a first end of the shunt circuit is connected to the output end of the output circuit, and controls a current of a second end.