Patents Assigned to SNU R&DB Foundation
  • Patent number: 11448874
    Abstract: An aberration correction method and apparatus. The apparatus includes at least one processor, and an input/output unit configured to receive an captured image, wherein the processor is configured to initialize a first matrix or a second matrix by reducing a matrix of a point spread function (PSF) of a lens included in a capturing device used to capture the captured image, iteratively perform an aberration removal and a noise removal based on the captured image and the first matrix or the second matrix, and output a final original image as a result of the iteratively performing. Here, the first matrix is a matrix obtained by reducing the number of indices indicating light arrival points of the matrix of the PSF, and the second matrix is a matrix obtained by reducing the number of indices corresponding to light arrival points of a transposed matrix of the PSF.
    Type: Grant
    Filed: April 2, 2020
    Date of Patent: September 20, 2022
    Assignees: SAMSUNG ELECTRONICS CO., LTD., SNU R&DB FOUNDATION
    Inventors: Deokyoung Kang, Myung Joo Kang, Yang Ho Cho, Seung Won Jeong, Jin Je Park
  • Publication number: 20220284302
    Abstract: A method and apparatus with neural architecture search are provided. A processor-implemented method includes obtaining target data, sampling a trained first neural network into a plurality of second neural networks, training each of the second neural networks based on a portion of the target data, and selecting a second neural network satisfying a predetermined condition among the trained second neural networks for performing an inference operation.
    Type: Application
    Filed: July 23, 2021
    Publication date: September 8, 2022
    Applicants: Samsung Electronics Co., Ltd., SNU R&DB FOUNDATION
    Inventor: Sungjoo YOO
  • Publication number: 20220284273
    Abstract: A neural processor and a control method of the neural processor are provided. The neural processor includes plurality of processing element groups, wherein each of the processing element groups includes a plurality of processing elements configured to perform a vector operation, an overflow accumulator configured to be engaged by a processing element in which an overflow or underflow occurs from among the plurality of processing elements, and a register configured to store information indicating the processing element as an owner processing element.
    Type: Application
    Filed: July 12, 2021
    Publication date: September 8, 2022
    Applicants: Samsung Electronics Co., Ltd., SNU R&DB FOUNDATION
    Inventor: Sungjoo YOO
  • Publication number: 20220283984
    Abstract: A neural processor is provided. The neural processor includes a matrix device which is configured to generate an output feature map by processing a standard convolution operation and which has a systolic array architecture, and accelerators with an adder-tree structure which are configured to process depth-wise convolution operations for each of elements of the output feature map corresponding to lanes of the matrix device.
    Type: Application
    Filed: July 7, 2021
    Publication date: September 8, 2022
    Applicants: SAMSUNG ELECTRONICS CO., LTD., SNU R&DB FOUNDATION
    Inventors: Dongyoung KIM, Jung Ho AHN, Sunjung LEE, Jaewan CHOI
  • Patent number: 11436168
    Abstract: An accelerator includes: a memory configured to store input data; a plurality of shift buffers each configured to shift input data received sequentially from the memory in each cycle, and in response to input data being stored in each of internal elements of the shift buffer, output the stored input data to a processing element (PE) array; a plurality of backup buffers each configured to store input data received sequentially from the memory and transfer the stored input data to one of the shift buffers; and the PE array configured to perform an operation on input data received from one or more of the shift buffers and on a corresponding kernel.
    Type: Grant
    Filed: March 4, 2021
    Date of Patent: September 6, 2022
    Assignees: Samsung Electronics Co., Ltd., SNU R&DB FOUNDATION
    Inventors: Seung Wook Lee, Hweesoo Kim, Jung Ho Ahn
  • Patent number: 11415590
    Abstract: A processor-implemented posture determination method includes: estimating a rotational acceleration of a timepoint based on an angular velocity measured by a first sensor at the timepoint and a determined center of rotation of a previous timepoint; correcting an acceleration measured by a second sensor at the timepoint based on the rotational acceleration; and determining a center of rotation of the timepoint and a posture of the timepoint based on the corrected acceleration and an estimated posture of the timepoint.
    Type: Grant
    Filed: December 9, 2019
    Date of Patent: August 16, 2022
    Assignees: Samsung Electronics Co., Ltd., SNU R&DB FOUNDATION
    Inventors: Hyun Cheol Jeon, Chan Gook Park, Keechang Lee, Jungmin Park, So Young Park
  • Patent number: 11400219
    Abstract: Disclosed is drug delivery system for effectively administering a drug into a human or animal body tissue.
    Type: Grant
    Filed: July 27, 2017
    Date of Patent: August 2, 2022
    Assignee: SNU R&DB FOUNDATION
    Inventors: Jai-Ick Yoh, Hun Jae Jang
  • Publication number: 20220237436
    Abstract: Disclosed is a neural network training method and apparatus. The neural network training method includes a neural network training method, including receiving a neural network model that is first trained based on a first weight, second training the first trained neural network model based on learning rates to obtain second weights from a second trained neural network, and third training the second trained neural network model based on the second weights.
    Type: Application
    Filed: November 15, 2021
    Publication date: July 28, 2022
    Applicants: Samsung Electronics Co., Ltd., SNU R&DB FOUNDATION
    Inventors: Sungho SHIN, Wonyong SUNG, Yoonho BOO
  • Publication number: 20220237040
    Abstract: An accelerator resource management method and apparatus are disclosed. The accelerator resource management method includes receiving a task request for a neural network-related task and a resource scheduling policy for the neural network-related task, obtaining information on a current resource utilization status of an accelerator cluster comprising a plurality of accelerators, in response to the task request, and allocating an accelerator resource for performing the task based on a utility of a resource allocation that is based on the resource scheduling policy and the information.
    Type: Application
    Filed: July 12, 2021
    Publication date: July 28, 2022
    Applicants: Samsung Electronics Co., Ltd., SNU R&DB FOUNDATION
    Inventors: Sanggyu SHIN, Soojeong KIM, Byung-Gon CHUN, Kyunggeun LEE
  • Publication number: 20220225506
    Abstract: An electronic device includes: a host box comprising a host processor configured to control an operation of the electronic device, a host motherboard in which the host processor is disposed, and a host power supply unit (PSU) configured to supply power to a component connected to the host motherboard; and one or more extension boxes controlled by the host box, wherein each of the one or more extension boxes comprises an extension motherboard independent of the host box, and an extension PSU independent of the host box and configured to supply power to a component connected to the extension motherboard.
    Type: Application
    Filed: July 14, 2021
    Publication date: July 14, 2022
    Applicants: Samsung Electronics Co., Ltd., SNU R&DB Foundation
    Inventors: Seung Wook LEE, Jangwoo KIM, Pyeongsu PARK
  • Patent number: 11377548
    Abstract: Semi-conducting two-dimensional (2D) nanoobjects, prepared by self-assembly of conjugated polymers, are promising materials for optoelectronic applications. However, there has been no example of 2D nanosheets with controlled lengths and aspect ratios at the same time via self-assembly. Herein, the inventors successfully prepared uniform semi-conducting 2D sheets using a conjugated poly(cyclopentenylene vinylene) homopolymer and its block copolymer by blending and heating. Using these as 2D seeds, living crystallization-driven self-assembly (CDSA) was achieved by adding the homopolymer as a unimer. Interestingly, unlike typical 2D CDSA examples showing radial growth, this homopolymer assembled only in one direction. Owing to this uniaxial growth, the lengths of the 2D nanosheets could be precisely tuned with narrow dispersity according to the unimer-to-seed ratio. The inventors also studied the growth kinetics of the living 2D CDSA and confirmed first-order kinetics.
    Type: Grant
    Filed: April 16, 2021
    Date of Patent: July 5, 2022
    Assignee: SNU R&DB FOUNDATION
    Inventors: Tae-Lim Choi, Sanghee Yang, Sung-Yun Kang
  • Patent number: 11369741
    Abstract: Provided is a micro-jet drug injection device comprising: a pressure chamber having a pressure driving liquid hermetically filled therein; a drug chamber having a micro nozzle defined in a wall; an elastic membrane elastically expandable and restorable and to separate the pressure chamber from the drug chamber; an energy-focusing unit concentrating energy on the pressure driving liquid in the pressure chamber; and the storage unit supplying the drug solution therein into the drug chamber through a drug supply channel. The drug chamber has a partial inner space defined therein. The partial inner space is in fluid communication with the drug supply channel and is partially defined by the membrane. A nozzle closure is disposed inside or outside the drug chamber. The nozzle closure blocks inflow of air outside the micro-nozzle into the partial inner space after the elastic membrane has expanded and before elastic recovery of the membrane is completed.
    Type: Grant
    Filed: November 28, 2017
    Date of Patent: June 28, 2022
    Assignee: SNU R&DB FOUNDATION
    Inventors: Jai-Ick Yoh, Hwi-Chan Ham, Hun Jae Jang
  • Publication number: 20220138494
    Abstract: A method and apparatus for classification using a neural network. A classification apparatus includes at least one processor and a memory. The memory is configured to store a classifier and a preprocessor including a defensive noise generator. The at least one processor generates defensive noise from an input image through the defensive noise generator in the preprocessor, generates a combined image by combining the input image and the defensive noise, and outputs a classification result by inputting the combined image to the classifier.
    Type: Application
    Filed: May 18, 2021
    Publication date: May 5, 2022
    Applicants: SAMSUNG ELECTRONICS CO., LTD., SNU R&DB FOUNDATION
    Inventors: Seong-Jin PARK, Hyun Oh SONG, Gaon AN, Seungju HAN
  • Publication number: 20220114015
    Abstract: A scheduler, a method of operating the scheduler, and an electronic device including the scheduler are disclosed.
    Type: Application
    Filed: March 9, 2021
    Publication date: April 14, 2022
    Applicants: Samsung Electronics Co., Ltd, SNU R&DB FOUNDATION
    Inventors: Seung Wook LEE, Younghwan OH, Jaewook LEE, Sam SON, Yunho JIN, Taejun HAM
  • Publication number: 20220114116
    Abstract: An accelerator includes: a memory configured to store input data; a plurality of shift buffers each configured to shift input data received sequentially from the memory in each cycle, and in response to input data being stored in each of internal elements of the shift buffer, output the stored input data to a processing element (PE) array; a plurality of backup buffers each configured to store input data received sequentially from the memory and transfer the stored input data to one of the shift buffers; and the PE array configured to perform an operation on input data received from one or more of the shift buffers and on a corresponding kernel.
    Type: Application
    Filed: March 4, 2021
    Publication date: April 14, 2022
    Applicants: SAMSUNG ELECTRONICS CO., LTD., SNU R&DB FOUNDATION
    Inventors: Seung Wook LEE, Hweesoo KIM, Jung Ho AHN
  • Publication number: 20220052848
    Abstract: A processor-implemented encryption method using homomorphic encryption includes: receiving data; generating a ciphertext by encrypting the received data; determining a coefficient of an approximating polynomial for performing a modular reduction on a modulus corresponding to the ciphertext, based on an error between the approximating polynomial and a modular reduction function; and performing bootstrapping on the ciphertext by performing the modular reduction based on the determined coefficient of the approximating polynomial.
    Type: Application
    Filed: August 3, 2021
    Publication date: February 17, 2022
    Applicants: SAMSUNG ELECTRONICS CO., LTD., SNU R&DB FOUNDATION, Industry Academic Cooperation Foundation Chosun University
    Inventors: Hyungchul KANG, Yongwoo LEE, Young-Sik KIM, Jong-Seon NO, Joon-woo LEE
  • Publication number: 20220012588
    Abstract: A reservoir management method includes: in response to receiving input data to which label information is mapped, determining whether to add the input data to a reservoir based on a sampling probability; in response to determining to add the input data to the reservoir when the reservoir is filled, selecting candidate data to be removed from among sets of sample data included in the reservoir based on a target label distribution and a current label distribution of the reservoir, and removing the selected candidate data from the reservoir; and training a neural network model using sample data of the reservoir from which the selected candidate data is removed.
    Type: Application
    Filed: June 15, 2021
    Publication date: January 13, 2022
    Applicants: SAMSUNG ELECTRONICS CO., LTD., SNU R&DB FOUNDATION
    Inventors: Seonmin RHEE, Chris Dongjoo KIM, Gunhee KIM, Jinseo JEONG, Seungju HAN
  • Publication number: 20210365790
    Abstract: A processor-implemented neural network data processing method includes: receiving input data; determining a portion of channels to be used for calculation among channels of a neural network based on importance values respectively corresponding to the channels of the neural network; and performing a calculation based on the input data using the determined portion of channels of the neural network.
    Type: Application
    Filed: January 14, 2021
    Publication date: November 25, 2021
    Applicants: SAMSUNG ELECTRONICS CO., LTD., SNU R&DB FOUNDATION
    Inventors: Changyong SON, Minsoo KANG, Bohyung HAN
  • Publication number: 20210358146
    Abstract: A processor-implemented method of detecting a moving object includes: estimating a depth image of a current frame; determining an occlusion image of the current frame by calculating a depth difference value between the estimated depth image of the current frame and an estimated depth image of a previous frame; determining an occlusion accumulation image of the current frame by adding a depth difference value of the occlusion image of the current frame to a depth difference accumulation value of an occlusion accumulation image of the previous frame; and outputting an area of a moving object based on the occlusion accumulation image.
    Type: Application
    Filed: February 4, 2021
    Publication date: November 18, 2021
    Applicants: SAMSUNG ELECTRONICS CO., LTD., SNU R&DB FOUNDATION
    Inventors: Hyoun Jin KIM, Haram KIM
  • Publication number: 20210351913
    Abstract: Disclosed is an encryption method and apparatus. The encryption method using homomorphic encryption may include generating a ciphertext by encrypting data, and bootstrapping the ciphertext by performing a modular reduction based on a selection of one or more target points for a modulus corresponding to the ciphertext.
    Type: Application
    Filed: March 31, 2021
    Publication date: November 11, 2021
    Applicants: Samsung Electronics Co., Ltd, SNU R&DB FOUNDATION, Industry-Academic Cooperation Foundation, Chosun University
    Inventors: Jong-Seon NO, Joonwoo LEE, Young-Sik KIM, Yongwoo LEE, Eunsang LEE