Patents Assigned to Sony Semiconductor Solutions Corporations
  • Publication number: 20240314458
    Abstract: In a solid state imaging element in which signal processing is performed on a pair of pixel signals, the circuit scale thereof is reduced. The solid state imaging element includes a pixel array section, a vertical scanning circuit, and a signal processing circuit. A plurality of pixels are arranged in directions of rows and directions of columns on the pixel array section. The vertical scanning circuit selects, from among the plurality of pixels, a pair of pixels disposed on both ends of a predetermined line segment, which does not match any of the rows and columns and forms an angle of not 45 degrees with respect to the rows, and causes the selected pixels to simultaneously output of a pair of pixel signals. The signal processing circuit performs predetermined signal processing on the pair of pixel signals.
    Type: Application
    Filed: January 31, 2022
    Publication date: September 19, 2024
    Applicant: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Katsuhiko HANZAWA, Kohei MATSUDA
  • Patent number: 12095426
    Abstract: An amplifier includes a P-type transistor and an N-type transistor that are connected in series, an operation amplifier, a transformer, and a variable attenuator. In the operation amplifier, an output terminal is coupled to a gate side of one of the P-type transistor and the N-type transistor, one of an inverting input terminal and a non-inverting input terminal is coupled to drain sides of both of the P-type transistor and the N-type transistor, and a reference voltage is to be applied to the other of the inverting input terminal and the non-inverting input terminal. In the transformer, a primary coil is coupled to a source side of one of the P-type transistor and the N-type transistor. The variable attenuator is provided between a secondary coil and gate terminals of both of the N-type transistor and the P-type transistor.
    Type: Grant
    Filed: July 31, 2020
    Date of Patent: September 17, 2024
    Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventor: Hideyuki Takano
  • Patent number: 12095468
    Abstract: A DLL circuit (110) includes a phase delay circuit (114), a selection circuit (115), a detection circuit (117), and a clock stop circuit (116). The phase delay circuit (114) generates a plurality of delayed signals having different phases according to a clock signal. The selection circuit (115) selects one of the plurality of delayed signals as an output signal according to a setting signal. The detection circuit (117) detects a timing of switching the setting signal. The clock stop circuit (116) stops input of the clock signal to the phase delay circuit (114) for a predetermined period including the timing detected by the detection circuit (117).
    Type: Grant
    Filed: August 12, 2021
    Date of Patent: September 17, 2024
    Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Miho Akagi, Yohtaro Yasu
  • Patent number: 12096671
    Abstract: An organic EL device is constructed with a structure that can prevent deterioration in characteristics. An organic EL device is provided that includes at least two or more subpixels each including an organic compound layer including at least a light-emitting layer that emits light of a different color from the other light-emitting layer(s), the organic compound layer being interposed between a first electrode and a second electrode in a stacking manner, the subpixels being disposed separately from one another on a plane perpendicular to a direction of the stacking. Lateral surfaces of the organic compound layers are covered with films differing from subpixel to subpixel. This structure can prevent the organic EL device from deterioration in characteristics.
    Type: Grant
    Filed: May 3, 2023
    Date of Patent: September 17, 2024
    Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventor: Yu Kato
  • Patent number: 12094908
    Abstract: A wide dynamic range with single exposure is achieved. A solid-state imaging device according to an embodiment includes a first substrate including a photoelectric conversion element, and a second substrate including a capacitor positioned on a side opposite to a surface of incidence of light to the photoelectric conversion element in the first substrate, and configured to accumulate a charge transferred from the photoelectric conversion element.
    Type: Grant
    Filed: August 6, 2019
    Date of Patent: September 17, 2024
    Assignee: Sony Semiconductor Solutions Corporation
    Inventors: Masaaki Takizawa, Yorito Sakano
  • Patent number: 12096642
    Abstract: The present disclosure relates to a solid-state imaging device that can achieve a high S/N ratio at a high sensitivity level without any decrease in resolution, and to an electronic apparatus. In the upper layer, the respective pixels of a photoelectric conversion unit that absorbs light of a first wavelength are tilted at approximately 45 degrees with respect to a square pixel array, and are two-dimensionally arranged in horizontal directions and vertical directions in an oblique array. The respective pixels of a photoelectric conversion unit that is sensitive to light of a second or third wavelength are arranged under the first photoelectric conversion unit. That is, pixels that are ?{square root over (2)} times as large in size (twice as large in area) and are rotated 45 degrees are arranged in an oblique array. The present disclosure can be applied to solid-state imaging devices that are used in imaging apparatuses, for example.
    Type: Grant
    Filed: November 4, 2021
    Date of Patent: September 17, 2024
    Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventor: Atsushi Toda
  • Patent number: 12096643
    Abstract: This technology relates to a solid-state image sensor configured to make smaller the chip size of a CIS that uses an organic photoelectric conversion film, and to an electronic apparatus. A solid-state image sensor according to a first aspect of this technology is characterized in that it includes a first substrate and a second substrate stacked one on top of the other and a first organic photoelectric conversion film formed on the first substrate and that a latch circuit is formed on the second substrate. This technology may be applied to back-illuminated CISs, for example.
    Type: Grant
    Filed: June 16, 2022
    Date of Patent: September 17, 2024
    Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Akira Matsumoto, Hiroshi Tayanaka
  • Patent number: 12094897
    Abstract: An imaging element according to an embodiment of the present disclosure includes: a semiconductor substrate having an effective pixel region in which a plurality of pixels is disposed and a peripheral region provided around the effective pixel region; a photoelectric converter; a first hydrogen block layer; an interlayer insulating layer; and a separation groove. The photoelectric converter includes a first electrode, a second electrode, and an electric charge accumulation layer and a photoelectric conversion layer. The first electrode is provided on a light receiving surface side of the semiconductor substrate and includes a plurality of electrodes. The second electrode is disposed to be opposed to the first electrode. The electric charge accumulation layer and the photoelectric conversion layer are stacked and provided in order between the first electrode and the second electrode and extend in the effective pixel region.
    Type: Grant
    Filed: January 27, 2020
    Date of Patent: September 17, 2024
    Assignee: Sony Semiconductor Solutions Corporation
    Inventor: Takahiro Kamei
  • Patent number: 12096113
    Abstract: The present technology relates to an information processing apparatus, an information processing method, and a program that enables appropriate sharing of processing in accordance with a remaining capacity of a battery. Provided is a mode switching unit that switches a mode depending on at least one of a remaining capacity of a battery or heat, the mode switching unit switching between a first mode in which a first device executes predetermined processing and a second mode in which a second device executes the predetermined processing. The predetermined processing is processing by an AI function. The present technology can be applied to, for example, a system including a surveillance camera and a server that distributes data from the surveillance camera.
    Type: Grant
    Filed: June 17, 2021
    Date of Patent: September 17, 2024
    Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Hirotaka Ishikawa, Satoshi Watanabe
  • Patent number: 12095709
    Abstract: A communication apparatus includes: a communication unit that performs signal transmission to and from a communication partner apparatus; and a communication control unit that changes a signal ratio in a first direction to the communication partner apparatus and a signal ratio in a second direction from the communication partner apparatus in accordance with a signal transmission state with the communication partner apparatus.
    Type: Grant
    Filed: March 16, 2020
    Date of Patent: September 17, 2024
    Assignee: Sony Semiconductor Solutions Corporation
    Inventors: Toshihisa Hyakudai, Hiroo Takahashi, Junya Yamada
  • Patent number: 12095892
    Abstract: Provided is a transmission/reception system that can implement miniaturization and a reduced number of wires for transmitting a signal between a sensor device and a reception device. The sensor device includes a data transmitting unit configured to transmit imaging data synchronized with a first clock signal to the reception device through a first signal transmission path, a clock signal transmitting unit configured to transmit a second clock signal with a lower frequency than the first clock signal to the reception device through a second signal transmission path, and a control signal communicating unit configured to communicate a control signal necessary for control of the first clock signal with the reception device through the second signal transmission path.
    Type: Grant
    Filed: July 16, 2021
    Date of Patent: September 17, 2024
    Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Ryota Shinoda, Takashi Masuda, Kumiko Mahara
  • Publication number: 20240305886
    Abstract: The present technology relates to a camera module, an image capturing method, and an electronic device which enable reduction of a memory capacity required for electronic image stabilization. The camera module includes: an imaging unit that outputs a captured image for each of image blocks each corresponding to a predetermined number of horizontal lines; an image block storage unit that stores the image blocks; and an image correction unit that performs image stabilization for each of the image blocks. The present technology can be applied to, for example, a digital video camera having an electronic image stabilization function.
    Type: Application
    Filed: December 27, 2021
    Publication date: September 12, 2024
    Applicant: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Hiroshi TAYANAKA, Norimitsu OKIYAMA
  • Publication number: 20240304646
    Abstract: Provided are an imaging device capable of preventing a decrease in quantum efficiency, and an electronic apparatus using this imaging device. The imaging device of the present disclosure includes multiple photoelectric conversion sections provided for respective pixels and each having a first end portion on a light incident side and a second end portion on a side opposite to the first end portion, a first member disposed along a boundary of each of the multiple photoelectric conversion sections in a first direction that extends from the first end portion to the second end portion, and a second member provided between each of the multiple photoelectric conversion sections and the first member and at the first end portion, the second member containing a material with a lower refractive index than that of the photoelectric conversion sections.
    Type: Application
    Filed: March 30, 2022
    Publication date: September 12, 2024
    Applicant: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventor: Mizuki ONO
  • Publication number: 20240304649
    Abstract: There is provided a solid-state imaging device including first, second, and third substrates stacked in this order. The first substrate includes a first semiconductor substrate and a first wiring layer. A pixel unit is formed on the first semiconductor substrate. The second substrate includes a second semiconductor substrate and a second wiring layer. The third substrate includes a third semiconductor substrate and a third wiring layer. A first coupling structure couples two of the first, second, and third substrates to each other includes a via. The via has a structure in which electrically-conductive materials are embedded in one through hole and another through hole, or a structure in which films including electrically-conductive materials are formed on inner walls of the through holes. The one through hole exposes a first wiring line in one of the wiring layers. The other through hole exposes a second wiring line another wiring layer.
    Type: Application
    Filed: May 20, 2024
    Publication date: September 12, 2024
    Applicant: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Takatoshi KAMESHIMA, Hideto HASHIGUCHI, Ikue MITSUHASHI, Hiroshi HORIKOSHI, Reijiroh SHOHJI, Minoru ISHIDA, Tadashi IIJIMA, Masaki HANEDA
  • Patent number: 12085455
    Abstract: In a device that measures biopotentials of cells in a solution, the solution is controlled at a constant temperature. A measurement device includes a substrate, a sensing control circuit, a temperature sensor, a front surface side heat radiating unit, a back surface side heat radiating unit, and a temperature control unit. A plurality of electrodes each detecting a potential in the solution is arranged on the front surface of the substrate. The sensing control circuit is arranged on the substrate and controls detection of potentials at the plurality of electrodes. The temperature sensor is arranged on the substrate and detects a temperature of the solution. The front surface side heat radiating unit is arranged on the front surface side of the substrate and radiates heat. The back surface side heat radiating unit is arranged on the back surface side that is a surface different from the front surface of the substrate, and radiates heat.
    Type: Grant
    Filed: August 6, 2019
    Date of Patent: September 10, 2024
    Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventor: Masataka Maehara
  • Patent number: 12088005
    Abstract: An antenna device and a wireless communication apparatus capable of improving performance are provided. The antenna device includes a first antenna element and a second antenna element disposed on the side of one surface of the first antenna element. The first antenna element includes a first glass substrate and a first patch antenna provided on the first glass substrate. The second antenna element includes a second glass substrate and a second patch antenna provided on the second glass substrate. The shape of at least one of the first patch antenna and the second patch antenna in a plan view is a rectangle. Contours of one or more of four corners of the rectangle include a curved line or a plurality of obtuse angles in a plan view.
    Type: Grant
    Filed: September 28, 2020
    Date of Patent: September 10, 2024
    Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventor: Takahiro Igarashi
  • Patent number: 12087049
    Abstract: An information processing device and an information processing method capable of reducing an information processing amount of an application processor that recognizes a subject from an input image are provided. An information processing device according to the present disclosure includes an acquisition unit, a generation unit, and an output unit. From an imaging unit that captures an image and generates image data, the acquisition unit acquires the image data. The generation unit generates, from the image data acquired by the acquisition unit, metadata to assist an application processor that executes processing related to the image. The output unit outputs the metadata generated by the generation unit to the application processor.
    Type: Grant
    Filed: July 9, 2020
    Date of Patent: September 10, 2024
    Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventor: Kyoji Yokoyama
  • Patent number: 12088934
    Abstract: To suppress occurrence of a delay in detection of a valid address event to be originally detected. An image pickup element includes a plurality of pixels (100), a pixel address event detection unit (120), a region address event detection unit (320), and a pixel selection unit (310). The pixel (100) includes a photoelectric conversion unit (110) that performs photoelectric conversion of incident light. The pixel address event detection unit (120) is arranged in each pixel and detects a pixel address event that is an address event of a pixel itself. The pixel address event is detected based on a change amount of charge generated by the photoelectric conversion. The region address event detection unit (320) detects a region address event that is an address event in a predetermined region. The region address event is detected based on a change in a charge amount generated by the photoelectric conversion in a plurality of pixels in the predetermined region among the plurality of pixels.
    Type: Grant
    Filed: July 2, 2021
    Date of Patent: September 10, 2024
    Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventor: Shin Kitano
  • Patent number: 12087474
    Abstract: A cable includes a first shield portion that includes at least one or more lines for transmitting a signal or electric power and that is provided on the outer side of the lines, a first layer that is provided in such a manner as to cover an outer circumference of the first shield portion and that includes a member that absorbs radio waves, a second shield portion that is provided on an outer side of the first layer, a second layer that is provided in such a manner as to cover an outer circumference of the second shield portion and that includes a member that absorbs radio waves, and insulating resin that covers an outer side of the second layer.
    Type: Grant
    Filed: September 15, 2020
    Date of Patent: September 10, 2024
    Assignee: Sony Semiconductor Solutions Corporation
    Inventors: Yoshitaka Yoshino, Makoto Makishima, Taihei Satou
  • Patent number: RE50134
    Abstract: The present technology relates to a semiconductor device and a method of manufacturing the semiconductor device that enable prevention of generation of tape scraps from the dicing tape during dicing, and an electronic apparatus. When a semiconductor substrate on which a protective film for protecting a circuit surface is formed is divided, dicing is performed so as to form a portion in which the section width of the semiconductor substrate differs from the section width of the protective film. The present technology can be applied to a wafer level CSP manufacturing process and the like, for example.
    Type: Grant
    Filed: November 24, 2021
    Date of Patent: September 17, 2024
    Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventor: Shogo Ono