Patents Assigned to Sony Semiconductor Solutions Corporations
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Patent number: 12087794Abstract: Provided is a solid-state imaging device capable of further improving reliability of a solid-state imaging device and further reducing manufacturing cost. Provided is a solid-state imaging device including a second semiconductor substrate provided with a photoelectric conversion unit and a second element, a second insulating layer, a first semiconductor substrate provided with a first element, and a first insulating layer arranged in this order from a light incident side, and including a groove formed on the first semiconductor substrate, in which the groove has a first side wall and a second side wall, and a part of at least one side wall of the first side wall or the second side wall extends in an oblique direction with respect to a surface of the first semiconductor substrate on the light incident side.Type: GrantFiled: October 15, 2019Date of Patent: September 10, 2024Assignee: Sony Semiconductor Solutions CorporationInventor: Katsunori Hiramatsu
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Patent number: 12087796Abstract: An imaging device including: pixel area and a peripheral area that lies outside the pixel area; light receiving element provided in the pixel area; circuit board provided in the pixel area and the peripheral area, the circuit board including a semiconductor substrate and a multilayer wiring layer, the multilayer wiring layer being provided between the semiconductor substrate and the light receiving element; first wiring line provided in the multilayer wiring layer, the first wiring line being electrically coupled to the light receiving element; a protective member that is opposed to the circuit board, the protective member and the circuit board sandwiching the light receiving element; and an extended wiring section provided between the semiconductor substrate and the protective member in the peripheral area, one end of the extended wiring section being open and another end of the extended wiring section being electrically coupled to the first wiring line.Type: GrantFiled: February 8, 2019Date of Patent: September 10, 2024Assignee: Sony SemiConductor Solutions CorporationInventor: Susumu Ooki
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Patent number: 12089457Abstract: A display device includes: a first substrate that includes a semiconductor material layer in which a transistor has been formed, the transistor driving a light-emitting part that is included in a pixel; and a second substrate that includes a predetermined circuit. The first substrate and the second substrate are stuck together in such a way that respective joint surfaces face each other. A pad opening is provided from a side of the first substrate to face a pad electrode that has been provided on a side of the respective joint surfaces, in such a way that the pad electrode is exposed on a bottom surface.Type: GrantFiled: January 28, 2020Date of Patent: September 10, 2024Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATIONInventor: Shinichi Arakawa
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Patent number: 12085410Abstract: A distance measurement accuracy is improved. A solid-state imaging device according to an embodiment includes a pixel array part in which a plurality of pixels is arranged in a matrix, in which each of the pixels includes a plurality of photoelectric conversion units that each photoelectrically converts incident light to generate a charge, a floating diffusion region that accumulates the charge, a plurality of transfer circuits that transfer the charge generated in each of the plurality of photoelectric conversion units to the floating diffusion region, and a first transistor that causes a pixel signal of a voltage value corresponding to a charge amount of the charge accumulated in the floating diffusion region to appear in a signal line.Type: GrantFiled: April 27, 2020Date of Patent: September 10, 2024Assignee: Sony Semiconductor Solutions CorporationInventors: Sozo Yokogawa, Yusuke Moriyama, Nobuhiro Kawai, Yuhi Yorikado, Fumihiko Koga, Yoshiki Ebiko, Suzunori Endo, Hayato Wakabayashi
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Patent number: 12088927Abstract: An imaging device (1) according to the present disclosure includes a plurality of image sensors (sensors 11, 12, 13, and 14) that output detection results to a processing device by sharing one signal line. At least one of the image sensors (sensors 11, 12, 13, and 14) includes an imaging unit (21), a recognition unit (23), and an output unit (25). The imaging unit (21) captures an image to generate image data. The recognition unit (23) recognizes a predetermined target object from the image data. The output unit (25) outputs the recognition result of the recognition unit (23) to the processing device in a period that does not overlap with a period in which the detection result of each of other image sensors is output using the signal line in one frame period in which the imaging unit (21) captures one image.Type: GrantFiled: April 28, 2020Date of Patent: September 10, 2024Assignee: Sony Semiconductor Solutions CorporationInventor: Kazuyuki Okuike
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Patent number: 12085842Abstract: Provided is an imaging device including a light reception section that includes a plurality of pixels each performing photoelectric conversion and a plurality of on-chip lenses that is provided on a light incident side of the light reception section at a pitch less than a length of a wavelength on a longest wavelength side of a wavelength region of light to be received by the light reception section. The imaging device further includes a transparent substrate that is provided on a light incident side of the on-chip lenses.Type: GrantFiled: January 9, 2020Date of Patent: September 10, 2024Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATIONInventor: Yoichi Ootsuka
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Patent number: 12089427Abstract: The present technology relates to an imaging element and an electronic apparatus which make it possible to acquire a variety of information regarding a subject including polarization information. Included are an organic photoelectric conversion film that has a light-transmitting property, is oriented in a predetermined axial direction, and includes a step; an upper electrode arranged on a light incident surface side of the organic photoelectric conversion film; and a lower electrode arranged on a side of the organic photoelectric conversion film facing the upper electrode. Protrusions and recesses are formed on the light incident surface side of the organic photoelectric conversion film. An accumulation layer that accumulates an electric charge converted by the organic photoelectric conversion film is included between the organic photoelectric conversion film and the lower electrode, and the step is formed depending on the presence or absence of the accumulation layer.Type: GrantFiled: July 12, 2019Date of Patent: September 10, 2024Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATIONInventors: Nanako Kawaguchi, Tetsuji Yamaguchi, Masashi Nakata
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Patent number: 12088780Abstract: An imaging apparatus including (A) an imaging lens; and (B) an image sensor array in which a plurality of image sensor units are arrayed, wherein, a single image sensor unit includes a single microlens and a plurality of image sensors light passing through the imaging lens and reaching each image sensor unit passes through the microlens and forms an image on the plurality of image sensors constituting the image sensor unit, an inter-unit light shielding layer is formed between the image sensor units themselves, and a light shielding layer is not formed between the image sensor units which constitute the image sensor unit.Type: GrantFiled: July 3, 2023Date of Patent: September 10, 2024Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATIONInventor: Tomohiro Yamazaki
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Patent number: 12088061Abstract: A light source device including a light emitting unit in which multiple light emitting elements including vertical cavity surface emitting lasers are arranged is intended to curb temperature rise. A light source device according to the present technology includes a light emitting unit in which multiple light emitting elements including vertical cavity surface emitting lasers are arranged, and a driving unit that, regarding the light emitting element in the light emitting unit, causes multiple light emitting elements to be caused to emit light in a light emission target period to emit light in a time-divided manner in the light emission target period. By adopting time-division light emission, the number of light emitting elements that are caused to emit light simultaneously is reduced.Type: GrantFiled: June 14, 2019Date of Patent: September 10, 2024Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATIONInventors: Mitsushi Tabata, Takashi Masuda
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Patent number: 12088936Abstract: An imaging device includes pixel circuit including a generation unit generating a voltage; a capacitor having a first electrode to which the voltage is applied; a first amplifier having a first input terminal, connected to a second electrode of the capacitor, and a second input terminal, to which a first reference voltage is applied to, to output a result by comparing the voltage with the first reference voltage; a switch unit controlling a connection between the output of the first amplifier and the first input terminal; and a second amplifier having a third input terminal, to which the output of the first amplifier is connected, and a fourth input terminal, to which a second reference voltage is applied, to output a result by comparing the voltage with the second reference voltage, in which a first gain of the first amplifier is lower than a second gain of the second amplifier.Type: GrantFiled: June 28, 2021Date of Patent: September 10, 2024Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATIONInventors: Terukazu Tanaka, Atsumi Niwa
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Patent number: 12087798Abstract: An imaging device includes a plurality of imaging elements 10. Each of the imaging elements 10 includes: a plurality of photoelectric conversion regions PD arrayed in a first direction and a second direction; a floating diffusion layer FD shared by the photoelectric conversion regions PD; a transfer control electrode TG; a first charge transfer control electrode CG that controls charge transfer between the photoelectric conversion regions PD arrayed in the first direction; and a second charge transfer control electrode CG that controls charge transfer between the photoelectric conversion regions PD arrayed in the second direction.Type: GrantFiled: July 9, 2020Date of Patent: September 10, 2024Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATIONInventors: Katsumi Yamagishi, Shinya Itoh
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Patent number: 12087795Abstract: A solid-state imaging device is provided that includes a first substrate including at least a first electrode, a first modification layer, a first low-permittivity layer formed on the first modification layer, and a first joint surface where the first electrode and the first modification layer are exposed; and a second substrate including at least a second electrode, a second modification layer, a second low-permittivity layer formed on the second modification layer, and a second joint surface where the second electrode and the second modification layer are exposed. The first modification layer has higher hydrophilicity than the first low-permittivity layer. The second modification layer has higher hydrophilicity than the second low-permittivity layer. The first substrate and the second substrate form a laminate structure and are electrically connected by bonding the first joint surface and the second joint surface.Type: GrantFiled: April 6, 2020Date of Patent: September 10, 2024Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATIONInventor: Hideto Hashiguchi
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Patent number: 12087799Abstract: The present disclosure relates to a solid-state imaging element and an electronic device capable of increasing the capacitance of a charge holding unit. The solid-state imaging element includes a pixel including a photodiode, an FD that accumulates charges generated in the photodiode, and a charge holding unit that is connected in parallel with the FD. The charge holding unit includes a wiring capacitance formed by parallel running of a first wiring connected to a first potential and a second wiring connected to a second potential different from the first potential. The present disclosure can be applied to a solid-state imaging element that performs global shutter type imaging.Type: GrantFiled: September 5, 2019Date of Patent: September 10, 2024Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATIONInventors: Yusuke Otake, Toshifumi Wakano, Takuro Murase
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Patent number: 12088783Abstract: An object of the present invention is to reduce time required for calibration between gains in a level control circuit. The level control circuit performs, using any of first and second gains that differ from each other, level control of an analog signal output to a vertical signal line that corresponds to each column of a pixel array. An analog-digital converter converts the level-controlled analog signal into a digital signal. A test signal generating unit generates first and second test signals that differ from each other. A gain ratio acquiring unit simultaneously supplies one of the vertical signal lines with the first test signal and supplies another of the vertical signal lines with the second test signal to acquire a gain ratio between the first gain and the second gain of the level control circuit.Type: GrantFiled: March 11, 2021Date of Patent: September 10, 2024Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATIONInventor: Hidenori Tabata
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Patent number: 12089502Abstract: Provided is a magnetoresistance effect element configured by laminating a first electrode, a magnetization pinned layer having a fixed magnetization direction, a first insulating layer, a magnetization free layer having a variable magnetization direction, a second insulating layer, and a second electrode in order, in which the magnetization pinned layer includes a first magnetic body provided on the first electrode, and a second magnetic body provided on the first magnetic body via a non-magnetic metal layer, at least any of the first magnetic body and the second magnetic body is configured by providing a magnetic layer directly above a non-magnetic layer, and either the non-magnetic layer or the magnetic layer is formed in a multilayer structure in which different materials are alternately laminated.Type: GrantFiled: January 8, 2020Date of Patent: September 10, 2024Assignee: Sony Semiconductor Solutions CorporationInventor: Eiji Kariyada
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Patent number: 12088945Abstract: In one example, an imaging device includes stacked first and second substrates. The first substrate has an array of light receiving pixels divisible into pixel blocks and the second substrate has a pixel control portion that controls the pixels. The first substrate includes a first wiring line that transmits a first voltage, a second wiring line that transmits a second voltage, and a fault detection circuit that detects a wiring fault for each pixel block. The fault detection circuit detects a wiring fault by connecting wiring lines corresponding to pixel columns or pixel rows in series in each pixel block, connecting one of the ends of a wiring chain connected in series in each pixel block to the first wiring line, connecting the other end to the second wiring line, and detecting a wiring fault based on a potential at an intermediate position of the wiring chain.Type: GrantFiled: September 27, 2023Date of Patent: September 10, 2024Assignee: Sony Semiconductor Solutions CorporationInventor: Luonghung Asakura
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Patent number: 12088292Abstract: A semiconductor device according to the present disclosure includes: a first output terminal and a second output terminal; a first driver that has a first positive terminal coupled to the first output terminal and a first negative terminal coupled to the second output terminal, and outputs a differential signal corresponding to a first signal from the first positive terminal and the first negative terminal; and a second driver that has a second positive terminal coupled to the second output terminal and a second negative terminal coupled to the first output terminal, and outputs a differential signal corresponding to the first signal from the second positive terminal and the second negative terminal.Type: GrantFiled: March 25, 2021Date of Patent: September 10, 2024Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATIONInventors: Junichiro Shirai, Hisashi Owa
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Patent number: 12088942Abstract: An imaging device that includes a plurality of pixels each including a photoelectric conversion element and arranged in an array of matrix, a control line group including a plurality of control lines for controlling each of pixels aligned in a row direction, each arranged in each of rows of the array, and a plurality of reading lines (VSL) arranged in each of columns for transferring a pixel signal read from each of pixels aligned in a column direction of the array, wherein the plurality of pixels includes a first pixel controlled by a control signal supplied from a first control line group including control lines in a first number among a plurality of control lines included in the control line group in each of pixels aligned in the row direction in at least one of rows of the array.Type: GrantFiled: May 28, 2021Date of Patent: September 10, 2024Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATIONInventor: Luonghung Asakura
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Publication number: 20240297192Abstract: The present disclosure relates to a solid-state image capturing device and a manufacturing method as well as an electronic device that are capable of achieving better image quality. A light blocking portion is provided along wall surfaces of a slit defined in an insulating film between adjacent pixels that is provided in covering relation to a light receiving surface of a semiconductor substrate having an element-separating structure between a plurality of pixels. A low-refractive-index wall is provided between light blocking portions between adjacent ones of the pixels and provided between color filters provided above the insulating film. The present technology can be applied to a back-irradiated CMOS image sensor, for example.Type: ApplicationFiled: February 10, 2022Publication date: September 5, 2024Applicant: SONY SEMICONDUCTOR SOLUTIONS CORPORATIONInventor: Shigehiro IKEHARA
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Publication number: 20240297196Abstract: The present technology relates to a semiconductor device and an imaging device capable of preventing the film thickness of wiring from becoming uneven. The semiconductor device includes: a substrate; a wiring layer on a first surface of the substrate; a first wiring provided on a second surface opposite the first surface of the substrate; and a through electrode that connects a second wiring in the wiring layer and the first wiring and penetrates the substrate, in which a part of the first wiring has a region in an uneven shape. The uneven shape is a non-through hole that does not penetrate the substrate. The present technology can be applied to, for example, a semiconductor device having a structure in which a plurality of chips is stacked and wiring layers are connected to each other.Type: ApplicationFiled: January 21, 2022Publication date: September 5, 2024Applicant: SONY SEMICONDUCTOR SOLUTIONS CORPORATIONInventor: Yuriko YAMANO