Patents Assigned to Southern University of Science and Technology
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Publication number: 20250209051Abstract: A vector database with 3-D fusion fuses processor into storage, i.e., it lowers the processing circuit (i.e., vector-distance calculating circuit, or VDCC) down to the lowest level of the storage circuit (i.e., storage arrays). Moreover, the VDCC and the storage arrays are 3-D integrated. By greatly reducing granularity and using massive parallelism, the present invention empowers accurate and fast brute-force search of the high-dimensional and large-scale vector database.Type: ApplicationFiled: December 24, 2024Publication date: June 26, 2025Applicants: Southern University of Science and Technology, HangZhou HaiCun Information Technology Co., Ltd.Inventor: Guobiao ZHANG
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Publication number: 20250200217Abstract: A graphics processing unit (GPU) task is executed in a confidential compute architecture. GPU software in a non-secure world configures, based on task code and a cache description of a GPU task, a stub data structure including cache areas allocated based on the cache description and metadata indicating each cache area. In a realm segment in a memory, a root world root monitor configures a real data structure corresponding to the stub data structure, and stores to-be-processed confidential data. The root monitor updates a granule protection table (GPT) table so that based on an updated GPT table, a target segment storing the metadata and the task code is accessible to a GPU and has realm world permission for all other objects. The root monitor modifies a target mapping relationship so that the GPU executes the GPU task by using the target segment and the real data structure.Type: ApplicationFiled: December 13, 2024Publication date: June 19, 2025Applicants: Alipay (Hangzhou) Information Technology Co., Ltd., Southern University Of Science And TechnologyInventors: Fengwei Zhang, Chenxu Wang, Yunjie Deng, Shoumeng Yan, Zhengyu He
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Patent number: 12278099Abstract: The present disclosure provides an ion trap apparatus and a saddle point moving method for the ion trap apparatus. The ion trap apparatus comprises: an insulating base material, the insulating base material being a concave structure; and at least two segments of arc-shaped metal reflective electrodes, wherein the arc-shaped metal reflective electrodes cover the front side of the insulating base material, the front side being a concave surface; each segment of the arc-shaped metal reflective electrodes is electrically insulated; and each segment of the arc-shaped metal reflective electrodes is used to receive a radio frequency voltage which has the same frequency, the same phase and an adjustable amplitude. The apparatus may achieve ideal imaging while improving the light collection efficiency, thereby improving the success rate of the preparation of ion-photon entangled states.Type: GrantFiled: June 17, 2022Date of Patent: April 15, 2025Assignee: Southern University of Science and TechnologyInventors: Zhao Wang, Qinglin Ma, Jiayu Guo, Benran Wang, Mingshen Li, Yu Wang
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Publication number: 20250075020Abstract: A water-retaining material, including: a polymer chain segment provided by a hydrophilic polymer; and a proton carrier group grafted to the polymer chain segment. The polymer chain segment contains a hydrophilic group. A method for preparing a water-retaining material, includes: performing, in a reaction system including an activator and a catalyst, a grafting reaction between a hydrophilic polymer and a proton carrier compound to yield the water-retaining material. The water-retaining material contains a polymer chain segment containing a hydrophilic group. A water-retaining proton exchange membrane, includes a matrix. The matrix is doped with a water-retaining material; and the water-retaining material including the above water-retaining material.Type: ApplicationFiled: December 30, 2022Publication date: March 6, 2025Applicant: Southern University of Science and TechnologyInventors: Jiexin ZOU, Min WANG, Haijiang WANG
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Patent number: 12214424Abstract: Disclosed are a high-throughput preparation device for metal fiber based on multi powder and a method for preparing a metal fiber using the device. The high-throughput preparation device includes a metal powder conveying system, a metal powder mixing system, a metal powder melting system and a metal fiber forming system which are connected in sequence, where the metal powder melting system includes an induction powder melting device and a laser powder melting device which are independently disposed. The method for preparing a metal fiber using the high-throughput preparation device includes four steps: powder conveying, powder mixing, melting and forming.Type: GrantFiled: January 7, 2020Date of Patent: February 4, 2025Assignee: Southern University of Science and TechnologyInventors: Fu Zhao, Xiaodong Xiang, Xianglin Wang, Guang Feng
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Publication number: 20240384433Abstract: The present invention provides a method for scalable fabrication of ultra-flat polycrystalline diamond membranes, the method comprising: (1) performing chemical vapor deposition on a growth substrate having diamond seeds thereon to grow a polycrystalline diamond membrane, wherein an exposed surface of the polycrystalline diamond membrane is a grown surface having a first roughness; and a surface bonded to the growth substrate is a buried surface; (2) bonding the grown surface to a transfer substrate using an adhesive; and (3) removing the growth substrate to expose the buried surface of the polycrystalline diamond membrane, wherein the buried surface has a second roughness after exposure, and the second roughness is less than the first roughness.Type: ApplicationFiled: May 14, 2024Publication date: November 21, 2024Applicants: The University of Hong Kong, Dongguan Institute of Opto-electronics, Peking University, Southern University of Science and TechnologyInventors: Zhiqin CHU, Jixiang Jing, Qi WANG, Zhongqiang WANG, Kwai Hei LI
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Patent number: 12093781Abstract: Provided are a method for coupling any two qubits from among multiple superconducting qubits and a system thereof, which are applied to an occasion provided with a multi-superconducting-qubit array and a magnetic film material capable of implementing spin waves. The method includes: disposing a magnetic film material below a multi-superconducting-qubit array; forming, through a combination of magnetization directions of magnetic domains in the magnetic film material, multiple channels through which the spin waves pass; disposing multiple qubits of the multi-superconducting-qubit array above the multiple channels through which the spin waves pass correspondingly to implement a coupling between each qubit and the spin waves; and disposing at least two qubits above one spin wave channel and implementing a coupling between the at least two qubits through the coupling between each qubit and the spin waves.Type: GrantFiled: March 5, 2019Date of Patent: September 17, 2024Assignees: Southern University of Science and Technology, Fudan UniversityInventors: Dapeng Yu, Jiansheng Wu, Jiang Xiao, Song Liu, Shaojie Yuan
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Publication number: 20240295482Abstract: An opto chip for detecting a physical parameter of a liquid sample, comprising an optical structure monolithically integrated with a substrate layer and a functional layer, wherein the substrate layer is light-transmissive and configured to have an upper surface for receiving a droplet of the liquid sample and a lower surface bonded to the functional layer; and the functional layer comprises a light-emitting region and a light-detecting region with the light-emitting region being configured to emit measurement light. The light-detecting region is configured to receive reflected light derived from the measurement light and a signal reflecting the change in intensity thereof is converted into a photocurrent signal. A viscometer and detection method operated using the same opto chip technique. The need for complex external optical calibration is thus eliminated, making the viscometer easier to operate and reducing the overall size of the device.Type: ApplicationFiled: February 27, 2024Publication date: September 5, 2024Applicants: Versitech Limited, Southern University of Science and TechnologyInventors: Zhiqin Chu, Yumeng Luo, Kwai Hei Li
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Patent number: 12063794Abstract: High-density three-dimensional (3-D) vertical memory (3D-MV) includes lightly-doped-segment (LDS) 3D-MV and non-circular-hole (NCH) 3D-MV. The preferred LDS 3D-MV takes advantage of longitudinal space, instead of lateral space, to guarantee normal write operation. On the other hand, the lateral cross-section of the memory hole of the preferred NCH 3D-MV includes at least two intersecting pairs of parallel sides, with each pair formed through a single DUV exposure and having a minimum spacing <50 nm.Type: GrantFiled: May 31, 2021Date of Patent: August 13, 2024Assignee: Southern University of Science and TechnologyInventor: Guobiao Zhang
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Publication number: 20240240311Abstract: The present invention provides a scalable method for achieving shape control of diamond micro-nanoparticles, comprising air oxidizing diamond micro-nanoparticles grown by chemical vapor deposition and/or diamond micro-nanoparticles grown by high pressure and high temperature. The present invention achieves the controllable morphology transformation of diamond micro-nanoparticles via air oxidation treatment. It has been demonstrated that a series of unique shapes, including “flower” shaped, “hollow” structured, “pyramid” patterned on the surface, and “boomerang” shaped, can be achieved by altering the air oxidation parameters, i.e., temperature and duration. The scalable production of these differently shaped diamond micro-nanoparticles represents a significant scientific breakthrough together with a high commercial value.Type: ApplicationFiled: January 18, 2024Publication date: July 18, 2024Applicants: Versitech Limited, Southern University of Science and Technology, Dongguan Institute of Opto-electronics, Peking UniversityInventors: Zhiqin CHU, Tongtong ZHANG, Qi WANG, Zhongqiang WANG, Kwai Hei LI
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Publication number: 20240047964Abstract: The present invention discloses an ESD protection circuit comprising resistor vias. It comprises a plurality of ESD devices connected in parallel, with each ESD device comprising a resistor and a two-terminal switch (e.g. an OTS component) connected in series. The resistor is formed in a resistor via disposed vertically with the two-terminal switch and filled with at least a conductive material with high resistivity.Type: ApplicationFiled: October 18, 2023Publication date: February 8, 2024Applicant: Southern University of Science and TechnologyInventors: Guobiao ZHANG, Zhitang SONG, Hongyu YU, Sannian SONG
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Patent number: 11891728Abstract: Provided are a SiC/ZrC composite fiber, a preparation method and use thereof. The SiC/ZrC composite fiber has a diameter of 10 to 70 ?m. The method includes mixing liquid polycarbosilane with a zirconium-containing polymer to obtain a hybrid spinning solution, and then performing electrospinning to obtain a SiC/ZrC composite fiber precursor, crosslinking and thermally treating the SiC/ZrC composite fiber precursor in a protective atmosphere to obtain the SiC/ZrC composite fiber. The SiC/ZrC composite fiber is continuous and uniform, has an adjustable diameter, and thus has outstanding tensile strength and breaking strength and excellent high-temperature resistance. Without use of any organic solvent or spinning agent, the method achieves short process flow and high yield, indicating wide application prospects.Type: GrantFiled: July 27, 2020Date of Patent: February 6, 2024Assignee: Southern University of Science and TechnologyInventors: Xiaofei Wang, Mingyu Zhu, Yulei Li, Fuzeng Ren, Yusheng Zhao
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Patent number: 11824347Abstract: The present invention discloses parallel, series and hybrid ESD protection circuits. A preferred parallel ESD protection circuit comprises a plurality of ESD devices connected in parallel, with each comprising a resistor and an OTS component connected in series. A preferred series ESD protection circuit comprises a plurality of ESD devices connected in series, wherein the OTS components in all ESD devices are disposed on a same level. A preferred hybrid ESD protections circuit comprises ESD devices connected in parallel, as well as in series.Type: GrantFiled: April 14, 2022Date of Patent: November 21, 2023Assignee: Southern University of Science and TechnologyInventors: Guobiao Zhang, Zhitang Song, Hongyu Yu, Sannian Song
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Publication number: 20230198003Abstract: The present application provides a composite solid state electrolyte slurry, a film, a preparation method, and an all solid state battery. The method includes: adding a polymer into a non-polar solvent and mixing the polymer and the non-polar solvent to obtain a sol; adding a solid state electrolyte powder and a lithium salt solution into the sol and mixing the solid state electrolyte powder, the lithium salt solution and the sol to obtain a composite solid state electrolyte slurry; the non-polar solvent is an organic solvent that does not react with the solid state electrolyte powder; the high shear force of the sol is used to disperse the solid state electrolyte powder and lithium salt solution, thereby the solid state electrolyte powder and the lithium salt solution are uniformly dispersed in the sol.Type: ApplicationFiled: June 15, 2021Publication date: June 22, 2023Applicant: Southern University of Science and TechnologyInventors: Juncao BIAN, Zhouguang LU, Yusheng ZHAO
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Publication number: 20230110197Abstract: The present application provides a solid state electrolyte, a preparation method thereof, and an all solid state battery. Multi-element co-doping of lithium-rich, sodium-rich, potassium-rich anti-perovskite electrolytes on lithium sites or sodium sites or potassium sites, oxygen sites and halogen sites effectively improves the ionic conductivity of the anti-perovskite solid state electrolyte.Type: ApplicationFiled: June 15, 2021Publication date: April 13, 2023Applicant: Southern University of Science and TechnologyInventors: Juncao BIAN, Zhouguang LU, Yusheng ZHAO
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Patent number: 11616030Abstract: A method for making a three-dimensional (3-D) module includes the steps of: A) forming a laminate of alternate ceramic tape layers and internal electrode layers on a substrate; B) etching said laminate to form first and second capacitor stacks at said first and second locations; C) firing said first and second capacitor stacks integrally; D) forming first and second pairs of external electrodes on said first and second capacitor stacks, respectively.Type: GrantFiled: November 30, 2021Date of Patent: March 28, 2023Assignee: Southern University of Science and TechnologyInventors: Guobiao Zhang, Hongyu Yu, Shengming Zhou, Yuejin Guo, Kai Chen, Yida Li, Jun Lan
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Publication number: 20230044721Abstract: A cross-point memory includes a plurality of memory devices, with each device comprising a memory layer between first and second address lines. In one preferred embodiment, the memory layer comprises an OTS (Ovonic Threshold Switch) film and an antifuse film. In another preferred embodiment, the memory layer comprises an OTS film having a first switch voltage (i.e. forming voltage Vform) greater than all subsequent switch voltages (i.e. threshold voltage Vth).Type: ApplicationFiled: August 4, 2022Publication date: February 9, 2023Applicant: Southern University of Science and TechnologyInventors: Guobiao ZHANG, Zhitang SONG
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Publication number: 20220392827Abstract: Provided are a heat dissipation structure and a heat dissipation system. The heat dissipation structure includes a heat dissipation channel and a plurality of heat dissipation fins. The plurality of heat dissipation fins are arranged on at least one side of the heat dissipation channel. Heat dissipation fins arranged on the same side of the heat dissipation channel are arranged along an extension direction of the heat dissipation channel. The heat dissipation channel and the plurality of heat dissipation fins are each formed as a cavity structure. Each heat dissipation fin includes a first end and a second end arranged opposite to each other. The first end is a closed end, and the second end is an open end. The second end communicates with the heat dissipation channel.Type: ApplicationFiled: June 10, 2020Publication date: December 8, 2022Applicant: Southern University of Science and TechnologyInventors: Xiaodong Xiang, Tai Quan, Mei Shen, Yuejin Guo, Guobiao Zhang, Fengwei An
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Publication number: 20220337052Abstract: The present invention discloses parallel, series and hybrid ESD protection circuits. A preferred parallel ESD protection circuit comprises a plurality of ESD devices connected in parallel, with each comprising a resistor and an OTS component connected in series. A preferred series ESD protection circuit comprises a plurality of ESD devices connected in series, wherein the OTS components in all ESD devices are disposed on a same level. A preferred hybrid ESD protections circuit comprises ESD devices connected in parallel, as well as in series.Type: ApplicationFiled: April 14, 2022Publication date: October 20, 2022Applicant: Southern University of Science and TechnologyInventors: Guobiao ZHANG, Zhitang SONG, Hongyu YU, Sannian SONG
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Patent number: D1004603Type: GrantFiled: October 20, 2021Date of Patent: November 14, 2023Assignee: Southern University of Science and TechnologyInventors: Xuan Song, Chuang Yang, Zipei Fan, Renhe Jiang, Zhiwen Zhang, Quanjun Chen, Ryosuke Shibasaki