Patents Assigned to SPTS Technologies Limited
  • Publication number: 20180218888
    Abstract: A plasma etching apparatus includes first, second and third chambers, and a plasma generation device. An inner cross-sectional area and shape of the second chamber interior substantially corresponds to the upper surface of a substrate, and a substrate support is disposed so that, in use, the substrate is substantially in register with the interior of the second chamber, and the upper surface of the substrate is positioned at a distance of 80 mm or less from the interface between the second and third chambers.
    Type: Application
    Filed: May 23, 2014
    Publication date: August 2, 2018
    Applicant: SPTS TECHNOLOGIES LIMITED
    Inventor: MAXIME VARVARA
  • Patent number: 9972583
    Abstract: An article having a surface treated to provide a protective coating structure in accordance with the following method: vapor depositing a first layer on a substrate, wherein the first layer is a metal oxide adhesion layer selected from the group consisting of an oxide of a Group IIIA metal element, a Group IVB metal element, a Group VB metal element, and combinations thereof; vapor depositing a second layer upon the first layer, wherein the second layer includes a silicon-containing layer selected from the group consisting of silicon oxide, silicon nitride, and silicon oxynitride; and vapor depositing a third layer upon the second layer, wherein the third layer is a functional organic-comprising layer, wherein the functional organic-comprising layer is a SAM.
    Type: Grant
    Filed: August 5, 2013
    Date of Patent: May 15, 2018
    Assignee: SPTS Technologies Limited
    Inventors: Boris Kobrin, Nikunj Dangaria, Romuald Nowak, Michael T. Grimes
  • Patent number: 9957608
    Abstract: A composite shield assembly is for use in deposition apparatus defining a work piece location. The assembly includes a first shield element for position circumjacent the work piece location and a second shield element for extending around and carrying the first element. The thermal conductivity of the first element is greater than that of the second element, and the elements are arranged for intimate thermal contact.
    Type: Grant
    Filed: February 13, 2012
    Date of Patent: May 1, 2018
    Assignee: SPTS TECHNOLOGIES LIMITED
    Inventors: Clive Luca Widdicks, Ian Moncrieff
  • Patent number: 9945043
    Abstract: This invention relates to apparatus for electrochemical deposition onto the surface of a substrate. The apparatus includes an anode electrode 13 a support 12 for supporting the substrate 11 with its one surface 21 exposed at a location, the support 12 and the anode electrode 13 being relatively movable to alter the gap between the anode 13 and the location to define a chamber 23 between them and an electrical power source 18 with an ohmic contact to the seed layer 20 for creating a potential difference across the gap. The apparatus further includes a seal 14 for sealing with the seed layer 20 to define the fluid chamber 23; and the fluid inlet 16 and a fluid outlet 17 to the chamber 13.
    Type: Grant
    Filed: December 8, 2011
    Date of Patent: April 17, 2018
    Assignee: SPTS Technologies Limited
    Inventor: John Macneil
  • Patent number: 9903039
    Abstract: According to the invention an electrochemical deposition or polishing clamber including: a support for a substrate, the support having an in-use position; a housing having an interior surface and a fluid outlet pathway for removing an electrolyte from the chamber, wherein the fluid outlet pathway includes one or more slots which extend into the housing from at least one slotted opening formed in the interior surface; a seal for sealing the housing to a peripheral portion of a surface of a substrate position on the support in its in-use position; and a tilting mechanism for tilting the chamber in order to assist in removing electrolyte from the housing through the fluid outlet pathway.
    Type: Grant
    Filed: March 18, 2014
    Date of Patent: February 27, 2018
    Assignee: SPTS Technologies Limited
    Inventor: John MacNeil
  • Patent number: 9842772
    Abstract: A method is for etching a semiconductor substrate to reveal one or more features buried in the substrate. The method includes performing a first etch step using a plasma in which a bias power is applied to the substrate to produce an electrical bias, performing a second etch step without a bias power or with a bias power which is lower than the bias power applied during the first etch step, and alternately repeating the first and second etch steps.
    Type: Grant
    Filed: April 3, 2015
    Date of Patent: December 12, 2017
    Assignee: SPTS Technologies Limited
    Inventors: Jash Patel, Janet Hopkins
  • Patent number: 9803272
    Abstract: According to the invention there is a method of depositing SiO2 onto a substrate by pulsed DC reactive sputtering which uses a sputtering gas mixture consisting essentially of oxygen and krypton.
    Type: Grant
    Filed: November 4, 2014
    Date of Patent: October 31, 2017
    Assignee: SPTS TECHNOLOGIES LIMITED
    Inventors: Yun Zhou, Rhonda Hyndman, Stephen R Burgess
  • Patent number: 9783886
    Abstract: A plasma-enhanced chemical vapor deposition (PE-CVD) apparatus includes a chamber including a circumferential pumping channel, a substrate support disposed within the chamber, one or more gas inlets for introducing gas into the chamber, a plasma production device for producing a plasma in the chamber, and an upper and a lower element positioned in the chamber. The upper element is spaced apart from the substrate support to confine the plasma and to define a first circumferential pumping gap, and the upper element acts as a radially inward wall of the circumferential pumping channel. The upper and lower elements are radially spaced apart to define a second circumferential pumping gap which acts as an entrance to the circumferential pumping channel, in which the second circumferential pumping gap is wider than the first circumferential pumping gap.
    Type: Grant
    Filed: March 9, 2016
    Date of Patent: October 10, 2017
    Assignee: SPTS TECHNOLOGIES LIMITED
    Inventors: Daniel T Archard, Stephen R Burgess, Mark I Carruthers, Andrew Price, Keith E Buchanan, Katherine Crook
  • Patent number: 9728432
    Abstract: A method of degassing semiconductor substrates includes sequentially loading a plurality of semiconductor substrates into a degas apparatus, and degassing the semiconductor substrates in parallel, the degassing of each semiconductor substrate commencing at a different time related to the time at which the semiconductor substrate was loaded into the degas apparatus. The method further includes unloading a semiconductor substrate from the degas apparatus when the semiconductor substrate has been degassed, while semiconductor substrates which were loaded later in the sequence are still being degassed. The degassing of the semiconductor substrates is performed at pressure of less than 10?4 Torr, and the degas apparatus is pumped continuously during the degassing of the semiconductor substrates.
    Type: Grant
    Filed: November 24, 2015
    Date of Patent: August 8, 2017
    Assignee: SPTS TECHNOLOGIES LIMITED
    Inventors: Stephen R Burgess, Anthony Paul Wilby
  • Patent number: 9725805
    Abstract: A vapor phase deposition method and apparatus for the application of thin layers and coatings on substrates. The method and apparatus are useful in the fabrication of electronic devices, micro-electromechanical systems (MEMS), Bio-MEMS devices, micro and nano imprinting lithography, and microfluidic devices. The apparatus used to carry out the method provides for the addition of a precise amount of each of the reactants to be consumed in a single reaction step of the coating formation process. The apparatus provides for precise addition of quantities of different combinations of reactants during a single step or when there are a number of different individual steps in the coating formation process. The precise addition of each of the reactants in vapor form is metered into a predetermined set volume at a specified temperature to a specified pressure, to provide a highly accurate amount of reactant.
    Type: Grant
    Filed: June 2, 2006
    Date of Patent: August 8, 2017
    Assignee: SPTS Technologies Limited
    Inventors: Boris Kobrin, Romuald Nowak, Richard C. Yi, Jeffrey D. Chinn
  • Patent number: 9719166
    Abstract: Methods and related apparatus support a work piece during a physical vapor deposition. An aluminium support having a support surface coated with a heat absorbent coating is provided. The support is cooled to around 100° C. and a PVD process is performed such that, with cooling, the work piece temperature is between 350° C. and 450° C. The coating is inert and/or ultra-high voltage compatible.
    Type: Grant
    Filed: June 20, 2012
    Date of Patent: August 1, 2017
    Assignee: SPTS TECHNOLOGIES LIMITED
    Inventor: Stephen R Burgess
  • Patent number: 9670574
    Abstract: A method of depositing an aluminum film on a substrate includes placing the substrate on a support, depositing a first layer of aluminum onto the substrate with the substrate in an unclamped condition, clamping the substrate to the support and depositing a second layer of aluminum continuous with the first layer. The second layer is thicker than the first layer and the second layer is deposited at a substrate temperature of less than about 22° C.
    Type: Grant
    Filed: February 16, 2012
    Date of Patent: June 6, 2017
    Assignee: SPTS TECHNOLOGIES LIMITED
    Inventors: Rhonda Hyndman, Stephen Burgess
  • Patent number: 9640370
    Abstract: A method is for etching the whole width of a substrate to expose buried features. The method includes etching a face of a substrate across its width to achieve substantially uniform removal of material; illuminating the etched face during the etch process; applying edge detection techniques to light reflected or scattered from the face to detect the appearances of buried features; and modifying the etch in response to the detection of the buried feature. An etching apparatus for etching substrate across its width to expose buried is also disclosed.
    Type: Grant
    Filed: March 4, 2014
    Date of Patent: May 2, 2017
    Assignee: SPTS Technologies Limited
    Inventor: Oliver James Ansell
  • Patent number: 9601341
    Abstract: A method of etching a feature in a substrate includes forming a mask structure over the substrate, the mask structure defining at least one re-entrant opening, etching the substrate through the opening to form the feature using a cyclic etch and deposition process, and removing the mask.
    Type: Grant
    Filed: December 19, 2014
    Date of Patent: March 21, 2017
    Assignee: SPTS Technologies Limited
    Inventor: Huma Ashraf
  • Patent number: 9576824
    Abstract: In an apparatus for etching a semiconductor wafer or sample (101), the semiconductor wafer or sample is placed on a sample holder (104) disposed in a first chamber (103). The combination of the semiconductor wafer or sample and the sample holder is enclosed within a second chamber (130) inside the first chamber. Gas is evacuated from the second chamber and an etching gas is introduced into the second chamber, but not into the first chamber, to etch the semiconductor wafer or sample.
    Type: Grant
    Filed: February 22, 2006
    Date of Patent: February 21, 2017
    Assignee: SPTS Technologies Limited
    Inventors: Kyle S. Lebouitz, Edward F. Hinds
  • Patent number: 9472610
    Abstract: A substrate having a dielectric film thereon, in which: the dielectric film comprises at least four stacked layers of a dielectric material; the stacked layers comprise compressive layers which are subject to a compressive stress, and tensile layers which are subject to a tensile stress; and there are at least two spaced apart tensile layers which are each adjacent to one or more compressive layers.
    Type: Grant
    Filed: June 8, 2015
    Date of Patent: October 18, 2016
    Assignee: SPTS TECHNOLOGIES LIMITED
    Inventors: Katherine Crook, Stephen R Burgess
  • Patent number: 9207139
    Abstract: A method of monitoring a Mass Flow Controller (MFC) connected to a pressure chamber for supplying gas to the chamber, which is an unpumped condition, includes cyclically switching the MFC to create successive fill cycles for a test period and measuring the chamber pressure at intervals during the test period. The method is characterised in that the total switch time of the MFC is at least 10% of the fill cycle and in that the method includes obtaining the average of the pressure measurements and comparing them with historical data to determine whether or not the MFC is functioning properly.
    Type: Grant
    Filed: May 24, 2012
    Date of Patent: December 8, 2015
    Assignee: SPTS TECHNOLOGIES LIMITED
    Inventors: Simon Jones, Yiping Song
  • Patent number: 9165762
    Abstract: A method of forming silicon dioxide films using plasma enhanced chemical vapor deposition (PECVD) uses tetraethyl orthosilicate (TEOS), oxygen or a source of oxygen, and hydrogen as precursors. The method can be carried out at low temperatures in a range of 125 to 175° C. which is useful for manufacturing wafers with through silicon vias.
    Type: Grant
    Filed: April 24, 2013
    Date of Patent: October 20, 2015
    Assignee: SPTS TECHNOLOGIES LIMITED
    Inventors: Kathrine Crook, Andrew Price, Mark Carruthers, Daniel Archard, Stephen Burgess
  • Patent number: 9159599
    Abstract: Apparatus for chemically etching a workpiece includes a chamber for receiving a process gas and having a pumping port for extracting exhaust gases, and a workpiece support located in the chamber upstream of the pumping port. The chamber further includes a sub-chamber located upstream of the pumping port and downstream of the workpiece support, and the sub-chamber includes a window and an excitation source, adjacent the window, for creating a plasma in a sample of the exhaust gases to create an optical emission which can be monitored through the window.
    Type: Grant
    Filed: March 12, 2010
    Date of Patent: October 13, 2015
    Assignee: SPTS Technologies Limited
    Inventors: Oliver Ansell, Anthony Barrass, Paul Bennett, David Tossell
  • Patent number: 9139425
    Abstract: A method of avoiding stiction during vapor hydrofluoride (VHF) release of a microelectromechanical system (MEMS) or nanoelectromechanical system (NEMS) composed of a mechanical device and a substrate is described. A silicon nitride layer is provided between the substrate and a sacrificial oxide layer and/or between a device layer and the sacrificial oxide layer, and/or on a side of the device layer facing away from the sacrificial oxide layer, and converted to thicker ammonium hexafluorosilicate with VHF while simultaneously removing a portion of the sacrificial oxide. The ammonium hexafluorosilicate acts as a temporary support, shim, wedge, or tether which limits device movement during fabrication and is later removed by sublimation under heat and/or reduced pressure.
    Type: Grant
    Filed: December 7, 2010
    Date of Patent: September 22, 2015
    Assignee: SPTS Technologies Limited
    Inventor: Daniel J. Vestyck