Patents Assigned to STMicroelectronics (Rousset) SAS
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Publication number: 20240136350Abstract: The present disclosure concerns overtemperature protection circuit formed inside and on top of a monolithic semiconductor substrate having a surface covered with a gallium nitride layer, comprising: a first resistor having a first positive temperature coefficient and being arranged in said gallium nitride layer; and a second resistor having a second temperature coefficient different from the first coefficient.Type: ApplicationFiled: October 11, 2023Publication date: April 25, 2024Applicant: STMicroelectronics (Rousset) SASInventors: Loic BOURGUINE, Lionel ESTEVE
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Publication number: 20240136351Abstract: The present disclosure concerns a voltage regulation circuit formed inside and on top of a monolithic semiconductor substrate having a surface covered with a gallium nitride layer, comprising: between a first terminal and a second terminal, a first resistor and a first d-mode type HEMT transistor; and between the first terminal and the third terminal, a second d-mode type HEMT transistor; wherein the midpoint between the first resistor and the first transistor is coupled to the gates of the first and second transistors.Type: ApplicationFiled: October 11, 2023Publication date: April 25, 2024Applicant: STMicroelectronics (Rousset) SASInventors: Loic BOURGUINE, Lionel ESTEVE
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Publication number: 20240136433Abstract: The present disclosure concerns an electronic device formed inside and on top of a monolithic semiconductor substrate having a surface covered with a gallium nitride layer, comprising at least one e-mode type HEMT power transistor adapted to receiving a maximum voltage of 650 V between its drain and its source, and an analog circuit for controlling said power transistor.Type: ApplicationFiled: October 11, 2023Publication date: April 25, 2024Applicant: STMICROELECTRONICS (ROUSSET) SASInventors: Loic BOURGUINE, Lionel ESTEVE, Antoine PAVLIN
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Publication number: 20240136424Abstract: The present disclosure concerns a driver of a first e-mode type HEMT power transistor adapted to receiving a maximum voltage of 650 V between its drain and its source, the circuit being formed inside and on top of a monolithic semiconductor substrate having a surface covered with a gallium nitride layer, and comprising at least a second e-mode type transistor adapted to directly transmitting a control voltage to the gate of the first transistor and having an area greater than 5 mm2.Type: ApplicationFiled: October 11, 2023Publication date: April 25, 2024Applicant: STMicroelectronics (Rousset) SASInventor: Loic BOURGUINE
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Publication number: 20240134973Abstract: A device includes a memory and cryptographic processing circuitry coupled to the memory. The memory, in operation, stores one or more lookup tables. The cryptographic processing circuitry, in operation, processes masked data and protects the processing of masked data against side channel attacks. The protecting includes applying masked binary logic operations to masked data using lookup tables of the one or more lookup tables.Type: ApplicationFiled: October 15, 2023Publication date: April 25, 2024Applicant: STMICROELECTRONICS (ROUSSET) SASInventor: Thomas SARNO
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Patent number: 11967900Abstract: An embodiment voltage converter includes a first transistor connected between a first node of the converter and a second node configured to receive a power supply voltage, a second transistor connected between the first node and a third node configured to receive a reference potential, a first circuit configured to control the first and second transistors, and a comparator including first and second inputs. The first input is configured to receive, during a first phase, a first voltage ramp and, during a second phase, a set point voltage. The second input is configured to receive, during the first phase, the set point voltage and, during the second phase, a second voltage ramp.Type: GrantFiled: July 2, 2021Date of Patent: April 23, 2024Assignee: STMicroelectronics (Rousset) SASInventors: Sebastien Ortet, Olivier Lauzier
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Patent number: 11962616Abstract: A method and associated circuits protect data stored in a secure data circuit of a telecommunication device equipped with a near-field communication (NFC) router, a microcontroller, and the secure data circuit. In the method, each message received with the NFC router is parsed to retrieve a communication pipe identifier and an instruction code. The communication pipe identifier and the instruction code are compared to corresponding information in a filter table. Instruction codes of particular messages that attempt to modify a communication pipe by reassigning one end of the communication pipe from the port of the NFC router to a different circuit are acted upon. These messages are blocked from reaching the secure data circuit when the instruction code is not authorized in the filter table, and these messages are permitted when the instruction code is authorized in the filter table.Type: GrantFiled: January 11, 2021Date of Patent: April 16, 2024Assignees: PROTON WORLD INTERNATIONAL N.V., STMICROELECTRONICS (ROUSSET) SASInventors: Olivier Van Nieuwenhuyze, Thierry Huque, Alexandre Charles
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Patent number: 11949252Abstract: A contactless device includes an impedance matching and filter circuit connected to an antenna and being on the one hand operable for contactlessly communicating with a second device via the antenna, and on the other hand operable for contactlessly charging a rechargeable power supply of a third device via the antenna. A method of control includes modifying the impedance matching and filter circuit of the contactless device depending on whether the contactless device carries out the contactless communication or carries out the contactless charging.Type: GrantFiled: January 10, 2022Date of Patent: April 2, 2024Assignee: STMicroelectronics (Rousset) SASInventors: Anthony Tornambe, Nicolas Cordier
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Publication number: 20240103873Abstract: The disclosure includes a method of authenticating a processor that includes an arithmetic and logic unit. At least one decoded operand of at least a portion of a to-be-executed opcode is received on a first terminal of the arithmetic and logic unit. A signed instruction is received on a second terminal of the arithmetic and logic unit. The signed instruction combines a decoded instruction of the to-be-executed opcode and a previous calculation result of the arithmetic and logic unit.Type: ApplicationFiled: December 7, 2023Publication date: March 28, 2024Applicants: STMICROELECTRONICS (ROUSSET) SAS, PROTON WORLD INTERNATIONAL N.V.Inventors: Michael PEETERS, Fabrice MARINET
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Patent number: 11942440Abstract: An integrated circuit includes a semiconductor substrate having a rear face. A first semiconductor well within the substrate includes circuit components. A second semiconductor well within the substrate is insulated from the first semiconductor well and the rest of the substrate. The second semiconductor well provides a detection device that is configurable and designed to detect a DFA attack by fault injection into the integrated circuit.Type: GrantFiled: November 6, 2020Date of Patent: March 26, 2024Assignee: STMicroelectronics (Rousset) SASInventors: Alexandre Sarafianos, Abderrezak Marzaki
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Patent number: 11943931Abstract: In one embodiment, a non-volatile memory device includes a vertical state transistor disposed in a semiconductor substrate, where the vertical state transistor is configured to trap charges in a dielectric interface between a semiconductor well and a control gate. A vertical selection transistor is disposed in the semiconductor substrate. The vertical selection transistor is disposed under the state transistor, and configured to select the state transistor.Type: GrantFiled: April 1, 2021Date of Patent: March 26, 2024Assignee: STMicroelectronics (Rousset) SASInventors: Quentin Hubert, Abderrezak Marzaki, Julien Delalleau
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Patent number: 11943008Abstract: The present disclosure relates to a method for aligning a smartphone providing NFC wireless power for charging a battery of a device, the method comprising: emitting, with a first NFC antenna of the smartphone, an NFC field for wirelessly charging the battery of the device comprising a second NFC antenna; obtaining, with the smartphone, a measured value of a signal representative of the NFC field strength between the smartphone and the device; determining, by the smartphone, a range of values of a plurality of ranges of values the measured value belongs; and emitting, by the smartphone, at least one notification signal to a user with a frequency determined by the determined range of values.Type: GrantFiled: January 12, 2023Date of Patent: March 26, 2024Assignees: STMICROELECTRONICS LTD, STMICROELECTRONICS (ROUSSET) SASInventors: Chia Hao Chen, Nicolas Cordier
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Patent number: 11942935Abstract: An integrated circuit includes a programmable logic block. The programmable logic block includes a programmable logic array (PLA) and a field programmable gate array (FPGA). The PLA includes logic cells having a first architecture. The FPGA includes logic cells having a second architecture more complex than the first architecture. The programmable logic block includes an interface coupled to the PLA and the FPGA. An integrated circuit may also include circuitry for selecting one of plurality of clock signals for logic cells of a PLA.Type: GrantFiled: July 8, 2022Date of Patent: March 26, 2024Assignee: STMicroelectronics (Rousset) SASInventors: Mark Wallis, Jean-Francois Link, Joran Pantel
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Publication number: 20240095191Abstract: A method of pairing between a first host device and a first peripheral device includes entering by a user of the first host device a verification value, as well as comparing, by the first peripheral device, between the verification value and a first secret value stored in a memory of the first peripheral device. When the verification corresponds to the first secret value, the method of pairing further includes calculating and storing a first pairing key by the first host device and the first peripheral device to perform the pairing.Type: ApplicationFiled: September 13, 2023Publication date: March 21, 2024Applicants: STMicroelectronics (Rousset) SAS, Proton World International N.V.Inventors: Denis FARISON, Joris DELCLEF
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Patent number: 11935828Abstract: A semiconductor region includes an isolating region which delimits a working area of the semiconductor region. A trench is located in the working area and further extends into the isolating region. The trench is filled by an electrically conductive central portion that is insulated from the working area by an isolating enclosure. A cover region is positioned to cover at least a first part of the filled trench, wherein the first part is located in the working area. A dielectric layer is in contact with the filled trench. A metal silicide layer is located at least on the electrically conductive central portion of a second part of the filled trench, wherein the second part is not covered by the cover region.Type: GrantFiled: March 2, 2023Date of Patent: March 19, 2024Assignee: STMicroelectronics (Rousset) SASInventor: Abderrezak Marzaki
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Patent number: 11934329Abstract: Data exchanges between an ultra-wide band communication module and a secure element are controlled such that the data exchanges pass through a near-field communication router. The near-field communication router controls routing of the data exchanges so that the data exchanges do not pass through a host circuit that is also coupled to the near-field communication router.Type: GrantFiled: January 20, 2020Date of Patent: March 19, 2024Assignee: STMicroelectronics (Rousset) SASInventors: Alexandre Tramoni, Alexandre Charles
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Publication number: 20240086891Abstract: A first near-field communication device detects the presence of a second near-field communication device located within range. In response to that detection, there is an initiation of a near-field communication between the first and second devices. In case of a failure of the initiation of the near-field communication, instead an initiation of a contactless bank transaction between the first and second devices occurs.Type: ApplicationFiled: September 6, 2023Publication date: March 14, 2024Applicants: STMicroelectronics (Rousset) SAS, STMicroelectronics (China) Investment Co., Ltd.Inventors: Pierre RIZZO, Laurent TRICHEUR
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Publication number: 20240089860Abstract: A wireless communication device includes a battery, and a platform powered by the battery, with the platform including a processor. The device also includes a voltage regulator powered by the battery, an ultra-wideband communication unit powered by the voltage regulator via the platform when the platform is powered up, and a near-field communication unit powered directly by the battery, and being configured to order the voltage regulator to power the ultra-wideband communication unit when the platform is powered down.Type: ApplicationFiled: September 7, 2023Publication date: March 14, 2024Applicant: STMicroelectronics (Rousset) SASInventor: Alexandre TRAMONI
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Publication number: 20240087652Abstract: A nonvolatile memory device has a “split-voltage” architecture and includes columns of memory words formed on each row by groups of memory cells. All state transistors for memory cells of a memory word are gate controlled by a control element. All control elements of a same row are controlled by a first control signal generated by a first row control circuit in response to a set-reset (SR) latch output signal output for a selected row. In order to write a piece of data in a memory word, the first row control circuit confers onto the first control signal an erasing voltage corresponding to a first logic state of the first control signal and then a programming voltage corresponding to a second logic state of the first control signal without modifying, between erasing and programming the memory word, the state of the latch output signal for the selected row.Type: ApplicationFiled: September 7, 2023Publication date: March 14, 2024Applicant: STMicroelectronics (Rousset) SASInventor: Francois TAILLIET
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Patent number: 11928541Abstract: A closed container includes a detection device for detecting opening of or an attempt to open the container. The detection device includes a contactless passive transponder that is configured to communicate with a reader via an antenna using a carrier signal. An integrated circuit of the transponder includes two input terminals connected to the antenna and two output terminals linked by a first electrically conductive wire having a severable part which is severed in the event of an opening of or an attempted opening of the container. A shorting circuit is configured to short-circuit a first output terminal with a first input terminal in the event of a conductive repair of the severed part which forms an electrical connection between the two output terminals.Type: GrantFiled: October 23, 2019Date of Patent: March 12, 2024Assignee: STMicroelectronics (Rousset) SASInventors: Jose Mangione, Andrei Tudose, Pierre Yves Baudrion, Joran Pantel