Patents Assigned to STMicroelectronic S.A.
  • Single-pole component manufacturing
    Patent number: 7220644
    Abstract: The invention relates to a vertical-type single-pole component, comprising regions with a first type of conductivity which are embedded in a thick layer with a second type of conductivity. Said regions are distributed over at least one same horizontal level and are independent of each other. The regions also underlie an insulating material.
    Type: Grant
    Filed: April 27, 2005
    Date of Patent: May 22, 2007
    Assignee: STMicroelectronics S.A.
    Inventor: Frédéric Lanois
  • Secure multimedia data transmission method
    Patent number: 7222237
    Abstract: A secure method and system of digital data transmission between a sender and a receiver, including a phase of receiver authentication by a symmetrical authentication key sharing algorithm with no transmission of the key, a phase of data watermarking by using the authentication key as the watermarking key, and a phase of transmission of the watermarked data.
    Type: Grant
    Filed: September 10, 2002
    Date of Patent: May 22, 2007
    Assignee: STMicroelectronics S.A.
    Inventors: Luc Wuidart, Pierre Balthazar
  • Semiconductor device having several assembled integrated-circuit chips and method of assembling and electrically connecting the integrated-circuit chips
    Publication number: 20070108622
    Abstract: A semiconductor device includes several assembled integrated-circuit chips. A main integrated-circuit chip has at least one cavity in which electrical contacts are provided. A secondary integrated-circuit chip includes an edge which engages in the cavity of the main chip and has electrical contacts. When the secondary integrated-circuit chip is inserted into the cavity, the electrical contacts of the main chip and the electrical contacts of the secondary chip are placed so as to be in contact with one another.
    Type: Application
    Filed: November 13, 2006
    Publication date: May 17, 2007
    Applicant: STMicroelectronics S.A
    Inventor: Jean-Pierre Schoellkopf
  • Image sensor
    Publication number: 20070109434
    Abstract: An image sensor including an assembly of pixels each having a photodetector, and having circuitry for detecting, at a given time, pixels receiving a light intensity value substantially equal to a given value and coding circuitry providing an address for each of said pixels.
    Type: Application
    Filed: November 14, 2006
    Publication date: May 17, 2007
    Applicant: STMicroelectronics S.A.
    Inventor: Josep Puchades
  • Secure booting of an electronic apparatus with SMP architecture
    Publication number: 20070113088
    Abstract: A method of secure booting of an SMP architecture apparatus provides for the formation of a secure domain comprising a first processor and a part of a shared memory, before the booting of the operating system of the first processor. The operating system of a second processor is booted only after the reciprocal authentication with the first processor and, in case of authentication, the extension of the secure domain to the second processor.
    Type: Application
    Filed: May 11, 2006
    Publication date: May 17, 2007
    Applicant: STMicroelectronics S.A.
    Inventor: Marcus Volp
  • Integrated circuit with modulable low dropout voltage regulator
    Patent number: 7218084
    Abstract: A low dropout voltage (LDO) regulator comprises an output stage (EtS) of the amplifier (AMP), which has a main output and n auxiliary outputs which can respectively deliver a main control voltage (VGPRINC) and n auxiliary control voltages (VG1, . . . , VGn); and a power stage (EtP) which has a main power transistor (PmosPrinc), controlled at its gate by the main control voltage (VGPRINC), and p power modules (module 1, . . . , module n) of identical layout with p less than or equal to n, respectively having p auxiliary power transistors (PMos1, . . . , PMosn) each controlled at their gate by p auxiliary control voltages (VG1, . . . , VGn). The number p is selected as a function of an intended maximum output current.
    Type: Grant
    Filed: July 12, 2005
    Date of Patent: May 15, 2007
    Assignee: STMicroelectronics S.A.
    Inventors: Alexandre Pons, Fabienne Grigis
  • Method for programming memory cells including transconductance degradation detection
    Patent number: 7218553
    Abstract: The present invention relates to a method for programming a memory cell having a determined transconductance curve. The programming of the memory cell comprises a series of programming cycles each comprising a step of verifying the state of the memory cell. According to the present invention, the verify step comprises a first read of the memory cell with a first read voltage greater than a reference threshold voltage, and a second read of the memory cell with a second read voltage lower than or equal to the reference threshold voltage. The memory cell is considered not to be in the programmed state if first- and second-read currents flowing through the memory cell are above determined thresholds, and programming voltage pulses are applied to the memory cell while the latter is not in the programmed state. Application in particular to the programming of Flash memory cells.
    Type: Grant
    Filed: August 30, 2005
    Date of Patent: May 15, 2007
    Assignee: STMicroelectronics S.A.
    Inventor: Jean Devin
  • Integrable amplitude-locked loop including an acoustic resonator
    Patent number: 7218181
    Abstract: An amplitude-locked loop (ALL) includes: a comparator circuit having a first input, a second input and an output, said first input receiving an electric reference signal; a loop filter having an input connected to said output of said comparator circuit and having an output generating an electric control signal (Vtune); a circuit generating an electric signal to be controlled, transmitted to said second input of said comparator circuit. The circuit comprises an acoustic resonator having a BAW-type resonator having a first and second resonant frequencies and associated with a first inductive partner element for removing said second resonant frequency and with a second capacitive partner element for tuning said first resonant frequency, said at least first resonator component being adjustable via said electric control signal (Vtune).
    Type: Grant
    Filed: December 29, 2004
    Date of Patent: May 15, 2007
    Assignee: STMicroelectronics S.A.
    Inventors: Stephane Razafimandimby, Andreia Cathelin
  • Optical semiconductor housing with transparent chip and method for making same
    Patent number: 7214996
    Abstract: Optical semiconductor package and its method of fabrication, which package comprises a semiconductor component (6), a rear face of which is attached to a front face of a mounting and electrical connection support (2) and a front face of which comprises an optical sensor (9), means (11) for electrically connecting the semiconductor component to the support, a transparent chip (12) placed in front of the semiconductor component, which lies at least in front of the optical sensor, and encapsulation means (21) comprising an encapsulation material which envelopes, in front of the support, the periphery of the semiconductor component and of the chip, without covering at least the central part of the front face of this chip.
    Type: Grant
    Filed: December 21, 2001
    Date of Patent: May 8, 2007
    Assignee: STMicroelectronics S.A.
    Inventor: Patrick Daniel Perillat
  • Marchand-type distributed balun
    Patent number: 7215217
    Abstract: A mode-switching transformer including a first conductive line between two common-mode access terminals and a second conductive line between two differential mode access terminals, the lines being coupled and sized according to a central operating frequency of the transformer, each line being formed of two stacked spirals in two different metallization levels and each spiral of a line being interdigited with a spiral of the other line.
    Type: Grant
    Filed: September 3, 2004
    Date of Patent: May 8, 2007
    Assignee: STMicroelectronics S.A.
    Inventor: Hilal Ezzeddine
  • Electronic components and method of fabricating the same
    Patent number: 7214597
    Abstract: A method is provided for fabricating integrated electronic components. According to the method, an initial structure is produced on the surface of a first substrate. This initial structure incorporates a defined pattern formed from volumes of differentiated materials. At least part of the initial substrate that includes the defined pattern is transferred onto a second substrate, preferably by inverting the first substrate against the second substrate and then removing the first substrate. An additional structure is then produced on the second substrate. This additional structure includes volumes of material placed in correspondence with some of the volumes of differentiated material of the defined pattern. The electronic components thus produced may have a suitable configuration in accordance with technological or geometrical constraints.
    Type: Grant
    Filed: April 23, 2003
    Date of Patent: May 8, 2007
    Assignee: STMicroelectronics S.A.
    Inventors: Philippe Coronel, Francois Leverd, Thomas Skotnicki
  • Turbocoder with facilitated synchronization
    Patent number: 7212590
    Abstract: The invention concerns a data transmission device comprising a turbo coder (22) comprising an interleaver operating on two interleaving blocks and means (26) for producing symbols from said codes (D, Y1, Y2) supplied by the turbo coder The device comprises means (28) for inserting a synchronising sequence into said symbols at a site having a predetermined relationship position relative to the symbols produced with the codes associated with a common interleaving block.
    Type: Grant
    Filed: November 21, 2001
    Date of Patent: May 1, 2007
    Assignee: STMicroelectronics S.A.
    Inventor: Jacques Meyer
  • DRAM control circuit
    Publication number: 20070094460
    Abstract: A circuit for controlling a memory including at least two areas to which access cannot be had simultaneously, the circuit including first circuitry for storing a series of read and/or write instructions separately for each of the areas, and second circuitry for detecting that a first instruction intended for a first area is a predetermined instruction to be followed by a period during which the first area can receive no other instruction, and third circuitry for, during the period, providing instructions to another memory area.
    Type: Application
    Filed: June 2, 2006
    Publication date: April 26, 2007
    Applicant: STMicroelectronics S.A.
    Inventors: Pierre Marty, Gaelle Rey, Pascal Chauvet
  • Silicon oxidation method
    Patent number: 7208377
    Abstract: A method for forming, by thermal oxidation, a silicon oxide layer on an integrated circuit including three-dimensional silicon patterns, includes implanting a first element according to a first angle with respect to a horizontal direction. The first element is electrically neutral and has a first effect on the growth rate of a thermal oxide on silicon. A second element is implanted according to a second angle with respect to the horizontal direction. The second element is electrically neutral and has a second effect complementary to the first effect on the growth rate of a thermal oxide on silicon. The second angle is distinct from the first angle, and one of the first and second angles is a right angled. The silicon is thermally oxidized.
    Type: Grant
    Filed: June 23, 2004
    Date of Patent: April 24, 2007
    Assignee: STMicroelectronics, S.A.
    Inventor: Damien Lenoble
  • Management of the freezing of a functional module in a system on a chip
    Patent number: 7209988
    Abstract: An electronic system comprises an initiator module and a target module addressable by the initiator module. The initiator module is activated by edges of an activation signal generated from a first clock signal having a frequency. A control module is activated by edges of a second clock signal having a frequency, which is at least twice as large as the frequency of the first clock signal. The control module is constructed so as, in response to an request for access to the target module, initiated by the initiator module on an active edge of the activation signal, to set a signal for blocking the activation signal before the next edge of the latter, and to reinitialize the blocking signal on the first active edge of the first clock signal which follows the indication by the target module that the processing of the request is terminated at the target module.
    Type: Grant
    Filed: May 12, 2005
    Date of Patent: April 24, 2007
    Assignee: STMicroelectronics S.A.
    Inventors: Hervé Chalopin, Laurent Tabaries
  • Method for forming a variable capacitor
    Publication number: 20070087513
    Abstract: A method for forming a variable capacitor including a conductive strip covering the inside of a cavity, and a flexible conductive membrane placed above the cavity, the cavity being formed according to the steps of: forming a recess in the substrate; placing a malleable material in the recess; having a stamp bear against the substrate at the level of the recess to give the upper part of the malleable material a desired shape; hardening the malleable material; and removing the stamp.
    Type: Application
    Filed: August 30, 2006
    Publication date: April 19, 2007
    Applicants: STMicroelectronics S.A., Commissariat A L'energie Atomique
    Inventors: Guillaume Bouche, Fabrice Casset, Pascal Ancey
  • Protection of a digital quantity contained in an integrated circuit comprising a JTAG interface
    Publication number: 20070088985
    Abstract: A method and a circuit for protecting a digital quantity stored in a microcontroller including a JTAG interface, including the step of making the digital quantity dependent from a value stored in non-volatile fashion in the microcontroller and made inaccessible if signals are present at the input of the JTAG interface.
    Type: Application
    Filed: July 5, 2006
    Publication date: April 19, 2007
    Applicant: STMicroelectronics S.A.
    Inventor: Fabio Sozzani
  • Method for producing a dielectric layer on a carrier material and an integrated circuit comprising a capacitor incorporating a dielectric layer
    Publication number: 20070082502
    Abstract: A dielectric material layer is formed on a carrier material. A gas mixture containing at least one precursor comprising a metallic element is alternately circulated with an oxidant gas in contact with the carrier material under first oxidizing conditions so as to form a first sub-layer having dielectric qualities. A gas mixture containing the same precursor then is circulated in contact with the first sub-layer under second oxidizing conditions being more strongly oxidizing than the first oxidizing conditions so as to form a second sub-layer having dielectric qualities.
    Type: Application
    Filed: September 20, 2006
    Publication date: April 12, 2007
    Applicants: STMicroelectronics S.A., Commissariat a L'Energie Atomique
    Inventors: Michael Gros-Jean, Emilie Deloffre, Christophe Wyon
  • High-efficiency error detection and/or correction code
    Patent number: 7203896
    Abstract: A method for determining r error detection bits that can be associated with a word of m bits to be coded, including the step of calculating the product of a vector with m components representative of the word of m bits to be coded and of a parity control matrix of dimension r×m. The parity control matrix is such that each column of matrix includes an odd number of “1s” greater than or equal to three. The present invention also relates to a method for determining a syndrome.
    Type: Grant
    Filed: April 2, 2002
    Date of Patent: April 10, 2007
    Assignee: STMicroelectronics S.A.
    Inventors: Laurent Murillo, Francois Ricodeau
  • COFDM demodulator with an optimal FFT analysis window positioning
    Patent number: 7203244
    Abstract: A COFDM demodulator or analogue comprising a fast Fourier transform circuit analyzing a received signal in a window corresponding to a symbol, each symbol conveying several phase- and/or amplitude-modulated carriers, some of which are signaling carriers, and a circuit for positioning said window. The circuit for positioning said window uses the non demodulated signaling carriers.
    Type: Grant
    Filed: January 22, 2003
    Date of Patent: April 10, 2007
    Assignee: STMicroelectronics S.A.
    Inventor: Nicole Alcouffe