Abstract: A method and a circuit for protecting the execution of a program, including initializing at least one counter, carrying on with the normal program execution, interrupting this execution when the counter reaches a given value, and executing at least one integrity check of the calculation after this interrupt.

Abstract: A method of automatic calculation of several integer divisions by a same integer divider, of several successive integer dividends, separated from one another by a constant iteration step, smaller than or equal to the divider, including selecting, from a table of increments, according to an iteration index, a 0 or a 1 to be added to the operation result of the preceding iteration, the number of 0s in the table of increments being equal to the divider minus 1.

Abstract: The present invention relates to a non-volatile memory comprising a memory array comprising functional memory cells and non-functional memory cells linked to at least one non-functional word line. A word line address decoder comprises a special decoding section linked to the non-functional word line, for selecting the non-functional word line when a functional word line is read-selected, such that non-functional memory cells are selected simultaneously with the functional memory cells, and distort the reading of the functional memory cells. Application particularly to integrated circuits for smart cards.

Abstract: A circuit including a first sensitive node, a first component connected between the first sensitive node and a first terminal of a first switch, said first switch controlled by a first control signal variable between a supply voltage level and a second voltage level, and a second switch including a first terminal connected to the first terminal of said first switch, and a second terminal connected to a clean voltage supply, said second switch controlled to connect the first node of said first switch to said clean voltage supply when said first switch is in a non-conducting state.

Abstract: A method and a circuit for checking the coherence between data read from a first area of a memory of a microcontroller and the address of these data, including calculating a current digital signature of the read data by a function also taking into account the address of these data in the memory, and checking the coherence between the current signature and a previously-recorded signature.

Abstract: A secure method and system of digital data transmission between a sender and a receiver, including a phase of receiver authentication by a symmetrical authentication key sharing algorithm with no transmission of the key, a phase of data watermarking by using the authentication key as the watermarking key, and a phase of transmission of the watermarked data.

Abstract: A switch including a first transistor including a first main terminal connected to a first switch node, a second main terminal connected to a second switch node and a control terminal, the second switch node being connected to a first clean voltage supply, and first control circuitry connected to the control terminal of the first transistor, including a first node connected to the first clean voltage supply, a second node connected to a second voltage level, and a control input node for receiving a first input control signal variable between a supply voltage level and a third voltage level, the first control means arranged to selectively connect the control terminal of the first transistor to one of the first node and the second node based on the first input control signal.

Abstract: A control circuit of a power supply delivering a supply current to an inductor connected in series with the horizontal deflection yoke of a cathode ray tube display, the inductor being the primary coil of a transformer operatively connected for delivering a rectified low-pass filtered biasing voltage to the anode of the display, the low-pass filtering having a first time constant corresponding to the duration of a plurality of pictures, the control circuit having feedback circuitry for generating a monitoring voltage substantially proportional to the biasing voltage and for controlling the supply current to keep the monitoring voltage equal to a reference voltage; and feedforward circuitry for measuring the cathode current and for adding to the monitoring voltage a compensation voltage corresponding to the cathode current, low-pass filtered with a second time constant corresponding to the duration of a small number of lines and high-pass filtered with the first time constant.

Abstract: An optical device includes a stack having a transparent block with a rear face fixed on a front face of an integrated chip support. A front face of the transparent block that is parallel to its rear face is affixed to a rear face of a converging lens. The lens has a convex frontal surface. A diaphragm is interposed and fixed between the block and the lens. A housing for the optical device is made of an opaque material. A peripheral wall of the housing encloses the stack. An annular front part of the peripheral wall bears on a periphery of the convex frontal surface of the lens so as to define a frontal opening located in front of a central part of the lens.

Abstract: An integrated circuit includes at least one photodiode associated with a transfer transistor. The photodiode is formed with an upper pn junction. The transfer transistor includes a lateral spacer located on a side facing the photodiode. An upper layer of the upper pn junction includes a lateral surface extension lying beneath the spacer. A lower layer of the upper pn junction forms a source/drain region for the transfer transistor. An edge of the lateral surface extension lying beneath the spacer and adjacent a gate of the transfer transistor contacts a substrate of the integrated circuit. An oxide layer insulating the gate from the underlying substrate does not overlie the lateral surface extension of the upper layer underneath of the lateral spacer.

Abstract: A method for protecting an integrated circuit, including at least one non-volatile memory, including the steps of detecting a possible disturbance in the flow of a program executed by the integrated circuit, modifying the value of a digital variable in a volatile storage element in case of a disturbance detection and, in a way independent in time from the detection, intervening upon the non-volatile memory according to the value of said variable.

Abstract: A method and a circuit for protecting a digital quantity over a first number of bits, in an algorithm executing at least one modular exponentiation of data by the quantity, the steps including at least one squaring up and at least one multiplication and implementing, for each bit of the quantity, different calculation steps according to the state of the bit, a same number of multiplications being performed whatever the state of the bit and all the calculation steps using a multiplication being taken into account to calculate a final result.

Abstract: An integrated circuit includes at least one interconnection level and an acoustic resonator provided with an active element and a support. The includes at least one bilayer assembly having a layer of high acoustic impedance material and a layer of low acoustic impedance material. The support further includes a protruding element arranged on a metallization level of the interconnection level, making it possible to produce an electrical contact between an interconnection level and the active element of the acoustic resonator.

Abstract: A method for forming a empty area under a layer of a given material, including forming on a substrate a stacking of a photosensitive layer and of a layer of the given material; insolating a portion of the photosensitive layer or its complement according to whether the photosensitive layer is positive or negative with an electron beam crossing the layer of the given material; and removing the portion of the photosensitive layer.

Abstract: A circuit and method for supplying an electronic circuit with a direct supply voltage using high frequency antenna signals. The method includes producing a primary direct voltage equal to a fraction of the supply voltage using at least one antenna signal, producing at least two pumping signals having a frequency lower than the frequency of the antenna signals by means of an oscillator electrically powered by the primary voltage and boosting the primary voltage by means of a charge pump driven by the pumping signals, to obtain the supply voltage.

Abstract: The present invention concerns an image sensor having a plurality of pixels each including a photosensor, a first node having a first capacitance connected to the photosensor, a second node having a second capacitance and selectively connected to the photosensor, and reading circuitry operable to read independently a first voltage value stored at the first node and a second voltage value stored at the second node.

Abstract: An an antenna is formed with a self-supporting structure (1), a dielectric structure (2), and a conducting structure (3), each structure being formed from at least one structural element (10; 21, 22; 31-34). The structural elements of the different structures (1, 2, 3) constitute a stack in which these elements (10; 21, 22; 31-34) are connected to each other, and the dielectric structure (2) is formed in the stack by nano-imprinting.

Abstract: A computer system is provided with precise and non-precise watch modes. The computer system is a pipelined system in which the fate of an instruction is determined at the decode stage. Once instructions have been decoded, it is not possible for them to be “killed” later in the pipeline. According to the precise watch mode, instructions are held at the decode stage until the guard value has been resolved to determine whether or not that instruction is committed. Actions of the decode unit are determined in dependence on whether or not the instruction is committed when the guard has been resolved. According to a non-precise watch mode, instructions continue to be decoded and executed normally until a breakpoint instruction has had its guard resolved. At that point, an on-chip emulator can take over operations of the processor in a divert mode. The computer system can take into account different intrusion levels while implementing the watch modes.

Abstract: For indicating on a data medium (9) a sector referenced by a binary word (16) formed of a number M of first bytes each comprising a number L of bits, the method includes steps of etching onto the data medium locally at this sector a succession of M second bytes each corresponding to a first byte, each second byte being equal to a vector of N components, each with a value of +1 or ?1, such that N=2L?1 and such that the scalar product of said vector with any other vector to which another second byte is equal, is at most equal to +1. The data medium (9) is, for example, an optical disk.

Abstract: A method for protecting the execution of a main program against possible traps, including, on occurrence of an instruction from the main program, starting a time counter of a given count according to next instructions of the main program, and executing, once the counter has reached its count, at least one instruction of a secondary program from which the result of the main program depends.