Abstract: A method for controlling the electrical conduction between two electrically conductive portions may include placing of an at least partially ionic crystal between the two electrically conductive portions. The crystal may include at least one surface region coupled to the two electrically conductive portions. The surface region is insulating under the application of an electrical field to the surface region, and electrically conductive in the absence of the electrical field. An application or not of an electrical field to the at least one surface region reduces or establishes the electrical conduction.

Abstract: An embodiment of integrated inductor device, comprising a plurality of modules overlaid to each other, each module including at least one coil of conducting material. The directly overlaid pairs of coils are coiled in opposite directions. The directly overlaid modules are mechanically coupled through first adhesive conductive regions and the coils of the directly overlaid modules are electrically coupled to each other through second adhesive conductive regions. The first and the second adhesive conductive regions coupling directly overlaid modules are formed in the same step of the process, are of the same material and are arranged at a same level.

Abstract: A layer of a semiconductor material is epitaxially grown on a single-crystal semiconductor structure and on a polycrystalline semiconductor structure. The epitaxial layer is then etched in order to preserve a non-zero thickness of said material on the single-crystal structure and a zero thickness on the polycrystalline structure. The process of growth and etch is repeated, with the same material or with a different material in each repetition, until a stack of epitaxial layers on said single-crystal structure has reached a desired thickness. The single crystal structure is preferably a source/drain region of a transistor, and the polycrystalline structure is preferably a gate of that transistor.

Abstract: The charge pump circuit has a plurality of cascaded charge pump stages, each provided with a first pump capacitor connected to a first internal node and receiving a first high voltage phase signal, and a second pump capacitor connected to a second internal node and receiving a second high voltage phase signal, complementary with respect to the first. A first transfer transistor is coupled between the first internal node and an intermediate node, and a second transfer transistor is coupled between the second internal node and the intermediate node. The first and second high voltage phase signals have a voltage dynamics higher than a maximum voltage sustainable by the first and second transfer transistors. A protection stage is set between the first internal node and second internal node and respectively, the first transfer transistor and second transfer transistor, for protecting the same transfer transistors from overvoltages.

Abstract: A High Voltage switch configuration having an input terminal which receives an input signal and an output terminal which issues an output signal to a load. The High Voltage switch configuration comprises at least a first and a second diode, being placed in antiseries between said input and output terminals and having a pair of corresponding terminals in common, in correspondence of a first internal circuit node.

Abstract: A semiconductor package includes a transmissive support plate and includes at least one elongate hole. An integrated circuit semiconductor device is mounted on a rear face of the support plate. The semiconductor device includes first and second optical elements oriented towards the rear face of the support plate, where the first and second optical elements are placed on either side of the elongate hole. An encapsulation material made of an opaque material encapsulates the semiconductor device and fills the elongate hole so as to form an optical insulation partition between the first and second optical elements. A cavity is left, however, between each optical element and a rear face of the support plate.

Abstract: A control device for a QR switching power converter is described; said power converter is adapted to convert an input signal to a DC output signal and comprises a power switch connected to said input signal and adapted to regulate said DC output signal and magnetic storage means. The control device is able to determine the switching frequency of the power switch and it is supplied by a feedback signal deriving from a feedback circuit coupled to the output signal of the power converter; said control device performs a control loop regulating the DC output signal by controlling a control variable. The control device comprises modulating means adapted to modulate said control variable as a function of at least one modulating signal having a frequency higher than the control loop bandwidth.

Abstract: A radio-frequency amplifier includes a common gate amplification stage configured to be biased in a saturation condition with a first current and configured to receive an input signal as a gate-source voltage and to generate an output voltage as an amplified replica of the input signal. A feedback transistor is configured to be biased in a saturation condition with a second current and coupled to the common gate amplification stage so as to have a gate-drain voltage corresponding to a difference between the output voltage and the input signal.

Abstract: An embodiment is proposed for trimming a programmable delay line in an integrated device, which delay line is adapted to delay an input signal being synchronous with a synchronization signal of the integrated device—by a total delay. An embodiment of a corresponding method includes the steps of: preliminary programming the delay line to provide a selected nominal value of the total delay equal to a period of the timing signal, and trimming the delay line to vary an actual value of the total delay until the actual value of the total delay matches the period of the synchronization signal.

Abstract: An imaging system includes a plurality of pixels. A pixel readout circuit produces a plurality of first image frames from those pixels. An image output circuit produces a plurality of second image frames and operates to produce a second image frame from more than one of the first image frames. The pixel readout circuit is enabled to produce the first images frames at a rate faster than the image output circuit produces the second image frames. Through combining first image frames, by averaging or other statistical combinations, the photon shot noise of second image frames is reduced. Photon shot noise affects images with high light levels more than those with low light levels and, as such, the system processing alters the rate of first image frames dependent on the current light levels.

Abstract: A chip package includes a substrate, an integrated circuit proximate a top surface of the substrate, and a cap comprising encapsulant that encapsulates the integrated circuit on at least a portion of the top surface of the substrate. The chip package further includes at least one extension feature positioned on at least a portion of the top surface of the substrate. The at least one extension feature also comprises the encapsulant and extends from the cap to a perimeter of the substrate.

Abstract: An RF amplifier including first and second branches coupled in parallel between first and second supply voltage terminals, and a differential pair including first and second transistors each having first and second main current terminals, the second main current terminal of the first transistor being coupled by a first capacitor to the first main current terminal of the second transistor, and the second main current terminal of the second transistor being coupled by a second capacitor to the first main current terminal of the first transistor, wherein the first branch includes a first resistor coupled between the first main current terminal of the first transistor and the second capacitor, and the second branch includes a second resistor; coupled between the first main current terminal of the second transistor and the first capacitor.

Abstract: The present invention concerns an image sensor having a plurality of pixels each including a photosensor, a first node having a first capacitance connected to the photosensor, a second node having a second capacitance and selectively connected to the photosensor, and reading circuitry operable to read independently a first voltage value stored at the first node and a second voltage value stored at the second node.

Abstract: A lateral phase change memory includes a pair of electrodes separated by an insulating layer. The first electrode is formed in an opening in an insulating layer and is cup-shaped. The first electrode is covered by the insulating layer which is, in turn, covered by the second electrode. As a result, the spacing between the electrodes may be very precisely controlled and limited to very small dimensions. The electrodes are advantageously formed of the same material, prior to formation of the phase change material region.

Abstract: Fan-out wafer level packaging includes an integrated circuit having a top surface, a bottom surface, a plurality of side surfaces, and a bond pad defined on the top surface. A layer of encapsulant substantially surrounds the side surfaces of the integrated circuit, the layer of encapsulant having a height substantially equal to a height of the integrated circuit. A bump is spaced apart from the integrated circuit, and a redistribution layer electrically couples the bond pad of the integrated circuit to the bump.

Abstract: A via connecting the front surface of a substrate to its rear surface and having, in cross-section in a plane parallel to the surfaces, the shape of a scalloped ring.

Abstract: For coarse resistor string DACs, a resistor string is placed in an array of columns and rows, each resistor tap is connected to a switch network, and a decoder is used to select switches to be closed such that sub-DAC voltage comes from the resistor taps connected to the selected switches. The voltages from each row are fed into multiplexers, wherein the multiplexers produce output voltages. DAC circuit designs extend the resolution of the output voltages by feeding them into a voltage interpolation amplifier. A method and apparatus are disclosed for implementing Gray code to design coarse DAC architecture for voltage interpolation such that the number of switches required by the circuit is significantly reduced, thereby decreasing required surface area, and improving glitch performance without increasing design complexity.

Abstract: A device may include a programmable gain amplifier and an analog-digital converter with pipeline architecture having several stages. The first stage of the analog-digital converter may incorporate the programmable gain amplifier and an analog-digital conversion circuit with a programmable threshold.

Abstract: An apparatus for adaptively suppressing noise in an input signal frequency spectrum derived from overlapping input frames is provided. The system includes a psychoacoustic power computation module configured to compute a noisy signal power in psychoacoustic bands, a voice activity scoring module configured to compute a probabilistic score for a presence of a speech, and a noise estimation module configured to estimate a noise power in the psychoacoustic bands based on information of past frames, the probabilistic score, and the computed noisy signal power. The system also includes a gain computation module configured to compute a gain for each frequency, based on a probabilistic heuristic, the probabilistic score and the information on the past frames, and a gain post-processing module configured to perform a gain time smoothing, a gain frequency smoothing, and a gain regulation for the computed gain.

Abstract: An intelligent audio speaker that uses a power line communication element to provide audio distribution within homes, businesses, apartment complexes, and other buildings. Multiple intelligent audio speakers may be networked together, with common control. The intelligent audio speaker may, in some embodiments of the present invention, contain enhanced ambient backlight effects to further enhance the listener's experience. In some embodiments of the present invention, an existing audio speaker is retrofitted to an intelligent audio speaker using a retrofit kit.