Abstract: An integrated test device reduces external wiring congestion to a memory. The integrated test device provides for separate decoder testing and debugging to find specific errors in the memory. The device also helps in reducing the complexity of the test of external BIST. Furthermore, the number of clock cycles required for the decoder testing for an N-address memory is reduced from 4N cycles to N clock cycles. Additionally, the access time for the memory is reduced as the test device is used as a pipelining device in normal operation mode.

Abstract: In a data-input device an actuator element that can be manually actuated, and a sensor mechanically coupled to the actuator element. The sensor is formed in a body of semiconductor material housing a first sensitive element, which detects the actuation of the actuator element and generates electrical control signals. The first sensitive element is a microelectromechanical pressure sensor, formed by: a cavity made within the body; a diaphragm made in a surface portion of the body and suspended above the cavity; and piezoresistive transducer elements integrated in peripheral surface portions of the diaphragm in order to detect its deformations upon actuation of the actuator element.

Abstract: A method of preventing concurrent or quasi-concurrent commutations of a pair of phase shift modulation (PSM) drive signals of an output bridge stage driving an electrical load includes establishing a threshold level of a programmed current level to be transmitted though the electrical load. The method also includes, if the programmed current level is lower than the threshold level, enhancing a time offset between commutation edges of the pair of PSM drive signals by a minimum time.

Abstract: There is disclosed a multi-carrier transceiver system for use in echo cancellation. The transceiver system is arranged to generate from input data a multicarrier transmit signal comprising a plurality of multi-carrier data blocks. The transceiver system also has a multi-carrier signal receiver responsive to an input multi-carrier receive signal received from a remote signal transmitter. An echo canceller is arranged to generate from a pair of multi-carrier data blocks (u) a set of frequency-domain echo parameters for use in generating an echo signal, to generate the echo signal using the frequency-domain echo parameters, and to input the echo signal to the multi-carrier signal receiver for use in generating an echo-cancelled receive signal from the input receive signal and the echo signal.

Abstract: A method is for decoding a succession of blocks of data encoded with an LDPC code. The method includes storing the blocks temporarily and successively in an input memory before decoding the blocks successively in an iterative manner, the input memory having a memory size for storage of at least two blocks, and defining a current indication representative of a threshold number of iterations for decoding a current block. The method includes decoding the current block until a decoding criterion is satisfied or so long as a number of iterations performed for decoding the current block has not reached the current indication while at least one of a first subsequent block and a part of a second subsequent block are stored in the input memory, and updating the current indication for decoding the first subsequent block as a function of the number of iterations performed for decoding the current block.

Abstract: A circuit for controlling a matrix display formed of light-emitting diodes, capable of successively selecting lines of the screen and, for each line from a set of selected lines, of selecting columns, the voltage of each selected column settling at an operating voltage. The circuit is capable, before selection of each line from said set of lines, of precharging at least the columns to be selected to a precharge voltage. The circuit includes a device for adjusting the precharge voltage including a measurement circuit capable, on each selection of a line from said set of lines, of measuring the maximum operating voltage from among the operating voltages of the selected columns; a circuit capable of storing the maximum measured operating voltage; and a circuit capable of adjusting the precharge voltage based on the maximum stored operating voltage.

Abstract: A method and an element of ciphering by an integrated processor of data to be stored in a memory, including applying a ciphering algorithm which is a function of a key specific to the integrated circuit and of an initialization vector, and of memorizing at least the ciphered data, the initialization vector depending at least on the address of storage of the data in the memory.

Abstract: An electronic device includes a semiconductor substrate of a first conductivity type and a drain layer adjacent the semiconductor substrate and having a plurality of drains. The drain layer includes a first semiconductor layer of the first conductivity type adjacent the semiconductor substrate, and at least one second semiconductor layer of a second conductivity type adjacent the first semiconductor layer. Moreover, a plurality of first column regions of the first conductivity type extends through the at least one second semiconductor layer to contact the first semiconductor layer. A plurality of second column regions of the second conductivity type delimits the plurality of first column regions. Furthermore, a plurality of body regions of the second conductivity type are adjacent respective ones of the plurality of second column regions.

Abstract: A photovoltaic energy conversion system includes a distributed control structure for groups of cells of each multi-cellular panel, the components of which are entirely physically integrated in the photovoltaic panel. Each multi-cellular photovoltaic panel has a DC bus, supplied in parallel by a plurality of DC-DC converters, each provided with a controller that controls the working point of the photovoltaic cells coupled to the input of the DC-DC converter for a maximum yield of electric power by implementing a relatively simple MPPT algorithm. The controller includes a logic circuit and A/D converters of analog signals representing the input voltage and the input current generated by the group of cells that is coupled to the input of the DC-DC converter and optionally also of the output voltage of the converter, and a relatively simple D/A converter of the drive control signal of the power switch of the DC-DC converter.

Abstract: A memory is secured against an error injection during the reading of a datum. The memory includes: means for reading a reference datum in the memory during a phase of reading a datum stored in the memory; means for comparing the reference datum read with an expected value; and means for generating an error signal if the datum read is different from the expected value. Application is provided particularly but not exclusively to the protection of memories integrated into smart cards.

Abstract: An integrated circuit comprising: at least one test input for receiving test data; test control circuitry between the at least one test input and circuitry to be tested; wherein the test data is clocked in on a rising clock edge and a falling clock edge.

Abstract: A system having an input and output buffer includes a dynamic driver reference generator to generate dynamic driver reference signals based on a data signal and an IO buffer supply voltage, a level shifter to generate level shifted signals based, in part, on the dynamic driver reference signals, and a driver having at least one stress transistor. The driver dynamically adjusts a voltage across the stress transistor based on at least one of dynamic driver reference signals, the level shifted signals, and a current state of an IO pad.

Abstract: A chip configuration for dual board voltage compatibility comprising ballast I/O pads, regulator control block and VDDCO pad. If 1.8V is available on board, all 1.8V pads are connected to the package pins and the VDDCO pad is double bonded with one 1.8V package pin. This ensures that the regulator is in operation providing 1.2V supply to the core. If 1.2V is available on board, all 1.2V pads are bonded to the package pins and VDDCO pad is left unbonded. A weak pulldown ensures that the regulator is inoperational and the gate voltage of ballast transistor is pulled up. Now 1.2V pads directly get supply from the board through package pins and is provided to the core without suffering IR drop.

Abstract: A printed media product, such as a trading card, that has a substrate and an encoded data element applied to a surface of the substrate containing information. The encoded data element includes first, second, and third data layers with first, second, and third patterns of encoded, colored dots defined by a binary encoding scheme. The dots of the first, second, and third layers are different colors separately resolvable by a scanner with decoding software. The colors of the dots are cyan, yellow, and magenta, and the layers are printed so that the dots overlap. The binary encoding scheme includes a two dimensional run length limited code. The printed media product includes a graphics element that can be interpreted by a human user, and typically, the information encoded in the encoded data element layers is related to the information in the graphics element.

Abstract: An integrated circuit may include an inverter which may include a first transistor of a first conductivity type and a second transistor of a second conductivity type connected in parallel with the first transistor. An input of the inverter may be capable of receiving an oscillating input signal, and which may include an output of the inverter, which is connected to a capacitive device capable of being charged and discharged depending on the state of the first and second transistors being on or off. The inverter may be capable of delivering an oscillating output signal at its output. The integrated circuit may include a selector for transmitting the oscillating output signal and for masking the charging and/or discharging of the capacitive device.

Abstract: A method for producing a photosensitive integrated circuit including producing circuit control transistors, producing, above the control transistors, and between at least one upper electrode and at least one lower electrode, at least one photodiode, by amorphous silicon layers into which photons from incident electromagnetic radiation are absorbed, producing at least one passivation layer, between the lower electrode and the control transistors, and producing, between the control transistors and the external surface of the integrated circuit, a reflective layer capable of reflecting photons not absorbed by the amorphous silicon layers.

Abstract: A driving mass of an integrated microelectromechanical structure is moved with a rotary motion about an axis of rotation, and a sensing mass is connected to the driving mass via elastic supporting elements so as to perform a detection movement in the presence of an external stress. The driving mass is anchored to a first anchorage arranged along the axis of rotation by first elastic anchorage elements. The driving mass is also coupled to a pair of further anchorages positioned externally thereof and coupled to opposite sides with respect to the first anchorage by further elastic anchorage elements; the elastic supporting elements and the first and further elastic anchorage elements render the driving mass fixed to the first sensing mass in the rotary motion, and substantially decoupled from the sensing mass in the detection movement, the detection movement being a rotation about an axis lying in a plane.

Abstract: An integrated programmable gain amplifier circuit that receives at an input an analog signal, circuit including an operational amplifier and a gain setup network comprising resistive elements and selection elements, which may be controlled in order to setup the gain of the amplifier circuit. The gain setup network further includes capacitive elements, for defining, together with the resistive elements and the operational amplifier, an anti-aliasing filter of the active RC type.

Abstract: A low drop-out DC voltage regulator regulates a voltage from a DC supply and includes: a pass device controllable to maintain a voltage at an output of the regulator and arranged to provide a first current from the DC supply, at least part of said first current being provided to a load coupled to the output of the regulator; and a current regulator coupled to said pass device and to the output of the regulator. The current regulator is arranged to conduct a second current controllable such that the first current through said pass device remains constant irrespective of variations in a load current to said load.

Abstract: Fair usage of working channels in a wireless network is disclosed. A base station associated with a cell within a wireless community monitors the congestion of the working channel of neighboring communities. Upon determining that the congestion of the working channel of a neighboring community is less than that of its existing working channel, the base station initiates a switch to the neighboring community's working channel. Upon joining the new community, the frame structure and other networking parameters and attributes are adjusted.