Abstract: A capacitive element includes a trench extending vertically into a well from a first side. The trench is filled with a conductive central section clad with an insulating cladding. The capacitive element further includes a first conductive layer covering a first insulating layer that is located on the first side and a second conductive layer covering a second insulating layer that is located on the first conductive layer. The conductive central section and the first conductive layer are electrically connected to form a first electrode of the capacitive element. The second conductive layer and the well are electrically connected to form a second electrode of the capacitive element. The insulating cladding, the first insulating layer and the second insulating layer form a dielectric region of the capacitive element.

Abstract: An integrated MEMS structure includes a driving assembly anchored to a substrate and actuated with a driving movement. A pair of sensing masses suspended above the substrate and coupled to the driving assembly via elastic elements is fixed in the driving movement and performs a movement along a first direction of detection, in response to an external stress. A coupling assembly couples the pair of sensing masses mechanically to couple the vibration modes. The coupling assembly is formed by a rigid element, which connects the sensing masses and has a point of constraint in an intermediate position between the sensing masses, and elastic coupling elements for coupling the rigid element to the sensing masses to present a first stiffness to a movement in phase-opposition and a second stiffness, greater than the first, to a movement in phase, of the sensing masses along the direction of detection.

Abstract: A clock signal is generated with an oscillator. A crystal oscillator core within the oscillator circuit is switched on to produce first and second oscillation signals that are approximately opposite in phase. When a difference between a voltage of the first oscillation signal and a voltage of the second oscillation signal exceeds an upper threshold range, the crystal oscillator core is switched off. When the difference between the voltage of the first oscillation signal and the voltage of the second oscillation signal falls below the upper threshold range, the crystal oscillator core is switched back on. This operation is repeated so as to produce the clock signal.

Abstract: A MOSFET has a current conduction path between source and drain terminals. A gate terminal of the MOSFET receives an input signal to facilitate current conduction in the current conduction path as a result of a gate-to-source voltage reaching a threshold voltage. A body terminal of the MOSFET is coupled to body voltage control circuitry that is sensitive to the voltage at the gate terminal of the MOSFET. The body voltage control circuitry responds to a reduction in the voltage at the gate terminal of the MOSFET by increasing the body voltage of the MOSFET at the body terminal of the MOSFET. As a result, there is reduction in the threshold voltage. The circuit configuration is applicable to amplifier circuits, comparator circuits and current mirror circuits.

Abstract: Electrostatic discharge (ESD) protection is provided in using a supply clamp circuit including a trigger actuated MOSFET device. Triggering of the MOSFET device is made in response to detection of either a positive ESD event or a negative ESD event.

Abstract: A device includes an optical resonator having four ports including a first port, a second port, a third port, and a fourth port. A first electronic circuit is configured to calculate a first information representative of a power difference between optical signals supplied by two of the four ports. A method of operating a device is also disclosed.

Abstract: A MEMS pressure sensor includes a monolithic body of semiconductor material having a first face and a second face and housing a first buried cavity and a second buried cavity, arranged under the first buried cavity and projecting laterally therefrom. A first sensitive region is formed between the first buried cavity and the first face at a first depth, and a second sensitive region is formed between the second buried cavity and the first face at a second depth greater than the first depth. The monolithic body also houses a first piezoresistive sensing element and a second piezoresistive sensing element, integrated in the first and second sensitive regions, respectively.

Abstract: An optical sensor includes pixels. Each pixel has a photodetector and a semiconductor guard ring around the photodetector. The photodetector and the semiconductor guard ring are dimensioned so that a fill factor of the pixel is less than or equal to 50%.

Abstract: A method and apparatus for performing a low-power presence check are provided. In the method and apparatus, a controller detects a presence of a tag by at least causing the antenna to generate a magnetic field over a first time period for detecting the tag, measuring an antenna voltage over a second time period, causing the antenna to cease generating a magnetic field over a third time period longer than the first time period and comparing the antenna voltage to an antenna reference voltage to determine whether the tag is present. The controller detects the presence of the tag in response to receiving a command from a host device for performing the low-power presence check. The command may be a one-time command for every presence check stage or a command that is repeatedly received each time the controller detects the presence of the tag.

Abstract: A semiconductor product includes a layer of semiconductor die package molding material embedding a semiconductor die having a front surface and an array of electrically-conductive bodies such as spheres or balls around the semiconductor die. The electrically-conductive bodies have front end portions around the front surface of the semiconductor die and back end portions protruding from the layer of semiconductor die package molding material. Electrically-conductive formations are provided between the front surface of the semiconductor die and front end portions of the electrically-conductive bodies left uncovered by the package molding material. Light-permeable sealing material can be provided at electrically-conductive formations to facilitate inspecting the electrically-conductive formations via visual inspection through the light-permeable sealing material.

Abstract: To manufacture an oscillating structure, a wafer is processed by: forming torsional elastic elements; forming a mobile element connected to the torsional elastic elements; processing the first side of the wafer to form a mechanical reinforcement structure; and processing the second side of said wafer by steps of chemical etching, deposition of metal material, and/or deposition of piezoelectric material. Processing of the first side of the wafer is carried out prior to processing of the second side of the wafer so as not to damage possible sensitive structures formed on the first side of the wafer.

Abstract: A silicon on insulator substrate includes a semiconductor bulk handle wafer, an insulating layer on said semiconductor bulk handle wafer and a semiconductor film on said insulating layer. An opening extends completely through the semiconductor film and insulating layer to expose a surface of the semiconductor bulk handle wafer. Epitaxial material fills the opening and extends on said semiconductor film, with the epitaxial material and semiconductor film forming a thick semiconductor film. A trench isolation surrounds a region of the thick semiconductor film to define an electrical contact made to the semiconductor bulk handle wafer through the opening.

Abstract: A circuit includes a current controller oscillator generating a CCO output signal at a CCO output, a charge pump boosting a supply voltage based on the CCO output signal and producing a charge pump output voltage at an output, and a current sensing circuit sensing load current at the output and generating a feedback signal having a magnitude that varies with the sensed load current if a magnitude of the sensed load current is between lower and upper load current thresholds. A frequency of the CCO output signal is constant at a lower frequency threshold where the sensed load current is below the lower load current threshold, asymptomically rises to an upper frequency threshold where the sensed load current is above the upper load current threshold, and is proportional to the feedback signal where the sensed load current is between the lower and upper load current thresholds.

Abstract: A combinational circuit block has input pins configured to receive input digital signals and output pins configured to provide output digital signals as a function of the input digital signals received. A test input pin receives a test input signal. A test output pin provides a test output signal as a function of the test input signal received. A set of scan registers are selectively coupled to either the combinational circuit block or to one another so as to form a scan chain of scan registers serially coupled between the test input pin and the test output pin. The scan registers in the set of scan registers are clocked by a clock signal. At least one input register is coupled between the test input pin and a first scan register of the scan chain. The at least one input register is clocked by an inverted replica of the clock signal.

Abstract: An oscillating analog signal includes a succession of dampened oscillations. That oscillating analog signal is conditioned to generate an output signal including only oscillations of the oscillating analog signal which have an amplitude smaller than a first threshold. The output signal is then processed by a processing unit, where the first threshold is compatible with a maximum level of voltage tolerable by the processing unit.

Abstract: A hybrid driver receives complementary high-speed input data signals and a pair of low-speed input data signals and selects one of the pairs of input data signals and drives output data signals on first and second output nodes based on the selected pair of input data signals. The hybrid driver includes first and second driver circuits coupled to the first and second output nodes, respectively. Each driver circuit includes first and second series-connected transistors coupled between a first supply voltage node and a reference voltage node, with an interconnection of the first and second series-connected transistors coupled to the corresponding first or second output node. Each first and second driver circuit includes a third transistor coupled in parallel with the corresponding first transistor. Each first and third transistor couples in parallel the corresponding output node to a second supply voltage node responsive to the corresponding low-speed input data signal.

Abstract: A user identification based control system includes a time of flight ranging sensor configured to sense a distance to a person, where the time of flight ranging sensor is positioned so the sensed distance is a function of a height of the person. Processing circuitry is coupled to the time of flight ranging sensor and configured to identify the person based upon sensed distance and to generate control signals to control peripheral components based upon the identity of the person. The time of flight ranging sensor may also be used to sense speed of the person for identification purposes. In general, the time of flight ranging sensor is positioned a known height over a surface on which the person is present, such as in the doorway or on a ceiling of a room.

Abstract: An integrated circuit includes a substrate having at least one first domain and at least one second domain that is different from the at least one first domain. A trap-rich region is provided in the substrate at the locations of the at least one second domain only. Locations of the at least one first domain do not include the trap-rich region.

Abstract: In an embodiment, a digital output driver circuit comprises an output stage having first and second transistors. A drive stage is configured to drive control terminals of the first and second transistors and comprising switching circuitry and current generator circuitry. In a first configuration, the driver circuit is configured to connect a control terminal of the second transistor to the reference node to turn off the second transistor; and connect a first capacitance to the current generator circuitry and to a control terminal of the first transistor to turn on the first transistor. In a second configuration, the driver circuit is configured to turn off the first transistor and connect the control terminal of the second transistor to the current generator circuitry and to the second capacitance to turn on the second transistor.

Abstract: A switching converter includes a voltage conversion circuit providing an output voltage from an input voltage and a PWM voltage generated in response to first and second oscillating voltages. The input stage of a transconductor circuit provides an input reference current following a difference between a reference voltage and a voltage dependent on the output voltage and according to a transconductance, and an output stage for providing an output reference current from the input reference current. A phase shifter shifts an oscillating reference voltage according to the output reference current to obtain the first and second oscillating voltages. The transconductance is controlled in response to the input voltage resulting in a change of the input reference current. Compensation for that change is provided by subtracting a variable compensation current from the input reference current, where the variable compensation current is generated in response to the input voltage.