Abstract: An image acquisition device includes an array of color filters and an array of microlenses over the array of color filters. At least one layer made from an inorganic dielectric material is formed between the array of color filters and the array of microlenses.

Abstract: An image sensor includes photodetection pixels formed inside and on top of a semiconductor substrate. An interconnection network coats a surface of the semiconductor substrate. The interconnection network includes a level of conductive vias in contact, by their lower surface, with the photodetection pixels. The conductive vias are made of doped polysilicon and have a heavier doping on their lower surface side than on their upper surface side.

Abstract: A variable-capacitance diode is formed in a doped semiconductor substrate of a first conductivity type. The diode includes a first doped region of a second conductivity type in semiconductor substrate. A second doped region of the first conductivity type in a portion of the first doped region and a third doped region of second conductivity type in a further portion of the first doped region form a PN junction of the diode. First insulating trenches laterally delimit the each PN junction. Doped areas having a doping level heavier than the first doped region are provided within the first doped region under and in contact with a bottom of each first insulating trench. The diode is surrounded by a second insulating trench deeper than the first insulating trench.

Abstract: A single photon avalanche diode (SPAD) includes a PN junction in a semiconductor well doped with a first type of dopant. The PN junction is formed between a first region doped with the first type of dopant and a second region doped with a second type of dopant opposite to the first type of dopant. The first doped region is shaped so as to incorporate local variations in concentration of dopants that are configured, in response to a voltage between the second doped region and the semiconductor well that is greater than or equal to a level of a breakdown voltage of the PN junction, to generate a monotonic variation in the electrostatic potential between the first doped region and the semiconductor well.

Abstract: The present description concerns a switch based on a phase-change material comprising: first, second, and third electrodes; a first region of said phase-change material coupling the first and second electrodes; and —a second region of said phase-change material coupling the second and third electrodes.

Abstract: A device for testing an optical device, comprising a first structure comprising a substrate made of a first material and at least two first pillars of cylindrical shape made of a second material crossing the substrate, the second material having an optical index different from the optical index of the first material.

Abstract: The present description concerns a device including phase-change memory cells, each memory cell including a first resistive element in lateral contact with a second element made of a phase-change material.

Abstract: The present description concerns a method of manufacturing an insulating trench in a substrate, for an electronic device, comprising the following successive steps: (a) filling a trench formed in the substrate with a first insulating material; (b) depositing a first etch stop layer on the first material; (c) depositing a second layer of a second insulating material on the first etch stop layer; (d) etching down to the etch stop layer; and (e) depositing a third layer made of a third tight material.

Abstract: A reception element receives an analog signal. The received analog signal is converted by a reception chain into a digital signal. Based on the digital signal and a first filtering operation, a correction chain generates a correction digital signal reconstituting dynamic nonlinearities generated by the reception chain. A corrected signal from which the reconstituted dynamic nonlinearities have been removed is then generated by subtracting the correction digital signal from the digital signal.

Abstract: The present description concerns an optical filter intended to be arranged in front of an image sensor comprising a plurality of pixels, the filter comprising, for each pixel, at least one resonant cavity comprising a transparent region having a first refraction index and laterally delimited by a reflective peripheral vertical wall, and at least one resonant element formed in said region.

Abstract: A bipolar transistor includes a collector. The collector is produced by a process wherein a first substantially homogeneously doped layer is formed at the bottom of a cavity. A second gradually doped layer is then formed by diffusion of dopants of the first substantially homogeneously doped layer.

Abstract: In an embodiment a method for measuring ambient light includes successively synchronizing optical signal acquisition phases with extinction phases of a disruptive light source, wherein the disruptive light source periodically provides illumination phases and the extinction phases, accumulating, in each acquisition phase, photo-generated charges by at least one photosensitive pixel comprising a pinned photodiode, wherein an area of the pinned photodiode is less than or equal to 1/10 of an area of the at least one photosensitive pixel, transferring, for each pixel, the accumulated photo-generated charges to a sensing node, converting, for each pixel, the transferred charges to a voltage at a voltage node and converting, for each pixel, the transferred charges to a digital number.

Abstract: The present disclosure concerns a photodiode including at least one memory area, each memory area including at least two charge storage regions.

Abstract: A bipolar transistor is manufactured by: forming a collector region; forming a first layer made of a material of a base region and an insulating second layer; forming a cavity reaching the collector region; forming a portion of the collector region and a portion of the base region in the cavity; forming an insulating fourth layer made of a same material as the insulating second layer in the periphery of the bottom of the cavity, the insulating fourth layer having a same thickness as the insulating second layer; forming an emitter region; and simultaneously removing the insulating second and a portion of the insulating fourth layer not covered by the emitter region.

Abstract: An electronic device includes an insulating first layer covering a second layer made of a doped semiconductor material. A cavity is formed to cross through the first layer and reach the second layer. Insulating spacers are forming against lateral walls of the cavity. A first doped semiconductor region fills the cavity. The first doped semiconductor region has a doping concentration decreasing from the second layer.

Abstract: A first wafer includes a first semiconductor layer and first metal contacts on a side of a first surface of the first semiconductor layer. A second wafer includes a second semiconductor layer and second metal contacts on a side of a first surface of the second semiconductor layer. A handle is bonded onto a surface of the second wafer opposite to the second semiconductor layer. The second semiconductor layer is then removed to expose the second metal contacts. A bonding is then performed between the first and second wafers to electrically connect the first metal contacts to the second metal contacts.

Abstract: A circuit includes at least one bipolar transistor and at least one variable capacitance diode. The circuit is fabricated using a method whereby the bipolar transistor and variable capacitance diode are jointly produced on a common substrate.

Abstract: A transistor includes a source region, a drain region and a body region arranged in a semiconductor layer. A gate region tops the body region. The body region includes a first doped layer and a second layer between the first doped layer and the gate region. The second layer is an epitaxial layer that is less heavily doped than the first doped layer.

Abstract: A method for operating a sense amplifier in a one-switch one-resistance (1S1R) memory array, includes: generating a regulated full voltage and a regulated half voltage; applying the regulated full voltage and regulated half voltage to selected and unselected bit lines of the 1S1R memory array during read operations as an applied read voltage; and inducing and compensating for a sneak-path current during read operations by adjusting the applied read voltage based on the cell state of an accessed bit cell and an amplitude of the sneak-path current.

Abstract: An integrated circuit includes a substrate having at least one first domain and at least one second domain that is different from the at least one first domain. A trap-rich region is provided in the substrate at the locations of the at least one second domain only. Locations of the at least one first domain do not include the trap-rich region.