Abstract: An amplifier stage of an LDO regulator circuit includes an amplifier stage that generates a drive signal in response to a first voltage difference an output voltage of the LDO regulator circuit and a reference voltage. A drive stage having a quiescent current consumption is configured to generate a control signal in response to the drive signal. The control signal is applied to the control terminal of a power transistor. A dropout detector senses whether the LDO regulator circuit is operating in closed loop regulation mode or in open loop dropout mode by sensing a second difference in voltage between the drive signal and the control signal. A quiescent current limiter circuit responds to the sensed second difference by controlling the quiescent current consumption of the drive stage, and in particular limiting current consumption when the LDO regulator circuit is operating in the open loop dropout mode.

Abstract: A MOSFET has a current conduction path between source and drain terminals. A gate terminal of the MOSFET receives an input signal to facilitate current conduction in the current conduction path as a result of a gate-to-source voltage reaching a threshold voltage. A body terminal of the MOSFET is coupled to body voltage control circuitry that is sensitive to the voltage at the gate terminal of the MOSFET. The body voltage control circuitry responds to a reduction in the voltage at the gate terminal of the MOSFET by increasing the body voltage of the MOSFET at the body terminal of the MOSFET. As a result, there is reduction in the threshold voltage. The circuit configuration is applicable to amplifier circuits, comparator circuits and current mirror circuits.

Abstract: An antenna includes two planar coils that are mechanically disposed face to face and electrically connected in series. The antenna is mounted to a disposable consumer product (for example, a cartridge for use with an electronic cigarette). The antenna is configured to support near field communications with a reader circuit for purposes of authenticating use of the disposable consumer product.

Abstract: Disclosed is a method for testing touch screen displays during manufacture. A touch screen controller (TSC) is packaged, and the analog channels of the TSC are characterized, with resulting data being stored for later use. The TSC is programmed, and the touch screen display and TSC are packaged together. The touch screen display is tested using firmware in the TSC, enabling calculation of the inherent capacitances between force and sense lines of the touch screen display when connected to the TSC during operation. The testing involves, for each force and sense line pair, measuring an output signal generated by a receive channel of the TSC coupled to the sense line of that pair. Based upon the data gathered during characterization, and the signals measured during testing, the capacity of the touch screen display is then calculated.

Abstract: A driving circuit for an electric motor including multiple windings includes a sensing circuit to sense motor winding currents. A motor rotation angle signal is generated from the sensed currents and motor control voltages are generated as a function of the motor rotation angle signal. The motor windings are driven with motor drive voltages obtained by injecting into the motor control voltages injection pulses. The sensed currents include both torque components and injection components. The motor rotation angle signal is generated as a function of the injection components of the sensed currents.

Abstract: An analog ping signal that is present at a secondary coil of a power receiving device operating within a wireless power transmission system is detected. The detection circuit includes a DC blocking circuit having an input directly connected to a terminal of the secondary coil. A comparator circuit has an input coupled to an output of the DC blocking circuit. A timer circuit is reset by a signal output by the comparator circuit to assert a ping detect signal in response to a resetting of the timer circuit. The ping detect signal is deasserted in response to a timing out of the timer circuit.

Abstract: Disclosed is a method for testing touch screen displays during manufacture. A touch screen controller (TSC) is packaged, and the analog channels of the TSC are characterized, with resulting data being stored for later use. The TSC is programmed, and the touch screen display and TSC are packaged together. The touch screen display is tested using firmware in the TSC, enabling calculation of the inherent capacitances between force and sense lines of the touch screen display when connected to the TSC during operation. The testing involves, for each force and sense line pair, measuring an output signal generated by a receive channel of the TSC coupled to the sense line of that pair. Based upon the data gathered during characterization, and the signals measured during testing, the capacity of the touch screen display is then calculated.

Abstract: A voltage regulator having bias current boosting is provided. The voltage regulator includes a power stage for providing an output voltage to a load. The voltage regulator includes a differential stage that receives a feedback voltage representative of the output voltage and a reference voltage and controls the power stage based on a difference between the reference voltage and the feedback voltage. The voltage regulator includes a bias current boosting stage that receives the feedback and reference voltages. The bias current boosting stage provides a boosted bias current having a current level that is based on the difference between the reference and feedback voltages. The boosted bias current biases the differential stage and hastens a response of the differential stage, in response to a change in the difference between the reference voltage and the feedback voltage, in controlling the power stage.

Abstract: Several first digital streams of first digital samples at a first sampling frequency are processed to issue corresponding stream that are converted into second digital streams sampled at a second sampling frequency lower than said first sampling frequency. At least one delay to be applied to at least one first digital stream to satisfy a condition on the second digital streams is determined and applied to at least one first digital stream before converting. The converting operation performed is decimation filtering of the first digital streams. The application of the at least one delay to at least one first steam involves skipping a number of first digital samples in the at least one first digital stream. The number skipped depends on the value of the at least one delay. Samples that are skipped are not delivered for decimation filtering.

Abstract: Several first digital streams of first digital samples at a first sampling frequency are processed to issue corresponding stream that are converted into second digital streams sampled at a second sampling frequency lower than said first sampling frequency. At least one delay to be applied to at least one first digital stream to satisfy a condition on the second digital streams is determined and applied to at least one first digital stream before converting. The converting operation performed is decimation filtering of the first digital streams. The application of the at least one delay to at least one first steam involves skipping a number of first digital samples in the at least one first digital stream. The number skipped depends on the value of the at least one delay. Samples that are skipped are not delivered for decimation filtering.

Abstract: A current mirror circuit includes an input current leg and an output current leg. The input current leg includes: a first bipolar junction transistor (BJT) having a collector terminal configured to receive an input current sourced at a current node and a first metal oxide semiconductor field effect transistor (MOSFET) having a gate terminal coupled to the current node and a source terminal coupled to a base terminal of the first BJT. The output current leg includes: a second BJT having a collector terminal configured to supply an output current and a second MOSFET having a gate terminal coupled to the current node and a source terminal coupled to a base terminal of the second BJT.

Abstract: A driving circuit for an electric motor including multiple windings includes a sensing circuit to sense motor winding currents. A motor rotation angle signal is generated from the sensed currents and motor control voltages are generated as a function of the motor rotation angle signal. The motor windings are driven with motor drive voltages obtained by injecting into the motor control voltages injection pulses. The sensed currents include both torque components and injection components. The motor rotation angle signal is generated as a function of the injection components of the sensed currents.

Abstract: A method includes: writing first data in a first partition of a first memory module and second data in a first partition of a second memory module, and selectively operating the first and second memory modules in a first operating mode and a second operating mode. The first operating mode includes writing parity bits for the first data in a second partition of the second memory module and parity bits for the second data in a second partition of the first memory module. The second operating mode includes writing further data instead of parity bits in the second partition of one or both the first memory module and the second memory module.

Abstract: A significant reduction of the amplitude of the transient response is obtained by keeping a low dropout regulator circuit in a closed loop condition. This is achieved by manipulation of the reference voltage level when an open loop condition arises due to a falling input voltage. In this case, the reference voltage level is tracked with the input voltage level, keeping the output voltage regulated. As a consequence, the power pass element of the regulator is not forced into the linear region (in the case of a MOSFET) or deep saturation (in the case of a bipolar transistor).

Abstract: A voltage regulator is controlled to improve supply voltage rejection by cancelling an alternating component of a supply voltage signal that is capacitively coupled to a high-impedance node within the voltage regulator. This cancellation is done by capacitively coupling an inverted version of the alternating component to the high-impedance node to thereby substantially cancel the alternating component present on the high-impedance node. The high-impedance node may be a high-impedance voltage reference node of the voltage regulator.

Abstract: A significant reduction of the amplitude of the transient response is obtained by keeping a low dropout regulator circuit in a closed loop condition. This is achieved by manipulation of the reference voltage level when an open loop condition arises due to a falling input voltage. In this case, the reference voltage level is tracked with the input voltage level, keeping the output voltage regulated. As a consequence, the power pass element of the regulator is not forced into the linear region (in the case of a MOSFET) or deep saturation (in the case of a bipolar transistor).

Abstract: A device for generating a reference voltage includes a first non-volatile memory cell provided with a control-gate transistor and a reading transistor. The control-gate transistor includes a gate terminal, a body, a first conduction terminal and a second conduction terminal. The first conduction terminal and the second conduction terminal are connected together to form a control-gate terminal. The reading transistor includes a gate terminal that is connected to the gate terminal of the control-gate transistor to form a floating-gate terminal, a body, a third conduction terminal and a fourth conduction terminal. The device also includes a second, equivalent, memory cell. The source terminal of the first non-volatile memory cell and the source terminal of the second equivalent memory cell are connected together.

Abstract: A method of charging a battery of a device using a battery of a computer powered by the battery, in which the procedure is implemented by a circuit independent of the computer's processors. The method includes supplying a power supply voltage, insufficient to charge a battery, to a computer port, as long as a device is detected as connected to the port, controlling the supply of a charging voltage to the port, while supplying charging voltage to the port, detecting an end of charging condition of a battery of the device, and controlling the cutting off of the charging voltage to the port if the end of charging condition is detected, where this condition is determined according to the intensity of a charging current and according to a quantity of electrical charge supplied to the port and/or of a charging period.

Abstract: A low-dropout linear regulator includes an error amplifier which includes a cascaded arrangement of a differential amplifier and a gain stage. The gain stage includes a transistor driven by the differential amplifier to produce at a drive signal for an output stage of the regulator. The transistor is interposed over its source-drain line between a first resistive load included in a RC network creating a zero in the open loop gain of the regulator, and a second resistive load to produce a drive signal for the output stage of the regulator. The second resistive load is a non-linear compensation element to render current consumption linearly proportional to the load current to the regulator. The first resistive load is a non-linear element causing the frequency of said zero created by the RC network to decrease as the load current of the regulator decreases.

Abstract: An embodiment of the disclosure relates to a voltage converter for supplying a semiconductor light source and having at least an input terminal connected to a power supply reference, namely an AC mains voltage reference, and an output terminal providing a current signal to said semiconductor light source, the converter being also connected to a voltage reference and comprising at least a step-down block inserted between a switching node and to the output terminal and connected to the voltage reference and an input block connected to the input terminal, as well as to a first input node and to a first output node of a control circuit, in turn connected to the switching node and to the voltage reference.