Patents Assigned to STMicroelectronics Design and Application s.r.o.
  • Patent number: 9582017
    Abstract: The reversal of the flow of output current in a voltage regulator is prevented by equipping the voltage regulator of a regulation transistor controlled by an analog voltage control, having its current terminals connected between the control terminal of the fifth transistor power of the regulator and the power supply line or the common ground node of the regulator. The regulation transistor is configured to provide an electrical path of conduction between the control terminal and the power supply line or the ground node and is controlled by an analog voltage control that varies in a continuous manner between a first level, suitable to extinguish the regulation transistor, and a second level suitable for biasing it in an operating condition of deep conduction, as the difference between the supply voltage and the regulated output voltage approaching an offset voltage.
    Type: Grant
    Filed: July 1, 2014
    Date of Patent: February 28, 2017
    Assignee: STMICROELECTRONICS DESIGN AND APPLICATION S.R.O.
    Inventor: Sandor Petenyi
  • Patent number: 9176567
    Abstract: A method of charging a battery of a device using a battery of a computer powered by the battery, in which the procedure is implemented by a circuit independent of the computer's processors. The method includes supplying a power supply voltage, insufficient to charge a battery, to a computer port, as long as a device is detected as connected to the port, controlling the supply of a charging voltage to the port, while supplying charging voltage to the port, detecting an end of charging condition of a battery of the device, and controlling the cutting off of the charging voltage to the port if the end of charging condition is detected, where this condition is determined according to the intensity of a charging current and according to a quantity of electrical charge supplied to the port and/or of a charging period.
    Type: Grant
    Filed: May 29, 2013
    Date of Patent: November 3, 2015
    Assignees: STMicroelectronics Design and Application S.R.O., STMicroelectronics (Grenoble 2) SAS
    Inventors: Christophe Lorin, Benedicte Micheau, Roman Prochazka, Vaclav Jelen, Ondrej Plachy
  • Patent number: 9035639
    Abstract: The present disclosure is directed to a voltage-to-current sensing circuit having a bias terminal configured to receive a reference voltage, an offset terminal configured to receive an offset current, and an operational amplifier configured to output a low voltage signal. The device includes a first amplifier having first and second high voltage inputs configured to receive a first voltage difference across a sense component on a high voltage line and to generate a first current, a second amplifier having first and second low voltage inputs configured to receive a second voltage difference between the bias terminal and the offset terminal and to generate a second current, a summing circuit configured to provide an intermediate voltage corresponding to a sum of the first and the second currents, and a low-voltage transistor coupled to an output of the amplifier and controlled by the intermediate voltage to generate the output current.
    Type: Grant
    Filed: December 11, 2012
    Date of Patent: May 19, 2015
    Assignee: STMICROELECTRONICS DESIGN AND APPLICATION S.R.O.
    Inventor: Martin Drinovsky
  • Patent number: 8981746
    Abstract: A low-dropout linear regulator includes an error amplifier which includes a cascaded arrangement of a differential amplifier and a gain stage. The gain stage includes a transistor driven by the differential amplifier to produce at a drive signal for an output stage of the regulator. The transistor is interposed over its source-drain line between a first resistive load included in a RC network creating a zero in the open loop gain of the regulator, and a second resistive load to produce a drive signal for the output stage of the regulator. The second resistive load is a non-linear compensation element to render current consumption linearly proportional to the load current to the regulator. The first resistive load is a non-linear element causing the frequency of said zero created by the RC network to decrease as the load current of the regulator decreases.
    Type: Grant
    Filed: March 15, 2012
    Date of Patent: March 17, 2015
    Assignee: STMicroelectronics Design and Application S.R.O.
    Inventor: Karel Napravnik
  • Patent number: 8928252
    Abstract: An embodiment of the disclosure relates to a voltage converter for supplying a semiconductor light source and having at least an input terminal connected to a power supply reference, namely an AC mains voltage reference, and an output terminal providing a current signal to said semiconductor light source, the converter being also connected to a voltage reference and comprising at least a step-down block inserted between a switching node and to the output terminal and connected to the voltage reference and an input block connected to the input terminal, as well as to a first input node and to a first output node of a control circuit, in turn connected to the switching node and to the voltage reference.
    Type: Grant
    Filed: July 9, 2010
    Date of Patent: January 6, 2015
    Assignee: STMicroelectronics Design and Application S.R.O.
    Inventors: Karel Blaha, Jan Milsimer
  • Patent number: 8897467
    Abstract: An electronic amplifier for driving a capacitive load may include first and second differential input terminals to receive an input signal, and first and second differential output terminals to provide a differential output signal. The amplifier may further include a first operational device having first and second differential inputs connected to the first and second differential input terminals, respectively, and an output connected to the first differential output terminal, and a second operational device having first and second differential inputs connected to the first and second differential input terminals, respectively, and an output connected to the second differential output terminal. The first and second operational devices may be operatively configured so that both the first and the second output terminals are at a same reference potential during periods in which a magnitude of differential output signal amplitude decreases.
    Type: Grant
    Filed: December 22, 2010
    Date of Patent: November 25, 2014
    Assignee: STMicroelectronics Design and Application S.R.O.
    Inventors: Peter Murin, Tomas Folk, Pavel Panus
  • Patent number: 8674615
    Abstract: A control apparatus for LED diodes includes a dimmer TRIAC electrically connected in series between a power supply and a LED lighting converter. The converter comprises a transformer, with a primary winding coupled with an input terminal and a secondary winding coupled with an output terminal, and a switch coupled to the primary winding to regulate the current through the primary winding and regulate the output voltage. The apparatus comprises a control device adapted to control said switch determining the on period and the off period of the switch to maintain constant the output current to supply said LED diodes. The apparatus comprises a detector connected to the secondary winding of the transformer and adapted to detect the conduction angle of the TRIAC; the control device is adapted to regulate the output current to supply said LED diodes in response to the TRIAC conduction angle detected by the detector.
    Type: Grant
    Filed: January 9, 2012
    Date of Patent: March 18, 2014
    Assignee: STMicroelectronics Design and Application S.R.O.
    Inventors: Pavel Koutensky, Ales Loidl, Jiri Smutka, Jakub Hajek
  • Publication number: 20130154595
    Abstract: The present disclosure is directed to a voltage-to-current sensing circuit having a bias terminal configured to receive a reference voltage, an offset terminal configured to receive an offset current, and an operational amplifier configured to output a low voltage signal. The device includes a first amplifier having first and second high voltage inputs configured to receive a first voltage difference across a sense component on a high voltage line and to generate a first current, a second amplifier having first and second low voltage inputs configured to receive a second voltage difference between the bias terminal and the offset terminal and to generate a second current, a summing circuit configured to provide an intermediate voltage corresponding to a sum of the first and the second currents, and a low-voltage transistor coupled to an output of the amplifier and controlled by the intermediate voltage to generate the output current.
    Type: Application
    Filed: December 11, 2012
    Publication date: June 20, 2013
    Applicant: STMICROELECTRONICS DESIGN AND APPLICATION S.R.O.
    Inventor: STMicroelectronics Design and Application S.R.O
  • Patent number: 8415978
    Abstract: A state machine for generating signals configured for generating different signals according to the current state of the machine. The state machine is configured to change state both as a function of an internal timer and as a function of signals representative of events external to the state machine.
    Type: Grant
    Filed: December 22, 2009
    Date of Patent: April 9, 2013
    Assignees: STMicroelectronics s.r.l., STMicroelectronics Design and Application s.r.o.
    Inventors: Ales Loidl, Ignazio Bellomo, Luca Giussani, David Vincenzoni
  • Patent number: 8403648
    Abstract: A compressor control device includes a driving circuit, for controllably supplying a coil of an electric motor of a compressor. A temperature sensor is thermally coupled to the driving circuit and provides a temperature sensing signal correlated to a temperature in the driving circuit. A control stage, coupled to the driving circuit and to the temperature sensor, selectively prevents the driving circuit from supplying the coil, in response to a minimum temperature increment being detected by the temperature sensor within a pre-determined control time window.
    Type: Grant
    Filed: January 18, 2008
    Date of Patent: March 26, 2013
    Assignee: STMicroelectronics Design and Application s.r.o.
    Inventor: Albert Boscarato
  • Patent number: 8354878
    Abstract: An electronic integrated device may include a signal generation stage arranged to generate a first signal representative of an under voltage lockout logic signal. The signal generation stage may include a voltage divider block arranged to provide an internal reference voltage signal to a bandgap core group based upon a reference signal. The bandgap core group may generate the first signal based upon the internal reference voltage signal. The bandgap core group may further include a first generation module arranged to generate a output regulated reference voltage signal based upon the internal reference voltage signal, and a second generation module arranged to generate the first signal based upon the internal reference voltage signal and a driving signal obtained by a preliminary processing of the internal reference voltage signal by a bandgap core module included within the band gap core group.
    Type: Grant
    Filed: December 22, 2010
    Date of Patent: January 15, 2013
    Assignee: STMicroelectronics Design and Application S.R.O.
    Inventor: Sandor Petenyi
  • Patent number: 8324944
    Abstract: A startup circuitry connected to a main circuit which has at least an output terminal connected to its feedback terminal by a feedback loop. The startup circuitry is connected to the main circuit in such a manner to break the feedback loop, by having a first circuit node connected to said output terminal of said main circuit and a second circuit node connected to its feedback terminal, said startup circuitry providing a correct output voltage value during the startup phase of said main circuit.
    Type: Grant
    Filed: May 25, 2010
    Date of Patent: December 4, 2012
    Assignee: STMicroelectronics Design and Application S.R.O.
    Inventor: Jaromir Schindler
  • Patent number: 8242761
    Abstract: A low-dropout linear regulator includes an error amplifier comprising a cascaded arrangement of a differential amplifier and a gain stage having interposed therebetween a frequency compensation network for a loading current to flow therethrough. The regulator includes a current limiter inserted the flow-path of the loading current for the compensation network to increase the slew rate of the output of the differential amplifier by dispensing with the capacitive load in the frequency compensation network during load transients in the regulator.
    Type: Grant
    Filed: November 18, 2009
    Date of Patent: August 14, 2012
    Assignee: STMicroelectronics Design and Application s.r.o.
    Inventor: Karel Napravnik
  • Publication number: 20120181998
    Abstract: A low-dropout linear regulator includes an error amplifier which includes a cascaded arrangement of a differential amplifier and a gain stage. The gain stage includes a transistor driven by the differential amplifier to produce at a drive signal for an output stage of the regulator. The transistor is interposed over its source-drain line between a first resistive load included in a RC network creating a zero in the open loop gain of the regulator, and a second resistive load to produce a drive signal for the output stage of the regulator. The second resistive load is a non-linear compensation element to render current consumption linearly proportional to the load current to the regulator. The first resistive load is a non-linear element causing the frequency of said zero created by the RC network to decrease as the load current of the regulator decreases.
    Type: Application
    Filed: March 15, 2012
    Publication date: July 19, 2012
    Applicant: STMicroelectronics Design and Application s.r.o.
    Inventor: Karel NAPRAVNIK
  • Publication number: 20120176057
    Abstract: A control apparatus for LED diodes includes a dimmer TRIAC electrically connected in series between a power supply and a LED lighting converter. The converter comprises a transformer, with a primary winding coupled with an input terminal and a secondary winding coupled with an output terminal, and a switch coupled to the primary winding to regulate the current through the primary winding and regulate the output voltage. The apparatus comprises a control device adapted to control said switch determining the on period and the off period of the switch to maintain constant the output current to supply said LED diodes. The apparatus comprises a detector connected to the secondary winding of the transformer and adapted to detect the conduction angle of the TRIAC; the control device is adapted to regulate the output current to supply said LED diodes in response to the TRIAC conduction angle detected by the detector.
    Type: Application
    Filed: January 9, 2012
    Publication date: July 12, 2012
    Applicant: STMICROELECTRONICS DESIGN AND APPLICATION S.R.O.
    Inventors: Pavel Koutensky, Ales Loidl, Jiri Smutka, Jakub Hajek
  • Patent number: 8213194
    Abstract: A control device for regulating the constant output current of a flyback converter, the control device adapted to control the on time period and the off time period of a primary winding switch and including a first circuit adapted to multiply a first signal representative of current flowing through the primary winding and a second signal representative of an input voltage and outputting a signal representative of the multiplication, a second circuit adapted to compare the output signal of the first circuit and a third signal representative of the direct output voltage, the control device determining, on the basis of the output signal of the second circuit, the on time period and the off time period of the switch so that the output signal of the first circuit is equal to the signal representative of the direct output signal to have the output current of the flyback converter constant.
    Type: Grant
    Filed: May 18, 2010
    Date of Patent: July 3, 2012
    Assignee: STMicroelectronics Design and Application S.R.O.
    Inventor: Pavel Koutensky
  • Patent number: 8154265
    Abstract: A low-dropout linear regulator includes an error amplifier which includes a cascaded arrangement of a differential amplifier and a gain stage. The gain stage includes a transistor driven by the differential amplifier to produce at a drive signal for an output stage of the regulator. The transistor is interposed over its source-drain line between a first resistive load included in a RC network creating a zero in the open loop gain of the regulator, and a second resistive load to produce a drive signal for the output stage of the regulator. The second resistive load is a non-linear compensation element to render current consumption linearly proportional to the load current to the regulator. The first resistive load is a non-linear element causing the frequency of said zero created by the RC network to decrease as the load current of the regulator decreases.
    Type: Grant
    Filed: November 18, 2009
    Date of Patent: April 10, 2012
    Assignee: STMicroelectronics Design and Application S.R.O.
    Inventor: Karel Napravnik
  • Patent number: 8134187
    Abstract: Integrated mask-programmable device, having a plurality of metal levels including a top metal level, a bottom metal level and a first intermediate metal level formed between the top and bottom metal levels, and a plurality of via levels arranged between the bottom and the first intermediate metal levels and between the first intermediate and the top metal levels and connecting each metal level to adjacent metal levels. The plurality of metal levels forms a first, a second and at least a third terminal, the top and bottom metal levels having at least two metal regions, and the first intermediate metal level having at least three metal regions. The first terminal is connected to third terminal or the second terminal is connected to the third terminal by modifying a single metal or via level.
    Type: Grant
    Filed: December 24, 2008
    Date of Patent: March 13, 2012
    Assignee: STMicroelectronics Design and Application s.r.o.
    Inventors: Patrik Vacula, Milos Vacula, Milan Lzicar
  • Patent number: 8058926
    Abstract: A switch including a first transistor including a first main terminal connected to a first switch node, a second main terminal connected to a second switch node and a control terminal, the second switch node being connected to a first clean voltage supply, and first control circuitry connected to the control terminal of the first transistor, including a first node connected to the first clean voltage supply, a second node connected to a second voltage level, and a control input node for receiving a first input control signal variable between a supply voltage level and a third voltage level, the first control means arranged to selectively connect the control terminal of the first transistor to one of the first node and the second node based on the first input control signal.
    Type: Grant
    Filed: January 19, 2007
    Date of Patent: November 15, 2011
    Assignees: STMicroelectronics Design and Application s.r.o., STMicroelectronics S.A.
    Inventors: Hynek Saman, Peter Murin, Martin Boksa, Pavel Panus
  • Patent number: 8040172
    Abstract: A logic level converter includes two first electronic switches coupled in a bi-stable flip-flop arrangement having at least one output line, and a forcing circuitry including two second electronic switches to force switching of the first electronic switches in the flip-flop arrangement. The forcing circuitry has an input terminal to receive a logic input signal having a given level to produce switching of the flip-flop arrangement and generate at the output line(s) of the flip-flop arrangement, a logic output signal(s) whose voltage level is converted with respect to the level of the logic input signal. The converter includes, interposed between each of the two first electronic switches in the flip-flop arrangement and a respective one of the second electronic switches in the forcing circuitry, at least one respective cascode electronic switch to limit the voltage across the two first electronic switches in the flip-flop arrangement.
    Type: Grant
    Filed: November 18, 2009
    Date of Patent: October 18, 2011
    Assignee: STMicroelectronics Design and Application s.r.o.
    Inventors: Tomas Jerabek, Karel Napravnik