Patents Assigned to STMicroelectronics (Malta) Ltd.
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Patent number: 10600704Abstract: A support substrate has a face above which at least one electronic component is fixed. A peripheral area of the face includes an annular local metal layer. An encapsulating cover for the electronic component includes a peripheral wall having an end edge that is mounted above the peripheral area. The annular metal local layer includes, at the periphery thereof, a series of spaced-apart teeth with notches formed therebetween. The teeth extend as far as the peripheral edge of the support substrate.Type: GrantFiled: September 17, 2018Date of Patent: March 24, 2020Assignees: STMicroelectronics (Grenoble 2) SAS, STMicroelectronics (Malta) LtdInventors: Jerome Lopez, Roseanne Duca
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Patent number: 10435290Abstract: A MEMS device having a wafer-level package, is provided with: a stack of a first die and a second die, defining at least a first internal surface internal to the package and carrying at least an electrical contact pad, and at least a first external surface external to the package and defining a first outer face of the package; and a mold compound, at least in part coating the stack of the first and second dies and having a front surface defining at least part of a second outer face of the package, opposite to the first outer face. The MEMS device is further provided with: at least a vertical connection structure extending from the contact pad at the first internal surface towards the front surface of the mold compound; and at least an external connection element, electrically coupled to the vertical connection structure and exposed to the outside of the package, at the second outer face thereof.Type: GrantFiled: October 4, 2017Date of Patent: October 8, 2019Assignee: STMicroelectronics (Malta) LtdInventors: Conrad Cachia, David Oscar Vella, Damian Agius, Maria Spiteri
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Patent number: 10431514Abstract: One or more embodiments are directed to a semiconductor package that includes transparent encapsulation material and an opaque encapsulation material. In one embodiment, the opaque encapsulation material is thicker than the transparent encapsulation material; however, the outer surfaces of the opaque and the transparent encapsulation materials are coplanar with each other.Type: GrantFiled: November 20, 2017Date of Patent: October 1, 2019Assignee: STMicroelectronics (Malta) LtdInventors: David Bonnici, Brenda Farrugia
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Patent number: 10357964Abstract: One or more embodiments are directed to a microfluidic assembly that includes an interconnect substrate coupled to a microfluidic die. In one embodiment, the microfluidic die includes a ledge with a plurality of bond pads. The microfluidic assembly further includes an interconnect substrate having an end resting on the ledge proximate the bond pads. In another embodiment, the interconnect substrate abuts a side surface of the ledge or is located proximate the ledge. Conductive elements couple the microfluidic die to contacts of the interconnect substrate. Encapsulant is located over the conductive elements, the bond pads, the contacts.Type: GrantFiled: March 9, 2018Date of Patent: July 23, 2019Assignees: STMicroelectronics, Inc., STMicroelectronics (Malta) LtdInventors: Simon Dodd, Ivan Ellul, Christopher Brincat
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Patent number: 10329143Abstract: A packaged MEMS device, wherein at least two support structures are stacked on each other and are formed both by a support layer and a wall layer coupled to each other and delimiting a respective chamber. The chamber of the first support structure is upwardly delimited by the support layer of the second support structure. A first and a second dice are accommodated in a respective chamber, carried by the respective support layer of the first support structure. The support layer of the second support structure has a through hole allowing wire connections to directly couple the first and the second dice. A lid substrate, coupled to the second support structure, closes the chamber of the second support structure.Type: GrantFiled: December 21, 2015Date of Patent: June 25, 2019Assignee: STMicroelectronics (Malta) LtdInventor: Kevin Formosa
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Publication number: 20190088562Abstract: A support substrate has a face above which at least one electronic component is fixed. A peripheral area of the face includes an annular local metal layer. An encapsulating cover for the electronic component includes a peripheral wall having an end edge that is mounted above the peripheral area. The annular metal local layer includes, at the periphery thereof, a series of spaced-apart teeth with notches formed therebetween. The teeth extend as far as the peripheral edge of the support substrate.Type: ApplicationFiled: September 17, 2018Publication date: March 21, 2019Applicants: STMicroelectronics (Grenoble 2) SAS, STMicroelectronics (Malta) LtdInventors: Jerome LOPEZ, Roseanne DUCA
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Patent number: 10225635Abstract: A microelectromechanical microphone includes: a substrate; a sensor chip, integrating a microelectromechanical electroacoustic transducer; and a control chip operatively coupled to the sensor chip. In one embodiment, the sensor chip and the control chip are bonded to the substrate, and the sensor chip overlies, or at least partially overlies, the control chip. In another embodiment, the sensor is bonded to the substrate and a barrier is located around at least a portion of the sensor chip.Type: GrantFiled: April 29, 2016Date of Patent: March 5, 2019Assignees: STMicroelectronics S.r.l., STMicroelectronics (Malta) LtdInventors: Roberto Brioschi, Alex Gritti, Kevin Formosa, Paul Anthony Barbara
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Patent number: 9950511Abstract: One or more embodiments are directed to a microfluidic assembly that includes an interconnect substrate coupled to a microfluidic die. In one embodiment, the microfluidic die includes a ledge with a plurality of bond pads. The microfluidic assembly further includes an interconnect substrate having an end resting on the ledge proximate the bond pads. In another embodiment, the interconnect substrate abuts a side surface of the ledge or is located proximate the ledge. Conductive elements couple the microfluidic die to contacts of the interconnect substrate. Encapsulant is located over the conductive elements, the bond pads, the contacts.Type: GrantFiled: September 27, 2016Date of Patent: April 24, 2018Assignees: STMICROELECTRONICS, INC., STMICROELECTRONICS (MALTA) LTDInventors: Simon Dodd, Ivan Ellul, Christopher Brincat
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Patent number: 9802813Abstract: A MEMS device having a wafer-level package, is provided with: a stack of a first die and a second die, defining at least a first internal surface internal to the package and carrying at least an electrical contact pad, and at least a first external surface external to the package and defining a first outer face of the package; and a mold compound, at least in part coating the stack of the first and second dies and having a front surface defining at least part of a second outer face of the package, opposite to the first outer face. The MEMS device is further provided with: at least a vertical connection structure extending from the contact pad at the first internal surface towards the front surface of the mold compound; and at least an external connection element, electrically coupled to the vertical connection structure and exposed to the outside of the package, at the second outer face thereof.Type: GrantFiled: September 21, 2015Date of Patent: October 31, 2017Assignee: STMICROELECTRONICS (MALTA) LTDInventors: Conrad Cachia, David Oscar Vella, Damian Agius, Maria Spiteri
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Patent number: 9769554Abstract: A semiconductor integrated device, comprising: a package defining an internal space and having an acoustic-access opening in acoustic communication with an environment external to the package; a MEMS acoustic transducer, housed in the internal space and provided with an acoustic chamber facing the acoustic-access opening; and a filtering module, which is designed to inhibit passage of contaminating particles having dimensions larger than a filtering dimension and is set between the MEMS acoustic transducer and the acoustic-access opening. The filtering module defines at least one direct acoustic path between the acoustic-access opening and the acoustic chamber.Type: GrantFiled: November 17, 2015Date of Patent: September 19, 2017Assignees: STMICROELECTRONICS (MALTA) LTD, STMICROELECTRONICS S.R.L.Inventors: Roberto Brioschi, Silvia Adorno, Kenneth Fonk
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Patent number: 9698040Abstract: A semiconductor device carrier tape with image sensor detectable dimples is disclosed. The dimpled carrier tape is formed of a flexible strip of material. A plurality of pockets are disposed spaced apart along the length of the flexible strip of material. Each pocket is configured to hold a semiconductor device. A dimple is formed in each of the plurality of pockets where each dimple has a peripheral edge and a bottom surface. Detection of the dimple by an image sensor facilitates alignment of a semiconductor device with the pocket and precise placement of the semiconductor device in the pocket.Type: GrantFiled: October 29, 2015Date of Patent: July 4, 2017Assignee: STMicroelectronics (Malta) LtdInventors: Jeremy Spiteri, Ivan Ellul
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Publication number: 20170125276Abstract: A semiconductor device carrier tape with image sensor detectable dimples is disclosed. The dimpled carrier tape is formed of a flexible strip of material. A plurality of pockets are disposed spaced apart along the length of the flexible strip of material. Each pocket is configured to hold a semiconductor device. A dimple is formed in each of the plurality of pockets where each dimple has a peripheral edge and a bottom surface. Detection of the dimple by an image sensor facilitates alignment of a semiconductor device with the pocket and precise placement of the semiconductor device in the pocket.Type: ApplicationFiled: October 29, 2015Publication date: May 4, 2017Applicant: STMicroelectronics (Malta) LtdInventors: Jeremy Spiteri, Ivan Ellul
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Patent number: 9620438Abstract: An electronic device includes an integrated circuit chip mounted to a heat slug. The heat slug has a peripheral region having first thickness along a first direction, the peripheral region surrounding a recess region (having a second, smaller, thickness along the first direction) that defines a chip mounting surface along a second direction perpendicular to the first direction. The recess region defines side borders and a nook extends into the heat slug along the side borders. An insulating body embeds the integrated circuit one chip and heat slug. Material of the insulating body fills the nook.Type: GrantFiled: February 6, 2015Date of Patent: April 11, 2017Assignees: STMICROELECTRONICS (MALTA) LTD, STMICROELECTRONICS S.R.L., STMICROELECTRONICS PTE LTDInventors: Roseanne Duca, Valter Motta, Xueren Zhang, Kim-Yong Goh
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Patent number: 9527727Abstract: One or more embodiments of the present disclosure are directed to packages that include a stacked microelectromechanical sensor MEMS die and an application-specific integrated circuit (ASIC) die. The smaller of the MEMS die and the ASIC die is stacked on the larger of the MEMS die and the ASIC die. The larger of the two dice may form one or more dimensions of the package. In one embodiment, a bottom surface of the larger of the two dice forms an outer surface of the package. In that regard, the package may take less lateral space on another component, such as a board or other package.Type: GrantFiled: September 26, 2014Date of Patent: December 27, 2016Assignee: STMICROELECTRONICS (MALTA) LTDInventor: Conrad Cachia
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Publication number: 20160368098Abstract: An electronic component includes one or more circuits having a front surface and a light-permeable package material. A lid member is attached to a front surface of the circuit. The lid member is made, for example, of a light-blocking material such as a semiconductor or metal material. A laser marking is applied onto the lid member.Type: ApplicationFiled: April 21, 2016Publication date: December 22, 2016Applicant: STMicroelectronics (Malta) LtdInventors: Kenneth Fonk, Kevin Formosa
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Patent number: 9446943Abstract: A wafer-level packaging, comprising: a first semiconductor body integrating a MEMS structure; a second semiconductor body, including a surface electrical-contact region and an ASIC coupled to the MEMS structure and to said electrical-contact region; a first coating layer, made of resin, which englobes and protects the first body, the second body, and the electrical-contact region; at least one first conductive through via, which extends through the first coating layer in an area corresponding, and electrically coupled, to the first electrical-contact region; an electrical-contact pad, which extends over the first coating layer, electrically coupled to the first conductive through via; a third semiconductor body, integrating an electronic circuit, glued on the first coating layer; a second coating layer, made of resin, which englobes and protects the third body; at least one second conductive through via, which extends completely through the second coating layer in an area corresponding, and electrically couplType: GrantFiled: May 27, 2014Date of Patent: September 20, 2016Assignees: STMicroelectronics S.r.l., STMicroelectronics (Malta) LtdInventors: Kevin Formosa, Luca Maggi
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Patent number: 9449912Abstract: An integrated circuit (IC) module for an IC card includes a plurality of IC card contacts in side-by-side relation. A dielectric support layer is above the contact layer and has a plurality of openings and a first coefficient of thermal expansion (CTE). An IC die is above the dielectric support layer and includes a plurality of bond pads. A bond wire extends from a respective bond pad to a corresponding contact through an adjacent opening in the dielectric support layer. A respective body of fill material is within each opening and has a second CTE. A mold compound body is above the dielectric support layer, the bodies of fill material, and surrounding the IC die. The mold compound body has a third CTE. The first CTE is closer to the second CTE than to the third CTE.Type: GrantFiled: June 11, 2015Date of Patent: September 20, 2016Assignees: STMICROELECTRONICS PTE LTD, STMICROELECTRONICS (MALTA) LTDInventors: Xueren Zhang, Kim-Yong Goh, Roseanne Duca
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Patent number: 9401349Abstract: A stack of chips is formed by a first integrated-circuit chip and a second integrated-circuit chip. The chips have opposing faces which are separated from each other by an interposed spacer. The spacer is fastened by adhesion to only one of the opposing faces. The opposing faces are fastened to each other by a local adhesive which is separate from spacer.Type: GrantFiled: May 28, 2015Date of Patent: July 26, 2016Assignees: STMICROELECTRONICS (GRENOBLE 2) SAS, STMICROELECTRONICS (MALTA) LTD, STMICROELECTRONICS S.R.L.Inventors: Angelo Crobu, Kenneth Fonk, Romain Coffy
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Patent number: 9390988Abstract: One embodiment discloses a method for soldering a cap for an integrated electronic device to a support layer, including the steps of: providing a support layer; providing a cap including a core of a first material and a coating layer of a second material, the first and second material being respectively wettable and non-wettable with respect to a solder, the coating layer being arranged so as to expose a surface of the core; coupling the cap with the support layer; and soldering the surface of the core to the support layer, by means of the solder.Type: GrantFiled: September 28, 2012Date of Patent: July 12, 2016Assignee: STMicroelectronics (Malta) LtdInventors: Mark A. Azzopardi, Kevin Formosa, Ivan Ellul
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Patent number: 9290377Abstract: A method of stacking a plurality of first dies to a respective plurality of second dies, each one of the first dies having a surface including a surface coupling region which is substantially flat, each one of the second dies having a respective surface including a respective surface coupling region which is substantially flat, the method comprising the steps of: forming, by means of a screen printing technique, an adhesive layer on the first dies at the respective surface coupling regions; and arranging the surface coupling region of each second die in direct physical contact with a respective adhesive layer of a respective first die among said plurality of first dies.Type: GrantFiled: November 26, 2014Date of Patent: March 22, 2016Assignee: STMicroelectronics (Malta) LtdInventors: Conrad Cachia, Kenneth Fonk