Patents Assigned to STMicroelectronics
  • Frequency synthesizer with dynamically selected level shifting of the oscillating output signal
    Patent number: 10771073
    Abstract: An oscillator circuit powered by a source voltage generates an oscillating output signal. The oscillating output signal is level shifted and applied to a first input of a multiplexer. A second input of the multiplexer receives the oscillating output signal. The multiplexer selects one of the oscillating output signal and the level shifted oscillating output signal for output as a selected oscillating output signal in response to a select signal. A locked loop circuit generates controls a frequency of the oscillating output signal as a function of the selected oscillating output signal and a reference oscillating signal. The select signal further selects one of a reference voltage and the source voltage of the oscillator circuit as an error amplifier reference voltage for a voltage regulator circuit that generates the first power supply voltage.
    Type: Grant
    Filed: November 26, 2019
    Date of Patent: September 8, 2020
    Assignee: STMicroelectronics International N.V.
    Inventor: Nitin Gupta
  • Process for manufacturing a MEMS micromirror device, and associated device
    Patent number: 10768408
    Abstract: A buried cavity is formed in a monolithic body to delimit a suspended membrane. A peripheral insulating region defines a supporting frame in the suspended membrane. Trenches extending through the suspended membrane define a rotatable mobile mass carried by the supporting frame. The mobile mass forms an oscillating mass, supporting arms, spring portions, and mobile electrodes that are combfingered to fixed electrodes of the supporting frame. A reflecting region is formed on top of the oscillating mass.
    Type: Grant
    Filed: March 21, 2017
    Date of Patent: September 8, 2020
    Assignee: STMicroelectronics S.r.l.
    Inventors: Enri Duqi, Lorenzo Baldo, Roberto Carminati, Flavio Francesco Villa
  • INTERFERENCE-CANCELING RF RECEIVER CIRCUIT, CORRESPONDING SYSTEM, RADAR SENSOR SYSTEM, VEHICLE AND METHOD
    Publication number: 20200278420
    Abstract: An input receives a radio frequency (RF) signal having an interfering component superimposed thereon. The RF signal is mixed with a local oscillator (LO) signal and down-converted to an intermediate frequency (IF) to generate a mixed signal which includes a frequency down-converted interfering component. The mixed signal is amplified by an amplifier to generate an output signal. A feedback loop processes the output signal to generate a correction signal for cancelling the frequency down-converted interfering component at the input of the amplifier. The feedback loop includes a low-pass filter and a amplification circuit which outputs the correction signal.
    Type: Application
    Filed: February 20, 2020
    Publication date: September 3, 2020
    Applicant: STMicroelectronics S.r.l.
    Inventors: Giuseppe PAPOTTO, Egidio RAGONESE, Claudio NOCERA, Alessandro FINOCCHIARO, Giuseppe PALMISANO
  • N-channel input pair voltage regulator with soft start and current limitation circuitry
    Patent number: 10761551
    Abstract: A voltage regulator includes two input pairs of opposite type transistors, p-type and n-type, to provide a soft-start functionality for gradually increasing the voltage regulator's output voltage from zero, or a voltage below the thresholds of the n-type transistors, to an operational voltage. The voltage regulator operates in a soft-start mode during which a variable input voltage signal is ramped up to allow the output voltage to reach the operational voltage, and a normal-operation mode during which the operational voltage is maintained.
    Type: Grant
    Filed: June 25, 2019
    Date of Patent: September 1, 2020
    Assignee: STMicroelectronics (China) Investment Co. Ltd
    Inventors: Zhenghao Cui, Fei Wang, Ming Jiang
  • Integrated circuit having a hidden shared contact
    Patent number: 10763213
    Abstract: An integrated circuit includes a substrate and an interconnect. A substrate zone is delineated by an insulating zone. A polysilicon region extends on the insulating zone and includes a strip part. An isolating region is situated between the substrate and the interconnect and covers the substrate zone and the polysilicon region. A first electrically conductive pad passes through the isolating region and has a first end in electrical contact with both the strip part and the substrate zone. A second end of the electrically conductive pad is in electrical contact with the interconnect. A second electrically conductive pad also passes through the isolating region to make electrical contact with another region. The first and second electrically conductive pads have equal or substantially equal cross sectional sizes, within a tolerance.
    Type: Grant
    Filed: July 17, 2018
    Date of Patent: September 1, 2020
    Assignee: STMicroelectronics (Rousset) SAS
    Inventors: Julien Delalleau, Christian Rivero
  • VOLTAGE REGULATOR WITH CONTROLLED CURRENT CONSUMPTION IN DROPOUT MODE
    Publication number: 20200272184
    Abstract: An amplifier stage of an LDO regulator circuit includes an amplifier stage that generates a drive signal in response to a first voltage difference an output voltage of the LDO regulator circuit and a reference voltage. A drive stage having a quiescent current consumption is configured to generate a control signal in response to the drive signal. The control signal is applied to the control terminal of a power transistor. A dropout detector senses whether the LDO regulator circuit is operating in closed loop regulation mode or in open loop dropout mode by sensing a second difference in voltage between the drive signal and the control signal. A quiescent current limiter circuit responds to the sensed second difference by controlling the quiescent current consumption of the drive stage, and in particular limiting current consumption when the LDO regulator circuit is operating in the open loop dropout mode.
    Type: Application
    Filed: February 26, 2019
    Publication date: August 27, 2020
    Applicant: STMicroelectronics Design and Application S.R.O.
    Inventor: Sandor PETENYI
  • METHOD FOR ARBITRATING ACCESS TO A SHARED MEMORY, AND CORRESPONDING ELECTRONIC DEVICE
    Publication number: 20200272584
    Abstract: Access to a memory shared between a first interface and a second interface is arbitrated. Following a request to access the memory emanating from the second interface, while current access to the memory is granted to the first interface, a count is triggered having a maximum count time. A access to the memory is authorized for the second interface at the end of occupation of the access granted to the first interface if the end of occupation finishes before the end of the maximum count time, or otherwise at the end of the maximum count time.
    Type: Application
    Filed: February 19, 2020
    Publication date: August 27, 2020
    Applicant: STMicroelectronics (Grenoble 2) SAS
    Inventor: Jean-Louis LABYRE
  • METHOD AND DEVICE FOR ON-BOARD DETECTION OF POTENTIAL FAULTS IN A SYSTEM FIXED ONTO THE BOARD
    Publication number: 20200271716
    Abstract: An electronic assembly includes a board and a system mounted to the board. The system includes an impedance matching circuit coupled to a contactless component. A detection circuit operates to carrying out a process for detecting on the board of potential faults in the system mounted to the board. The detection circuit includes a circuit incorporated into the contactless component itself and configured to carrying out a first part of the process for detecting. A processing circuit of the detection circuit performs a second part of the process for detecting based on results of the first part.
    Type: Application
    Filed: February 19, 2020
    Publication date: August 27, 2020
    Applicant: STMicroelectronics (Rousset) SAS
    Inventor: Nicolas CORDIER
  • DEVICE OF PHYSICALLY UNCLONABLE FUNCTION WITH FLOATING GATE TRANSISTORS, AND MANUFACTURING METHOD
    Publication number: 20200274723
    Abstract: In accordance with an embodiment, a physically unclonable function device includes a set of floating gate transistor pairs, floating gate transistors of the set of floating gate transistor pairs having a randomly distributed effective threshold voltage belonging to a common random distribution; a differential read circuit configured to measure a threshold difference between the effective threshold voltages of floating gate transistors of floating gate transistor pairs of the set of floating gate transistor pairs, and to identify a floating gate transistor pair in which the measured threshold difference is smaller than a margin value as being an unreliable floating gate transistor pair; and a write circuit configured to shift the effective threshold voltage of a floating gate transistor of the unreliable floating gate transistor pair to be inside the common random distribution.
    Type: Application
    Filed: February 7, 2020
    Publication date: August 27, 2020
    Applicant: STMicroelectronics (Rousset) SAS
    Inventor: Francesco La Rosa
  • Switched mode power supply circuit
    Patent number: 10756628
    Abstract: An electronic circuit includes a switched-mode power supply powering a first load via a first linear voltage regulator. The first regulator includes a transistor. The substrate and the gate of the transistor are capable of being coupled to a node of application of a power supply voltage. A method of operating the circuit is also disclosed.
    Type: Grant
    Filed: May 9, 2019
    Date of Patent: August 25, 2020
    Assignee: STMicroelectronics (Rousset) SAS
    Inventors: Michel Cuenca, Cedric Thomas
  • Integrated microfluidic circuit with electrowetting-based operation and corresponding microfluidic system
    Patent number: 10753904
    Abstract: An integrated fluidic circuit has a supporting surface that carries a first fluid to be moved at a first functional region; a dielectric structure, defining the supporting surface; and an electrode structure, coupled to the dielectric structure for generating an electric field at the first functional region, such as to modify electrowetting properties of the interface between the first fluid and the supporting surface. The dielectric structure has a first spatially variable dielectric profile at the first functional region, thus determining a corresponding spatially variable profile of the electric field, and, consequently, of the electrowetting properties of the interface between the first fluid and the supporting surface. The integrated fluidic circuit may achieve mixing between the first fluid and a second fluid.
    Type: Grant
    Filed: April 26, 2018
    Date of Patent: August 25, 2020
    Assignee: STMicroelectronics S.r.l.
    Inventor: Alessandro Paolo Bramanti
  • Transformed non-reprogrammable memory array devices and methods of manufacture
    Patent number: 10755777
    Abstract: The ROM device has a memory array including memory cells formed by an access element and a data storage element; a high voltage column decoder stage; a high voltage row decoder stage; an analog stage; and a writing stage, wherein the data storage elements are electrically non-programmable and non-modifiable. The memory array is formed by memory cells having a first logic state and by memory cells having a second logic state. The data storage element of the memory cells having the first logic state is formed by a continuous conductive path uninterruptedly connecting the access transistor to the respective bit line, the data storage element of the memory cells having the second logic state is formed by a region of dielectric material insulating the access transistor from the respective bit line.
    Type: Grant
    Filed: October 24, 2018
    Date of Patent: August 25, 2020
    Assignee: STMicroelectronics S.R.L.
    Inventors: Marcella Carissimi, Marco Pasotti, Chantal Auricchio
  • Random number generator
    Patent number: 10754618
    Abstract: A random number generation device includes conductive lines including interruptions and a number of conductive vias. A via is located at each interruption. Each via randomly fills or does not fill the interruption. A circuit is capable of determining the electric continuity or lack of continuity of the conductive lines.
    Type: Grant
    Filed: July 16, 2018
    Date of Patent: August 25, 2020
    Assignees: STMicroelectronics (Rousset) SAS, STMicroelectronics (Crolles 2) SAS
    Inventors: Benoit Froment, Sebastien Petitdidier, Mathieu Lisart, Jean-Marc Voisin
  • NON-VOLATILE MEMORY WITH DOUBLE CAPA IMPLANT
    Publication number: 20200265894
    Abstract: An EEPROM includes a floating gate transistor having a source region, a channel region and a drain region. A first capa implant zone on a drain-side of the floating gate transistor has a first dopant concentration level. A second capa implant zone in the first capa implant zone adjacent the drain region has a second dopant concentration level that is greater than the first dopant concentration level. A gate oxide region insulates the floating gate electrode from the channel region, first capa implant zone and second capa implant zone. A thickness of the gate oxide region is thinner at the second capa implant zone than at the channel region and first capa implant zone.
    Type: Application
    Filed: May 5, 2020
    Publication date: August 20, 2020
    Applicant: STMicroelectronics (Rousset) SAS
    Inventors: Francois TAILLIET, Roberto SIMOLA
  • PHOTODIODE
    Publication number: 20200266310
    Abstract: A photodiode include a first substrate layer of a first dopant type and a second substrate layer of a second dopant type on top of the first substrate layer. Semiconductor walls are provided in a semiconductor substrate which includes the first and second substrate layers. The semiconductor walls include: two outer semiconductor walls and at least one inside semiconductor wall positioned between the two outer semiconductor walls. Each inside semiconductor wall is located between two semiconductor walls having longer length.
    Type: Application
    Filed: February 13, 2020
    Publication date: August 20, 2020
    Applicant: STMicroelectronics (Crolles 2) SAS
    Inventors: Boris RODRIGUES GONCALVES, Arnaud TOURNIER
  • AMPLIFIER CIRCUIT, CORRESPONDING SYSTEM, VEHICLE AND METHOD
    Publication number: 20200266781
    Abstract: A cascade of amplifier stages has a differential input and a differential output. The cascade of amplifier stages includes at least one differential amplifier circuit including first and second transistors, at least one of the first and second transistors having a control terminal and a body terminal. A mismatch between the first and second transistors generates an input offset. A feedback network couples the differential output to the body terminal in order to cancel the input offset. The feedback network includes a low-pass filter and a differential amplifier stage.
    Type: Application
    Filed: February 18, 2020
    Publication date: August 20, 2020
    Applicant: STMicroelectronics S.r.l.
    Inventors: Alessandro FINOCCHIARO, Giuseppe PAPOTTO, Egidio RAGONESE, Giuseppe PALMISANO
  • GERMANIUM-ON-SILICON LASER IN CMOS TECHNOLOGY
    Publication number: 20200266609
    Abstract: A germanium waveguide is formed from a P-type silicon substrate that is coated with a heavily-doped N-type germanium layer and a first N-type doped silicon layer. Trenches are etched into the silicon substrate to form a stack of a substrate strip, a germanium strip, and a first silicon strip. This structure is then coated with a silicon nitride layer.
    Type: Application
    Filed: May 6, 2020
    Publication date: August 20, 2020
    Applicant: STMicroelectronics (Crolles 2) SAS
    Inventors: Mathias PROST, Moustafa EL KURDI, Philippe BOUCAUD, Frederic BOEUF
  • CIRCUIT ARRANGEMENT FOR THE GENERATION OF A BANDGAP REFERENCE VOLTAGE
    Publication number: 20200264648
    Abstract: A circuit for generating a bandgap voltage includes a circuit module for generation of a base-emitter voltage difference formed by a pair of PNP bipolar substrate transistors which identify a first current path and a second current path. A first current mirror of an n type is connected between the first and second branches and is further connected via a resistance for adjustment of the bandgap voltage to the second bipolar transistor. A second current mirror of a p type is connected between the first and second branches, and connected so that the current mirrors repeat current of each other. In operation to generate the bandgap voltage, current flows from the supply voltage to ground only through said the first and second bipolar substrate transistors.
    Type: Application
    Filed: May 5, 2020
    Publication date: August 20, 2020
    Applicant: STMicroelectronics S.r.l.
    Inventors: Calogero Marco IPPOLITO, Mario CHIRICOSTA
  • PROTECTION CIRCUIT, CORRESPONDING SYSTEM AND METHOD
    Publication number: 20200266623
    Abstract: A protection circuit for an automotive wiring harness includes an input node receiving a sensing signal indicating intensity of current in a conductor, an output node emitting a current control output signal to reduce the current and/or emitting a warning signal indicating the current intensity having reached a limit value. Signal processing circuitry coupled to the input node compares the current intensity with a reference value, and produces a comparison signal indicating whether the current intensity exceeds the reference value. A counting circuitry driven by the comparison signal counts in a first count direction as a result of the comparison signal indicating that the current intensity exceeds the reference value. Latching circuitry coupled to the counter circuitry generates the output signal at the output node as a result of the count value of the counter circuitry reaching a limit value.
    Type: Application
    Filed: February 14, 2020
    Publication date: August 20, 2020
    Applicant: STMicroelectronics S.r.l.
    Inventor: Romeo LETOR
  • Electrostatically actuated oscillating structure with oscillation starting phase control, and manufacturing and driving method thereof
    Patent number: 10746982
    Abstract: An electrostatically actuated oscillating structure includes a first stator subregion, a second stator subregion, a first rotor subregion and a second rotor subregion. Torsional elastic elements mounted to the first and second rotor subregions define an axis of rotation. A mobile element is coupled to the torsional elastic elements. The stator subregions are electrostatically coupled to respective regions of actuation on the mobile element. The stator subregions exhibit an element of structural asymmetry such that the electrostatic coupling surface between the first stator subregion and the first actuation region differs from the electrostatic coupling surface between the second stator subregion and the second actuation region.
    Type: Grant
    Filed: February 2, 2018
    Date of Patent: August 18, 2020
    Assignees: STMicroelectronics S.r.l., STMicroelectronics International N.V.
    Inventors: Benedetto Vigna, Marco Ferrera, Sonia Costantini, Marco Salina