Abstract: An electromagnetic transponder and a method for controlling by pulse trains a switch for modulating the load of this transponder in an electromagnetic field from which it extracts its power supply, the duty ratio of the pulses being controlled according to the transponder supply voltage.

Abstract: Properties of a hard mask liner are used against the diffusion of a removal agent to prevent air cavity formation in specific areas of an interconnect stack. According to one embodiment, there is provided a method in which there is defined a portion on a surface of an IC interconnect stack as being specific to air cavity introduction, with the defined portion being smaller than the surface of the substrate. At least one metal track is produced within the interconnect stack, and there is deposited at least one interconnect layer having a sacrificial material and a permeable material within the interconnect stack. There is defined at least one trench area surrounding the defined portion and forming at least one trench, and a hard mask layer is deposited to coat the trench. At least one air cavity is formed below the defined portion of the surface by using a removal agent for removing the sacrificial material to which the permanent material is resistant.

Abstract: A method includes forming a recess in a first surface of a substrate, the recess having a width, depth, and height selected to correspond to a width, depth, and height of a fluid chamber, forming a sacrificial material in the recess, forming a first heater element, forming a metal layer overlying the first heater element, and forming a nozzle opening in the metal layer to expose the sacrificial material. The method also includes forming a path from a second surface of the substrate to expose the sacrificial material and removing the sacrificial material from the recess to expose the chamber with the selected width, depth, and height, the chamber in fluid communication with the path, the nozzle opening, and a surrounding environment.

Abstract: A method for authenticating a transmission between a first and a second circuit transiting through at least one third circuit, wherein: data are transmitted from the first to the third circuit, and from the third to the second circuit; a first signature of the data is calculated by the first circuit; at least a second signature of the data is calculated by the third circuit; at least one first portion of the first signature is transmitted by the first circuit to the third one; and the second signature is transmitted by the third circuit to the second one, a portion of this signature being distorted in case of a failure of authentication of the first portion of the first signature by the third circuit.

Abstract: An integrated electromagnetic actuator comprising: a first structural layer; a flexible membrane, extending over the first structural layer and comprising regions of ferromagnetic material; a chamber, delimited between the first structural layer and the flexible membrane; a winding, comprising a plurality of turns of conductive material and extending within the first structural layer; and a core element made of ferromagnetic material, extending within the first structural layer, inside the winding.

Abstract: An ultra-thin Quad Flat No-Lead (QFN) semiconductor chip package having a leadframe with lead terminals formed by recesses from both the top and bottom surfaces and substantially aligned contact areas formed on either the top or bottom surfaces. A die is electrically connected to the plurality of lead terminals and a molding compound encapsulates the leadframe and die together so as to form the ultra-thin QFN package. Accordingly, the substantially aligned contact areas are exposed on both the top and bottom surfaces of the package. The present disclosure also provides an ultra-thin Optical Quad Flat No-Lead (OQFN) semiconductor chip package, a stacked semiconductor module comprising at least two QFN semiconductor chip packages, and a method for manufacturing an ultra-thin Quad Flat No-Lead (QFN) semiconductor packages.

Abstract: A method of conversion by at least one interface circuit connected between a first bus including at least one data wire and one clock wire, and at least one second single-wire bus, of a transmission between a master circuit connected to the first bus and at least one slave circuit connected to the second bus, wherein a speculative read command is sent to the slave circuit before interpreting the state of a bit for controlling a reading or a writing, originating from the master circuit.

Abstract: Fair usage of working channels in a wireless network is disclosed. A base station associated with a cell within a wireless community monitors the congestion of the working channel of neighboring communities. Upon determining that the congestion of the working channel of a neighboring community is less than that of its existing working channel, the base station initiates a switch to the neighboring community's working channel. Upon joining the new community, the frame structure and other networking parameters and attributes are adjusted.

Abstract: A method for transmitting data over a single-wire bus wherein a first communication channel is defined by pulses of different durations according to the state of the transmitted bit and depending on a reference duration, and a second communication channel is defined by the reference duration.

Abstract: An SRAM memory device including a plurality of memory cells arranged in a plurality of rows and a plurality of columns; each row of memory cells is adapted to store a RAM word; the RAM word includes a corresponding data word, a corresponding ECC word to be used for error detection and correction purposes and a corresponding applicative word to be used during debugging operations. The SRAM memory device further includes a configurable port adapted to receive a RAM word and to program corresponding memory cells of a selected row based on the received RAM word during a writing access of the SRAM memory device. The SRAM memory device further includes a memory controller unit including circuitry for selectively configuring the configurable port in one among a plurality of modes.

Abstract: A rooftop tiling system may include multi-functional roof tiles integrating photovoltaic and thermal converters for solar energy. The tiles allow a heat transfer fluid to circulate through inner flow channels of the tiles, and light concentration photovoltaic modules may be present atop the tiles together with a transmission or light reflection focusing device.

Abstract: A method for protecting at least first data of a non-volatile memory from which the extraction of this first data is triggered by the reading or the writing, by a processor from or into the memory, of second data independent from the first data, said first data being provided to a circuit which the processor cannot access.

Abstract: A system and method of sharing testing components for multiple embedded memories and the memory system incorporating the same. The memory system includes multiple test controllers, multiple interface devices, a main controller, and a serial interface. The main controller is used for initializing testing of each of the dissimilar memory groups using a serial interface and local test controllers. The memory system results in reduced routing congestion and faster testing of plurality of dissimilar memories. The present disclosure further provides a programmable shared built in self testing (BIST) architecture utilizing globally asynchronous and locally synchronous (GALS) methodology for testing multiple memories. The built in self test (BIST) architecture includes a programmable master controller, multiple memory wrappers, and an interface. The interface can be a globally asynchronous and locally synchronous (GALS) interface.

Abstract: An antenna for circularly polarized radiation having a lamina of electrically conductive material with a generally square shape and a first chamfer on a first vertex of the generally square shape. The chamfer determines an asymmetrical shape of the lamina.

Abstract: A digital image processing system and method for removing motion effects from images of a video sequence, and generating corresponding motion compensated images.

Abstract: A method of rendering video frames starting from source frames of a scene acquired using a multi-viewpoint camera system including a Free Viewpoint Video (FVV) synthesizing process.

Abstract: A process for producing two interleaved patterns on a substrate uses photolithography and etching to produce, on the substrate, a first pattern of first material protruding regions separated by recessed regions. A non-conformal deposition of a second material on the first pattern forms cavities in the recessed regions of the first pattern. These cavities are opened and filled with a third material. The second material is then removed, and the remaining third material forms a second pattern of third material protruding regions, wherein the second pattern is interleaved with the first pattern.

Abstract: A module is configured to control an electronic device equipped with an optical receiver for wireless remote control. The module includes a face detection circuit that detects the presence of a face within an area proximate to the electronic device. An optical transmission circuit operates to transmit an optical control signal to the electronic device in response a detected change in face detection status made by the face detection circuit. To assist operation of the face detection circuit, the optical transmission circuit is further configured to illuminate an area proximate to the electronic device.

Abstract: The method for detecting an attack by fault injection into memory positions includes a generation of an initial value of a reference indication including an application of a reversible mathematical operator to the values of the information stored in the memory positions. An updating of the value of this reference indication is performed on each write in at least one memory position by using the operator, the reverse operator and the values of the stored information before and after each write in the at least one memory position. And, in the presence of a request, a check is performed as to whether a criterion involving the values of the information stored in the memory positions at the time of the request and the operator or its reverse is or is not satisfied by the value of the reference indication at the time of the request.

Abstract: A process for producing an upper metallization level and a via level connecting this upper metallization level to a lower metallization level includes: producing an insulating region on the lower metallization level; producing a hard mask on the insulating region (4, 5) defining the position of the via and metallic line of the upper metallization level; etching the insulating region through the hard mask so as to form a cavity; cleaning the cavity (which forms an undercut at the interface between the hard mask and the insulating region); and completely filling the cavity. The step of completely filling includes at least partially filling the cavity with copper and plugging the undercut. The undercut is plugged by sputtering a plugging material and forming an overlying doped copper layer.