Patents Assigned to Subtron Technology Co., Ltd.
  • Publication number: 20230422411
    Abstract: A substrate structure includes a metal substrate, an insulating material, at least one first dielectric layer, and at least one first patterned circuit layer. The metal substrate has a first surface and a second surface opposite to each other and multiple through holes penetrating the metal substrate and connecting the first surface and the second surface. The insulating material fills the through holes and is aligned with the first surface and the second surface. The first dielectric layer is disposed on the first surface and the insulating material, and has multiple first openings. The first openings partially expose the metal substrate. The material of the first dielectric layer includes aluminum nitride or silicon carbide. The first patterned circuit layer is disposed on the first dielectric layer, fills the first openings, and connected to the metal substrate. The first patterned circuit layer partially exposes the first dielectric layer.
    Type: Application
    Filed: August 31, 2022
    Publication date: December 28, 2023
    Applicant: Subtron Technology Co., Ltd.
    Inventor: Chung Ying Lu
  • Publication number: 20230403826
    Abstract: A heat dissipation substrate includes heat dissipation blocks, an insulation filling structure, a first insulating layer, and a first circuit layer. Each heat dissipation block includes a first surface and a second surface opposite to the first surface. The insulation filling structure is disposed between the heat dissipation blocks to laterally connect the heat dissipation blocks. A first insulating surface of the insulation filling structure is substantially coplanar with the first surface of the heat dissipation block. A second insulating surface of the insulation filling structure is substantially coplanar with the second surface of the heat dissipation block. The first insulating layer is disposed on the first surface. The first circuit layer is disposed on the first insulating layer and penetrates the first insulating layer to be connected with the heat dissipation blocks. A thickness of the heat dissipation blocks is greater than a thickness of the first circuit layer.
    Type: Application
    Filed: July 7, 2022
    Publication date: December 14, 2023
    Applicant: Subtron Technology Co., Ltd.
    Inventors: Chung Ying Lu, Tzu-Shih Shen, Chien-Hung Wu
  • Patent number: 11764451
    Abstract: A waveguide structure includes a dielectric layer, a plurality of circuit layers, a plurality of insulation layers, and a conductor connection layer. The dielectric layer has an opening. The circuit layers are disposed on the dielectric layer. The insulation layers and the circuit layers are alternately stacked. The conductor connection layer covers an outer wall of the opening in a direction perpendicular to the circuit layers and connects at least two circuit layers on two opposite sides of the opening. At least the conductor connection layer and a part of the circuit layers define an air cavity for transmitting signals at a position corresponding to the opening.
    Type: Grant
    Filed: January 20, 2021
    Date of Patent: September 19, 2023
    Assignee: Subtron Technology Co., Ltd.
    Inventors: Jenn-Hwan Tarng, Nai-Chen Liu, Yin-Kai Lin, Tsung-Han Lee, Chao-Wei Chang
  • Publication number: 20230068160
    Abstract: A package carrier including a multi-layer circuit substrate and a silicon wafer is provided. The multi-layer circuit substrate has a first opening and a second opening communicating with each other. A first diameter and a first depth of the first opening are respectively greater than a second diameter and a second depth of the second opening. The silicon wafer is embedded in the first opening of the multi-layer circuit substrate. The silicon wafer has an active surface and includes a connecting circuit layer. The connecting circuit layer is disposed on the active surface and electrically connected to the multi-layer circuit substrate. The second opening of the multi-layer circuit substrate exposes part of the connecting circuit layer.
    Type: Application
    Filed: May 12, 2022
    Publication date: March 2, 2023
    Applicant: Subtron Technology Co., Ltd.
    Inventors: Shaw-Wen Lao, Chih-Peng Fan, Ping-I Cheng
  • Publication number: 20220157674
    Abstract: A substrate structure includes a substrate, a first metal layer, a second metal layer, and a third metal layer. The substrate has a first surface and a second surface opposite to each other and at least one through hole. The first metal layer is disposed on the first surface of the substrate. The second metal layer is disposed on the second surface of the substrate. The third metal layer is disposed on an inner wall of the at least one through hole of the substrate and connects the first metal layer and the second metal layer. The third metal layer and a portion of the first metal layer define at least one containing cavity, and the at least one containing cavity is configured to contain solder to fix the substrate structure onto an external circuit.
    Type: Application
    Filed: June 15, 2021
    Publication date: May 19, 2022
    Applicant: Subtron Technology Co., Ltd.
    Inventor: Chung Ying Lu
  • Publication number: 20210384618
    Abstract: A waveguide structure includes a dielectric layer, a plurality of circuit layers, a plurality of insulation layers, and a conductor connection layer. The dielectric layer has an opening. The circuit layers are disposed on the dielectric layer. The insulation layers and the circuit layers are alternately stacked. The conductor connection layer covers an outer wall of the opening in a direction perpendicular to the circuit layers and connects at least two circuit layers on two opposite sides of the opening. At least the conductor connection layer and a part of the circuit layers define an air cavity for transmitting signals at a position corresponding to the opening.
    Type: Application
    Filed: January 20, 2021
    Publication date: December 9, 2021
    Applicant: Subtron Technology Co., Ltd.
    Inventors: Jenn-Hwan Tarng, Nai-Chen Liu, Yin-Kai Lin, Tsung-Han Lee, Chao-Wei Chang
  • Patent number: 11171072
    Abstract: A heat dissipation substrate includes a substrate, a heat conducting element, an insulating filling material, a first circuit layer, and a second circuit layer. The substrate has a first surface, a second surface opposite the first surface, and a through groove communicating the first surface with the second surface. The heat conducting element is disposed in the through groove. The heat conducting element includes an insulating material layer and at least one metal layer. The insulating filling material is filled in the through groove for fixing the heat conducting element into the through groove. The first circuit layer is disposed on the first surface of the substrate and exposes a portion of the heat conducting element. The second circuit layer is disposed on the second surface of the substrate. The first circuit layer and the metal layer are respectively disposed on two opposite sides of the insulating material layer.
    Type: Grant
    Filed: June 10, 2020
    Date of Patent: November 9, 2021
    Assignee: Subtron Technology Co., Ltd.
    Inventors: Chien-Hung Wu, Bo-Yu Huang, Chia-Wei Chang, Tzu-Shih Shen
  • Publication number: 20210096298
    Abstract: An optical waveguide circuit substrate includes a circuit board and an optical waveguide structure disposed on a lower surface of the circuit board. A plurality of pads are disposed on an upper surface of the circuit board. The optical waveguide structure includes a first cladding layer, a second cladding layer, a core layer and a reflective layer. The core layer has an imprinted opening of which an aperture gradually increases from the first cladding layer to the second cladding layer. A first portion of the second cladding layer fills the imprinted opening and has a connection surface. The reflective layer is located between the core layer and the first portion, and an angle between the reflective layer and the connection surface is in a range from 44 degrees to 46 degrees. An orthographic projection of the reflective layer on the upper surface is located between the pads.
    Type: Application
    Filed: May 20, 2020
    Publication date: April 1, 2021
    Applicant: Subtron Technology Co., Ltd.
    Inventors: Pei-Wei Wang, Cheng-Ping Yang, Chiao-Yi Cheng
  • Patent number: 10957614
    Abstract: A heat dissipation substrate includes an insulating layer, a metal heat dissipation block, and a patterned structure layer. The insulating layer has a first surface, a second surface and at least one through hole. The metal heat dissipation block passes through the insulating layer from the second surface of the insulating layer and has an upper surface, a lower surface, and a contact surface. There is a first vertical height between the contact surface and the lower surface. The patterned structure layer includes a patterned circuit layer and at least one conductive structure layer. The patterned circuit layer is disposed on the first surface of the insulating layer, and the conductive structure layer is connected to the patterned circuit layer and extends to cover an inner wall of the through hole. The patterned circuit layer has a top surface, the conductive structure layer has a bottom surface.
    Type: Grant
    Filed: September 28, 2019
    Date of Patent: March 23, 2021
    Assignee: Subtron Technology Co., Ltd.
    Inventors: Chien-Hung Wu, Tzu-Shih Shen
  • Publication number: 20210050276
    Abstract: A heat dissipation substrate includes a substrate, a heat conducting element, an insulating filling material, a first circuit layer, and a second circuit layer. The substrate has a first surface, a second surface opposite the first surface, and a through groove communicating the first surface with the second surface. The heat conducting element is disposed in the through groove. The heat conducting element includes an insulating material layer and at least one metal layer. The insulating filling material is filled in the through groove for fixing the heat conducting element into the through groove. The first circuit layer is disposed on the first surface of the substrate and exposes a portion of the heat conducting element. The second circuit layer is disposed on the second surface of the substrate. The first circuit layer and the metal layer are respectively disposed on two opposite sides of the insulating material layer.
    Type: Application
    Filed: June 10, 2020
    Publication date: February 18, 2021
    Applicant: Subtron Technology Co., Ltd.
    Inventors: Chien-Hung Wu, Bo-Yu Huang, Chia-Wei Chang, Tzu-Shih Shen
  • Patent number: 10798822
    Abstract: A manufacturing method of a component embedded package carrier includes the following steps: providing the dielectric layer; a first copper foil layer and a second copper foil layer; forming a plurality of through holes; forming a conductive material layer on the first copper foil layer and the second copper foil layer; patterning the conductive material layer, the first copper foil layer and the second copper foil layer, thereby defining the conductive through hole structures, the first patterned conductive layer and the second patterned conductive layer and forming the core layer comprises; disposing at least one electronic component inside the opening of the core layer; laminating a first insulating layer and a first circuit layer located on the first insulating layer onto the first patterned conductive layer; laminating a second insulating layer and a second circuit layer located on the second insulating layer onto the second patterned conductive layer.
    Type: Grant
    Filed: February 7, 2018
    Date of Patent: October 6, 2020
    Assignee: Subtron Technology Co., Ltd.
    Inventor: Jing-Cyuan Yang
  • Publication number: 20200303271
    Abstract: A heat dissipation substrate includes an insulating layer, a metal heat dissipation block, and a patterned structure layer. The insulating layer has a first surface, a second surface and at least one through hole. The metal heat dissipation block passes through the insulating layer from the second surface of the insulating layer and has an upper surface, a lower surface, and a contact surface. There is a first vertical height between the contact surface and the lower surface. The patterned structure layer includes a patterned circuit layer and at least one conductive structure layer. The patterned circuit layer is disposed on the first surface of the insulating layer, and the conductive structure layer is connected to the patterned circuit layer and extends to cover an inner wall of the through hole. The patterned circuit layer has a top surface, the conductive structure layer has a bottom surface.
    Type: Application
    Filed: September 28, 2019
    Publication date: September 24, 2020
    Applicant: Subtron Technology Co., Ltd.
    Inventors: Chien-Hung Wu, Tzu-Shih Shen
  • Patent number: 10319610
    Abstract: A package carrier includes a substrate, at least one heat conducting element, an insulating material, a first patterned circuit layer and a second patterned circuit layer. The substrate has an upper surface, a lower surface and a through hole. The heat conducting element is disposed inside the through hole and has a first surface and a second surface. The insulating material has a top surface, a bottom surface and at least one cavity extending from the top surface to the heat conducting element. The heat conducting element is fixed in the through hole by the insulating material, and the cavity exposes a portion of the first surface of the heat conducting element. The first patterned circuit layer is disposed on the upper surface and the top surface, and the second patterned circuit layer is disposed on the lower surface and the bottom surface.
    Type: Grant
    Filed: November 30, 2017
    Date of Patent: June 11, 2019
    Assignee: Subtron Technology Co., Ltd.
    Inventors: Chin-Sheng Wang, Shih-Hao Sun
  • Patent number: 10297517
    Abstract: A manufacturing method of a package carrier is provided. A substrate having a through hole is provided, wherein a profile of the through hole from top view is a first rounded rectangular. A heat conducting slug is disposed inside the through hole, wherein the heat conducting slug and an inner wall of the through hole are separated with a gap, and a profile of the heat conducting slug from top view is a second rounded rectangular. An insulating material is filled in the through hole so as to fix the heat conducting slug in the through hole. A conductive through hole structure, a first and a second patterned circuit layers are formed. The first and the second patterned circuit layers are respectively formed on two opposite sides of the substrate. The conductive through hole structure penetrates the substrate and connects portions of the first and the second patterned circuit layers.
    Type: Grant
    Filed: October 3, 2017
    Date of Patent: May 21, 2019
    Assignee: Subtron Technology Co., Ltd.
    Inventor: Chih-Hsien Cheng
  • Patent number: 10177067
    Abstract: A manufacturing method including following steps is provided. A substrate that includes a core layer, a first conductive layer, and a second conductive layer is provided. A heat conducting channel is formed in the substrate, and an adhesion layer is formed on the second conductive layer to cover a side of the heat conducting channel. A heat conducting element and a buffer layer are placed into the heat conducting channel, and a gap is formed between either the heat conducting element or the buffer layer and an inner side surface of the heat conducting channel. The gap is filled with a first insulant material, and the adhesion layer and the buffer layer are removed to form a cavity and expose the heat conducting element. The first conductive layer and the second conductive layer are patterned to form a first patterned circuit layer and a second patterned circuit layer, respectively.
    Type: Grant
    Filed: May 18, 2017
    Date of Patent: January 8, 2019
    Assignee: Subtron Technology Co., Ltd.
    Inventors: Chin-Sheng Wang, Chih-Hsien Cheng, Shih-Hao Sun
  • Publication number: 20180352658
    Abstract: A component embedded package carrier includes a core layer, at least one electronic component, a first insulating layer, a second insulating layer, a third patterned conductive layer, a fourth patterned conductive layer, a plurality of conductive blind via structures, a first protecting layer and a second protecting layer. The electronic component is disposed inside an opening of the core layer. The first and second insulating layers completely fill the opening and completely encapsulate the electronic component. The conductive blind via structures connect the third and fourth patterned conductive layers with a plurality of conductive through hole structures of the core layer, and connect the third and fourth patterned conductive layers with the electronic component. The first protecting layer covers the third patterned conductive layer and has a first roughness surface. The second protecting layer covers the fourth patterned conductive layer and has a second roughness surface.
    Type: Application
    Filed: February 7, 2018
    Publication date: December 6, 2018
    Applicant: Subtron Technology Co., Ltd.
    Inventor: Jing-Cyuan Yang
  • Patent number: 10123413
    Abstract: A temporary package substrate includes a first copper layer, a second copper layer, a third copper layer, a first plating copper layer, a second plating copper layer, a third plating copper layer, a first dielectric layer, a second dielectric layer and two circuit structures. The second copper layer is located between the first and the third copper layers, and edges of the second copper layer are retracted a distance compared to edges of the first copper layer and edges of the third copper layer. The first and the second dielectric layers completely encapsulate the edges of the second copper layer and the edges of the second plating copper layer. Each of the circuit structures includes at least two patterned circuit layers, an insulation layer located between the patterned circuit layers, and a plurality of conductive through hole structures penetrating the insulation layer and electrically connected with the patterned circuit layers.
    Type: Grant
    Filed: May 15, 2017
    Date of Patent: November 6, 2018
    Assignee: Subtron Technology Co., Ltd.
    Inventors: Chih-Hong Chuang, Chien-Hung Wu
  • Patent number: 9961784
    Abstract: A manufacturing method of a circuit substrate includes the following steps. The peripheries of two metal layers are bonded to form a sealed area. Two insulating layers are formed on the two metal layers. Two including upper and bottom conductive layers are formed on the two insulating layers. Then, the two insulating layers and the two conductive layers are laminated so that the two metal layers bonded to each other are embedded between the two insulating layers. A part of the two insulating layers and a part of the two conductive layers are removed to form a plurality of blind holes exposing the two metal layers. A conductive material is formed in the blind holes and on the remained two conductive layers. The sealed area of the two metal layers is separated to form two separated circuit substrates.
    Type: Grant
    Filed: March 31, 2017
    Date of Patent: May 1, 2018
    Assignee: Subtron Technology Co., Ltd.
    Inventor: Tzu-Wei Huang
  • Publication number: 20180114739
    Abstract: A manufacturing method including following steps is provided. A substrate that includes a core layer, a first conductive layer, and a second conductive layer is provided. A heat conducting channel is formed in the substrate, and an adhesion layer is formed on the second conductive layer to cover a side of the heat conducting channel. A heat conducting element and a buffer layer are placed into the heat conducting channel, and a gap is formed between either the heat conducting element or the buffer layer and an inner side surface of the heat conducting channel. The gap is filled with a first insulant material, and the adhesion layer and the buffer layer are removed to form a cavity and expose the heat conducting element. The first conductive layer and the second conductive layer are patterned to form a first patterned circuit layer and a second patterned circuit layer, respectively.
    Type: Application
    Filed: May 18, 2017
    Publication date: April 26, 2018
    Applicant: Subtron Technology Co., Ltd.
    Inventors: Chin-Sheng Wang, Chih-Hsien Cheng, Shih-Hao Sun
  • Patent number: 9933149
    Abstract: An illumination apparatus includes a thermal conductivity substrate, a package carrier, at least one light emitting element, at least one wire, a light transmission cap, a first sealing ring and a second sealing ring. The package carrier is disposed on an upper surface of the thermal conductivity substrate and has an opening exposing a portion of the upper surface. The light emitting element is disposed on the upper surface exposed by the opening and is electrically connected to the package carrier by wire. The light transmission cap is disposed above the thermal conductivity substrate. The first sealing ring is disposed between the light transmission cap and the package carrier. The second sealing ring is disposed between the package carrier and the thermal conductivity substrate. The thermal conductivity substrate, the light transmission cap, the first and the second sealing rings and the package carrier encapsulate the light emitting element.
    Type: Grant
    Filed: April 21, 2015
    Date of Patent: April 3, 2018
    Assignee: Subtron Technology Co., Ltd.
    Inventors: Tzyy-Jang Tseng, Tzu-Shih Shen