Abstract: A method of manufacturing a cover structure is provided. A metal substrate disposed on a carrier is provided. The carrier has a surface, and the metal substrate has a plurality of openings exposing a portion of the surface. A first metal layer is formed on the metal substrate and is conformal with the metal substrate. The first metal layer covers the portion of the surface exposed by the openings. An insulating layer and a second metal layer located on the insulating layer are laminated on the metal substrate. The insulating layer is located between the first metal layer and the second metal layer to cover the first metal layer and fill the openings. The metal substrate and the carrier are removed to expose the first metal layer and define a plurality of cavity regions and a plurality of connecting regions connected with the cavity regions.

Abstract: A core substrate includes a dielectric layer, at least one releasing layer, at least one first copper foil layer and at least one nickel layer. The releasing layer is disposed on the dielectric layer and directly covers the dielectric layer. The first copper foil layer is disposed on the releasing layer and directly covers the releasing layer. The nickel layer is disposed on the first copper foil layer and directly covers the first copper foil layer.

Abstract: A circuit board includes a circuit layer, a first solder resist layer, a second solder resist layer and at least one conductive bump. The first solder resist layer is disposed on a lower surface of the circuit layer and has at least one first opening exposing a portion of the lower surface of the circuit layer. The second solder resist layer is disposed on an upper surface of the circuit layer and has at least one second opening exposing a portion of the upper surface of the circuit layer. The conductive bump is disposed inside the second opening of the second solder resist layer and directly connects to the upper surface of the circuit layer exposed by the second opening. A top surface of the conductive bump is higher than a second surface of the second solder resist layer.

Abstract: A heat dissipation substrate includes a heat sink, a metal base and an elastic structure. The heat sink includes a carrying portion and supporting portions. The supporting portions are parallel to one another and disposed on a lower surface of the carrying portion. The supporting portions are perpendicular to the carrying portion and surround an accommodating space with the carrying portion. The carrying portion has first rough surface structure disposed on a portion of the lower surface and located in the accommodating space. The metal base is disposed below the heat sink and has an assemble surface and a second rough surface structure disposed on a portion of the assemble surface and corresponding to the first rough surface structure. The first and second rough surface structures and the supporting portions define a fluid chamber in which the elastic structure is disposed, and a working fluid flows in the fluid chamber.

Abstract: A manufacturing method of a circuit structure is provided. A metal layer having an upper surface is provided. A surface passivation layer is formed on the metal layer. The surface passivation layer exposes a portion of the upper surface of the metal layer, and a material of the metal layer is different from a material of the surface passivation layer. A covering layer is formed on the surface passivation layer, and the covering layer covers the surface passivation layer.

Abstract: A heat dissipation device includes a package carrier, heat dissipating fins, an atomizer and a driving unit. The package carrier has a carrying surface and a disposing surface divided into a first region and a second region. The heat dissipating fines are located in the second region and define an accommodating space with the package carrier. An extending direction of the heat dissipating fines is perpendicular to an extending direction of the package carrier. The atomizer is disposed on the heat dissipating fines and located in the accommodating space. The atomizer includes an atomization unit, a liquid containing cavity and a fluid channel. The liquid containing cavity, the heat dissipating fines and the package carrier define a fluid chamber. The driving unit is electrically connected to the atomizer so as to drive a working fluid to the atomization unit and atomize the working fluid into an atomization micro-mist.

Abstract: A substrate structure includes a substrate and a filling material. The substrate has an upper surface, a lower surface, at least one first blind via and at least one second blind via. The substrate includes an insulation layer, a first copper foil layer and a second copper foil layer. The first copper foil layer and the second copper foil layer are respectively disposed on two opposite side surfaces of the insulation layer. The first blind via extends from the upper surface toward the second copper foil layer and exposes a portion of the second copper foil layer. The second blind via extends from the lower surface toward the first copper foil layer and exposes a portion of the first copper foil layer. The filling material is filled inside of the first blind via and the second blind via and covers the upper surface and the lower surface of the substrate.

Abstract: A manufacturing method of a package carrier includes the following steps. Firstly, two base metal layers are bonded together. Then, two supporting layers are laminated onto the base metal layers respectively. Next, two release metal films are disposed on the supporting layers respectively, wherein each of the release metal films includes a first metal film and a second metal film separable from each other. Next, two patterned metal layers are formed on the release metal films respectively, wherein each of the patterned metal layers is suitable for carrying and electrically connected to a chip. Then, the base metal layers are separated from each other to form two package carriers independent from each other. A package carrier formed by the manufacturing method described above is also provided.

Abstract: A manufacturing method of a package carrier includes the following steps. Two base metal layers are bonded together. Two supporting layers are laminated onto the base metal layers respectively. Two release metal films are disposed on the supporting layers respectively. Each release metal film includes a first metal film and a second metal film separable from each other. Two first patterned metal layers are formed on the release metal films respectively. Each first patterned metal layer includes a pad pattern. Two dielectric layers are formed on the release metal films respectively and cover the corresponding first patterned metal layers. Each dielectric layer has a conductive via connecting to the corresponding pad pattern. Two second patterned metal layers are formed on the dielectric layers respectively. Each second patterned metal layer at least covers the conductive via. The base metal layers are separated from each other to form two independent package carriers.

Abstract: A package carrier including a removable supporting plate and a circuit board is provided. The removable supporting plate includes a dielectric layer, a copper foil layer and a releasing layer. The dielectric layer is disposed between the copper foil layer and the releasing layer. The circuit board is disposed on the removable supporting plate and directly contacts the releasing layer. A thickness of the circuit board is between 30 ?m and 100 ?m.

Abstract: A circuit board structure includes a core circuit structure, a first and a second dielectric layers, a first and a second conductive blind via structures, a third and a fourth patterned circuit layers, and a first and a second surface passivation layers. The first and the second dielectric layers have at least one first and second blind vias exposing parts of a first and a second patterned circuit layers of the core circuit structure, respectively. The first and the second conductive blind via structures are disposed into the first and the second blind vias respectively. The third and the fourth patterned circuit layers are electrically connected to the first and the second patterned circuit layers through the first and the second conductive blind via structures respectively. The first and the second surface passivation layers respectively expose parts of the third and the fourth patterned circuit layers.

Abstract: A manufacturing method of a package carrier is provided. An insulation substrate having an upper surface, a lower surface, plural cavities located at the lower surface and plural through holes passing through the insulation substrate and respectively communicating with the cavities is provided. Plural vias is defined by the cavities and the through holes. A conductive material filling up the vias is formed to define plural conductive posts. An insulation layer having a top surface and plural blind vias extending from the top surface to the conductive posts is formed on the upper surface. A patterned circuit layer filling up the blind vias, being connected to the conductive posts and exposing a portion of the top surface is formed on the top surface. A solder mask layer is formed on the patterned circuit layer and has plural openings exposing a portion of the patterned circuit layer to define plural pads.

Abstract: A manufacturing method of substrate structure is provided. A base material having a core layer, a first patterned copper layer, a second patterned copper layer and at least one conductive via is provided. The first and second patterned copper layers are respectively located on a first surface and a second surface of the core layer. The conductive via passes through the core layer and connects the first and second patterned copper layers. A first and a second solder mask layers are respectively formed on the first and second surfaces. Portions of the first and second patterned copper layers are exposed by the first and second solder mask layers, respectively. A first gold layer is formed on the first and second patterned copper layers exposed by the first and second solder mask layers. A nickel layer and a second gold layer are successively formed on the first gold layer.

Abstract: An edge separation equipment and an operating method thereof are suitable for a carrier and a circuit board in a coreless process. The carrier is attached to the circuit board by a mechanically separable interface, and the edge separation equipment is used to separate the edge of the carrier from the edge of the circuit board. The edge separation equipment includes a platform, a supporting device and a wind knife device. The platform has a supporting surface on which the carrier or the circuit board is mounted. The supporting device is configured at a side of the platform. The wind knife device is configured on the supporting device, and the air jet supplied by the wind knife device blows toward the edge of the carrier and the edge of the circuit board, such that there is an edge separation width between the carrier and the circuit board.

Abstract: A heat dissipation plate including a heat-conductive material layer, a first metal layer, a metal substrate, and a metal ring frame is provided. The heat-conductive material layer has an upper surface and a lower surface opposite to each other. A material of the heat-conductive material layer includes ceramic or silicon germanium. The first metal layer is disposed on the lower surface of the heat-conductive material layer and has a first rough surface structure. The metal substrate is disposed below the first metal layer and has a second rough surface structure. The metal ring frame is disposed between the first metal layer and the metal substrate. The first rough surface structure, the metal ring frame, and the second rough surface structure define a fluid chamber, and a working fluid flows in the fluid chamber.

Abstract: A manufacturing method of a package structure is provided. In the manufacturing method, a metal substrate having a seed layer is provided. A patterned circuit layer is formed on a portion of the seed layer. A first patterned dry film layer is formed on the other portion of the seed layer. A surface treatment layer is electroplated on the patterned circuit layer with use of the first patterned dry film layer as an electroplating mask. The first patterned dry film layer is removed. A chip bonding process is performed to electrically connect a chip to the surface treatment layer. An encapsulant is formed on the metal substrate. The encapsulant encapsulates the chip, the surface treatment layer, and the patterned circuit layer. The metal substrate and the seed layer are removed to expose a bottom surface of the encapsulant and a lower surface of the patterned circuit layer.

Abstract: A manufacturing method of a package structure is provided. A substrate having an upper surface and a lower surface opposite to each other and an opening communicating the surfaces is provided. An electronic device is configured in the opening. An adhesive layer and a patterned metal layer located on the adhesive layer are laminated on the lower surface and expose a bottom surface of the electronic device. A heat-dissipating column is formed on the bottom surface exposed by the adhesive layer and the patterned metal layer and connects the patterned metal layer and the bottom surface. A first and a second laminated structures are laminated on the upper surface of the substrate and the patterned metal layer, respectively. The first laminated structure covers the upper surface of the substrate and a top surface of the electronic device. The second laminated structure covers the heat-dissipating column and the patterned metal layer.

Abstract: A package carrier includes a substrate, first and second insulation layers, first and second patterned circuit layers, at least one first and second conductive through holes, a heat dissipation channel, an adhesive layer and a heat conducting element. The first and second patterned circuit layers are respectively disposed on the first and second insulation layers which are respectively disposed on upper and lower surfaces of the substrate. The heat dissipation channel at least passes through the first insulation layer, the first and second patterned circuit layers, and the substrate. The first and second conductive through holes electrically connect with the substrate, the first and second patterned circuit layers. At least two opposite side surfaces of the heat conducting element each includes at least one convex portion or at least one concave portion. The heat conducting element is mounted in the heat dissipation channel via the adhesive layer.

Abstract: A manufacturing method of a circuit structure is provided. A metal layer having an upper surface is provided. A surface passivation layer is formed on the metal layer. The surface passivation layer exposes a portion of the upper surface of the metal layer, and a material of the metal layer is different from a material of the surface passivation layer. The metal layer and the surface passivation layer are dipped into a modifier, and the modifier is selectively absorbed and attached to the surface passivation layer, so as to form a covering layer. The covering layer has a plurality of nanoparticles and covers the surface passivation layer.

Abstract: A manufacturing method of a circuit structure is provided. A metal layer having an upper surface is provided. A surface passivation layer is formed on the metal layer. The surface passivation layer exposes a portion of the upper surface of the metal layer, and a material of the metal layer is different from a material of the surface passivation layer. A covering layer is formed on the surface passivation layer, and the covering layer covers the surface passivation layer.