Patents Assigned to Sumitomo Metal (SMI) Electronics Devices Inc.
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Patent number: 6103354Abstract: A ceramic circuit substrate includes an insulating layer fabricated of a ceramic, a first surface conductor layer fabricated on a surface of the insulating layer and embedded in the insulating layer except at least its surface, and a second surface conductor layer fabricated to be stacked on the first surface conductor layer.Type: GrantFiled: September 22, 1997Date of Patent: August 15, 2000Assignee: Sumitomo Metal (SMI) Electronic Devices Inc.Inventors: Hideaki Araki, Kunihiko Mori
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Patent number: 6064283Abstract: An Ag electrode coated all over the surface of a dielectric block by dipping is partially abraded off for formation of input-output terminal electrodes. Post-firing deformation of the dielectric block due to a green density difference during pressing is thus eliminated by abrasion, thereby making an input-output terminal electrode mount face so flat that the input-output terminal electrodes can be formed with high precision. Chamfered edge areas for preventing chipping of the dielectric block are also removed by abrasion, so that the input-output terminal electrodes can be formed as far as the extreme end of the input-output terminal electrode mount face. The input-output capacity value of the dielectric filter can thus be stabilized with minimized variations of the filter characteristics. It is accordingly possible to provide an inexpensive dielectric filter through a reduced number of process steps, with no need of any regulation of resonance frequency yet with improved yields upon non-regulation.Type: GrantFiled: July 29, 1998Date of Patent: May 16, 2000Assignee: Sumitomo Metal (SMI) Electronics Device, Inc.Inventor: Naoyuki Asada
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Patent number: 6054755Abstract: In order that popcorning and delamination resulting from moisture vapor in a semiconductor package may be prevented, a vent hole is formed in a die-bonding area of a plastic substrate so as to extend vertically through the substrate. An upper open end of the vent hole is covered with a solder resist film and a semiconductor chip is die-bonded on the solder resist film. In the die-bonding step, the solder resist film prevents an adhesive agent from flowing into the vent hole through the upper open end, so that gas permeability of the vent hole can be ensured. Furthermore, since the solder resist film has gas permeability, moisture vapor in the package is released outside through the vent hole and the solder resist film during a reflow heating.Type: GrantFiled: October 9, 1998Date of Patent: April 25, 2000Assignee: Sumitomo Metal (SMI) Electronics Devices Inc.Inventors: Hiroshi Takamichi, Yoshikazu Nakada
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Patent number: 6037045Abstract: A ceramic circuit element comprising a ceramic substrate having co-fired resistor and glass overcoat thereon in which the resistor is formed from a resistor paste consisting essentially of RuO.sub.2 powder, glass powder and a vehicle comprising an organic polymer and a solvent, the RuO.sub.2 powder and the glass powder having specific surface areas of 10 to 20 m.sup.2 /g and 4 to 14 m.sup.2 /g, respectively; the glass overcoat is formed from a glass overcoat paste consisting essentially of a glass composition and a vehicle comprising an organic polymer and a solvent, the glass composition having a specific surface area of 2 to 6 m.sup.2 /g; and the ceramic circuit substrate comprises a CaO--Al.sub.2 O.sub.3 --SiO.sub.2 --B.sub.2 O.sub.3 system or MgO--Al.sub.2 O.sub.3 --SiO.sub.2 --B.sub.2 O.sub.3 system glass and alumina.Type: GrantFiled: November 26, 1997Date of Patent: March 14, 2000Assignee: Sumitomo Metal (SMI) Electronics Devices, Inc.Inventor: Masashi Fukaya
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Patent number: 5955938Abstract: A ceramic circuit substrate having a resistor deposited on a surface thereof, said ceramic substrate having a coefficient of thermal expansion ranging from 5.0.times.10.sup.-6 /.degree. C. to 7.0.times.10.sup.-6 /.degree. C., the resistor being coated with a glass overcoat and made of 15 to 50% of RuO.sub.2 and 85 to 50% of a CaO--Al.sub.2 O.sub.3 --SiO.sub.2 --B.sub.2 O.sub.3 -system glass, the glass overcoat being made of 60 to 100% of a CaO--Al.sub.2 O.sub.3 --SiO.sub.2 --B.sub.2 O.sub.3 -system glass and up to 40% of alumina, wherein the resistor has a coefficient of thermal expansion greater than that of the glass overcoat. Due to the above specific relationship between the coefficient of thermal expansion of the resistor and that of the overcoat, the resistor is not subject to cracking at the time of trimming and thereafter, and realizes the exertion of resistance performance ensuring excellent weather resistance and stability.Type: GrantFiled: November 26, 1997Date of Patent: September 21, 1999Assignee: Sumitomo Metal (SMI) Electronics Devices, Inc.Inventor: Masashi Fukaya
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Patent number: 5912505Abstract: A semiconductor package and a semiconductor device comprises a metal bump to be placed between a metal pad formed on a package body of a substantially plate-like shape and an interconnecting solder for connecting a metal ball thereto, wherein the melting point of the metal bump is higher than that of the interconnecting solder, thereby enhancing a fatigue resistance against temperature fluctuations as well as improving a reliability around the interconnecting portion.Type: GrantFiled: November 4, 1996Date of Patent: June 15, 1999Assignee: Sumitomo Metal (SMI) Electronics Devices, Inc.Inventors: Takuji Itoh, Toshihiko Kubo
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Patent number: 5879788Abstract: A low-temperature fired ceramic circuit substrate fired at a temperature ranging between 800.degree. and 1,000.degree. C. includes a plurality of insulating layers each formed of a low-temperature fired ceramic, an Ag conductor layer formed internally of the substrate, an Au conductor layer formed on a surface of the substrate, and an Ag-Pd layer formed between the Ag and the Au conductor layers, the Ag-Pd layer being composed of 100 parts metal composition consisting of 70 to 95 parts Ag and 5 to 30 part Pd by weight, and 2 to 10 parts lead borosilicate glass by weight. As the result of the above composition of the ceramic circuit substrate, its fabrication process can be simplified, and a defect rate in a connection between the Ag and Au layers after repeated firing is rendered approximately zero, which ensures high reliability for the connection.Type: GrantFiled: March 11, 1997Date of Patent: March 9, 1999Assignee: Sumitomo Metal (SMI) Electronics Devices, Inc.Inventors: Junzo Fukuta, Masashi Fukaya, Hideaki Araki
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Patent number: 5855711Abstract: A ceramic circuit substrate providing a circuit pattern with a fine line as well as high accuracy for positioning the circuit pattern and a method of producing the ceramic circuit substrate. An alumina layer that is green containing an alumina that is not sintered at a temperature ranging from 800.degree. to 1000.degree. C. is applied on a surface of a ceramic green sheet containing glass and then fired at a temperature ranging from 800.degree. to 1000.degree. C. The ceramic green sheet is sintered into a sintered ceramic substrate. A porous alumina layer is formed on a surface of the sintered ceramic substrate. The glass contained in the sintered ceramic substrate is caused to flow to the inside of the porous alumina layer so that the part of the porous alumina layer filled with the glass is bonded to the sintered ceramic substrate.Type: GrantFiled: March 25, 1997Date of Patent: January 5, 1999Assignee: Sumitomo Metal (SMI) Electronics Devices Inc.Inventors: Hideaki Araki, Masashi Fukaya
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Patent number: 5821455Abstract: A lid for sealing a semiconductor package containing a semiconductor chip, a semiconductor package making use of the lid, and a method for producing the lid. The lid has a solder layer along the peripheral side of a ceramic plate. The solder layer has a portion of an increased solder thickness and a portion of a reduced solder thickness extending along the peripheral direction. When sealing the semiconductor package, a gas confined within the inside of the semiconductor chip mounting site of the package substrate may be discharged from the semiconductor package for realizing hermetic sealing.Type: GrantFiled: January 29, 1997Date of Patent: October 13, 1998Assignees: Sumitomo Metal (SMI) Electronics Devices, Inc., Intel CorporationInventors: Tetsuya Yamamoto, Hideyuki Yoshino, Akihiro Hidaka, Roy Bell, Rusli Othman
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Patent number: 5766516Abstract: A silver-based electrically conductive paste used for printing on green sheets of a low-temperature firable ceramic comprising a CaO--Al.sub.2 O.sub.3 --SiO.sub.2 --B.sub.2 O.sub.3 --system glass and Al.sub.2 O.sub.3, wherein a silver-based powder in the conductive paste has a specific surface area in the range of 0.1 to 0.5 m.sup.2 /g and the formation of a scratch begins when the value measured with a grind gage for the paste containing an organic resin and an organic solvent is in the range of 30 to 10 .mu.m. The silver-based conductive paste makes it possible to co-fire with a low-temperature firable ceramic substrate without causing the warping of the substrate and, therefore, is very useful for the formation of wiring conductors of internal layers of a multilayer circuit substrate of the low-temperature firable ceramic.Type: GrantFiled: March 6, 1996Date of Patent: June 16, 1998Assignee: Sumitomo Metal (SMI) Electronics Devices Inc.Inventors: Junzo Fukuta, Toshihiro Nakai
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Patent number: 5729893Abstract: A method for producing a multilayer ceramic circuit substrate having therein internal conductor patterns comprising W and/or Mo as a main component and surface conductor patterns comprising Cu as a main component formed onto a surface layer of the multilayer ceramic circuit substrate, wherein an intermediate metal layer comprising 40 to 90 wt. % of W and/or Mo and 10 to 60 wt. % of at least one element selected from the group consisting of Ir, Pt, Ti, and Cr is formed in through-holes of the surface layer and on parts of the surface layer in the vicinity of the through holes on the surface layer, whereby the internal conductor patterns and the surface conductor patterns are electrically connected through the intermediate metal layer. The alumina multilayer ceramic circuit substrate enables an excellent bonding strength and electrical conductivity between the internal conductors and the surface conductors and high precision wiring and miniaturization of an electronic circuit part.Type: GrantFiled: November 22, 1995Date of Patent: March 24, 1998Assignee: Sumitomo Metal (SMI) Electronics Devices, Inc.Inventors: Nozomi Tanifuji, Akihiko Naito, Koji Sawada, Tohru Nomura, Yoshiyuki Miyase, Takashi Nagasaka
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Patent number: 5723073Abstract: A conductive paste for filling through holes for the interlayer electrical connection in a low-temperature firable ceramic circuit substrate to be fired at 800.degree. to 1,000.degree. C., which comprises a) 100 parts by weight of flaky and/or spherical silver-based powder particles; b) 0.1 to 2.0 parts by weight of b.sub.1) Sb.sub.2 O.sub.3 or a substance which is converted into Sb.sub.2 O.sub.3 by the firing and the amount of which is given in terms of Sb.sub.2 O.sub.3 and/or b.sub.2) Rh powder; and c) at least 3 parts by weight of 2-tetradecanol. The conductive paste has excellent printing properties and homogeneity because the viscosity change thereof is only small when it is printed into through holes of a ceramic circuit substrate and the crack formation after the firing is slight. Thus, the conductive paste is effective for efficient production of a ceramic circuit substrate of a high density wiring.Type: GrantFiled: March 6, 1996Date of Patent: March 3, 1998Assignee: Sumitomo Metal (SMI) Electronics Devices Inc.Inventors: Junzo Fukuta, Toshihiro Nakai
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Patent number: 5661090Abstract: Ceramic semiconductor packages which comprise a lead frame (1) having registering holes (4, 5) and a ceramic substrate (2) having a thermally fusible bonding material such as a resin or glass applied to the sealing surface (6) of the substrate are manufactured by positioning the lead frame, using a transfer device (14), on a lead frame-supporting plate (11) having holes (20, 21), through which positioning pins (22) formed on a positioning base (12) are made to protrude by lifting the base (12) by a driving mechanism (13), in such a manner that the positioning pins pass through the registering holes (4, 5) of the lead frame. The substrate is then centered and positioned on the lead frame using a transfer device (15) having chuck hands (33). Thereafter, the bonding material is fused by heating in a heating furnace (16) to bond the lead frame and the substrate.Type: GrantFiled: June 24, 1996Date of Patent: August 26, 1997Assignee: Sumitomo Metal (SMI) Electronics Devices, Inc.Inventor: Noriaki Otani
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Patent number: 5601638Abstract: A thick film paste for use in the formation of a conductor, a resistor, an insulator, a protector or the like in a ceramic wiring substrate by a printing process, wherein at least 2-tetradecanol as a solvent is contained in an amount of at least 3% by weight. The thick film paste is excellent in printability, for example, has less viscosity change during printing and exhibits less bleeding.Type: GrantFiled: November 20, 1995Date of Patent: February 11, 1997Assignees: Sumitomo Metal (SMI) Electronics Devices Inc., Daiken Chemical CompanyInventors: Junzo Fukuda, Akio Harada, Susumu Nishigaki