Abstract: A method and apparatus for embedding of bytecode data in a transport stream is described. Embodiments of the invention serve to make Java™ bytecode (in a class file) concurrently available to a user that is receiving media information through a transport stream. To ensure the concurrent delivery of bytecode, the information is embedded within spaces allocated in the transport stream, or in packets that carry the media data. In one embodiment of the invention, media data is grouped in structured packets referred to as Packetized Elementary Stream (PES) packets. Predefined spaces are available in each PES packet where bytecode data is embedded. In one embodiment of the invention the pre-defined space is allocated within the header segment of a PES packet. In another embodiment bytecode instruction are embedded within a private stream segment of a PES packet. One transport stream used with the invention is an MPEG-2 transport stream that includes structured packets that transport the PES packets.

Abstract: One embodiment provides for a system that uses a time stamp in order to more efficiently mark objects to keep track of accesses to fields with the objects. Upon receiving a first reference to a first field in an object, the system determines whether the first field has been accessed within a current time period. The system does so by retrieving a time stamp associated with the object. This time stamp indicates the last time any marking bit associated with any field in the object was updated. The system compares the time stamp with a current time value associated with the current time period. The system additionally retrieves a first marking bit associated with the first field and determines if the first marking bit is set. If the first marking bit is set and if the time stamp equals the current time value, the system determines that the first field has been accessed in the current time period.

Abstract: A graphics system configured to perform programmable filtering of samples to generate pixel values. The graphics system comprises a frame buffer, an accelerator unit and a video output processor. The accelerator unit receives graphics primitives, renders samples for the graphics primitives, and stores the rendered samples into a sample area of the frame buffer. The accelerator unit subsequently reads the samples from the sample area of the frame buffer, and filters the samples with a programmable filter having a programmable support region. The resulting pixel values are stored in a pixel area of the frame buffer. The video output processor reads the pixel values from the pixel area and converts the pixel values into a video signal which is provided to a video output port.

Abstract: A method and apparatus for performing ephemeral communication and assuring that an ephemeral decryption key is not accessible subsequent to an expiration time associated with the respective key. An ephemeral key pair is preferably generated within a tamper resistant cryptographic processor unit. The ephemeral key pair comprises and ephemeral encryption key and an ephemeral decryption key. The ephemeral decryption key is prevented from being accessed external of the tamper resistant cryptographic processor unit. Ephemeral messages encrypted using an ephemeral encryption key are decrypted by the cryptographic processor unit if associated with a time that precedes the expiration time for the respective ephemeral decryption key. A decrypted ephemeral message is prevented from being transmitted from the cryptographic processor unit in the event a time associated with a received encrypted ephemeral message is subsequent to the expiration time for the respective ephemeral key pair.

Abstract: A system and method for delivering digital media content to a user over a network is disclosed. The illustrative embodiment of the present invention enables multiple types of electronic devices to access the same digital media content for the same end user through the use of a smart card equipped with a license for the digital media content. Depending on the format of the digital media content, devices such as phones, pagers, internet appliances or PDAs can be used to present the digital media content to a user, as can traditional consumer electronic devices such as DVD players and VCRs. The encrypted content may be freely transferred and stored without copyright concerns since the decryption key is generated by the smart card containing the license.

Abstract: A system and method for scheduling instructions that are executed in the microprocessor are provided. The microprocessor executes multiple instructions per cycle that may have dependencies on execution results of other instructions. A scoreboard is utilized to schedule instructions. The scoreboard indicates dependencies between instructions. The scoreboard also controls the indication of dependencies based on the issuance of old instructions. The scoreboard includes a register for each instruction. The register has elements each of which corresponds to one of other instructions. An element of the register for an instruction is set where the element corresponds to one of other instructions which the instruction depends on.

Abstract: A system for leasing a group membership in a distributed processing system is provided. In accordance with this system, a remote object requests from an activation group a membership in the activation group for a period of time. Responsive to this request, the activation group determines an appropriate lease period during which time the remote object becomes a member of the activation group and runs in the same address space as other objects of the activation group.

Abstract: Improved techniques for loading class files into virtual computing machines are disclosed. The techniques seek to provide a mechanism that will generally improve the efficiency of virtual machines by selectively loading information into a virtual machine. A new class attribute (“load-attribute”) is defined and implemented for class files. This can be, for example, implemented as a “load-attribute” table that lists the components that have been selected for loading into the virtual machine. In addition, the load-attribute may provide references to the selected components in the class file. Accordingly, various components of the class file can be marked for loading and selectively loaded.

Abstract: An electronic device that invalidates a memory write operation before a memory address predecode occurs. The electronic device uses several dynamic latches to assert complementary clock like memory address data to drive the associated predecode circuitry. A stack of serially connected transistors is coupled to the input node of each dynamic latch to provide input node state control. By managing the operation of each stack of serially connected transistors, the dynamic latches may be prevented from asserting their complementary clock like memory address data to the associated predecode circuitry in order to invalidate a memory write operation.

Abstract: Disclosed is a system, method, and program for providing a QA tool to organize all the QA processes and report the QA results in an efficient and organized manner. A main page and hyperlinks are automatically generated from a database of test cases and tested devices to connect the all of the QA documentation, test results, and test logs for a specific device, wherein the main page and subsequent linked pages are viewable by a web browser.

Abstract: Methods and apparatus for a scaleable locking convention are disclosed. According to one aspect of the present invention, a method for acquiring access to an object in an object-based system includes identifying a memory address value associated with the object, and identifying a first synchronization construct that is suitable for use in granting access to the object. The synchronization construct is arranged to be identified using at least part of the memory address value. The method also includes determining when the first synchronization construct is available to be acquired, e.g., by a thread, and associating the first synchronization construct with the object when the first synchronization construct is available. In one embodiment, the first synchronization construct is a non-nestable, global lock.

Abstract: A latching data system includes a memory element that is configured to store a data value. A latch input is coupled to the memory element, so that changes in the latch input change the data value stored in the memory element without waiting for an assertion of a clock signal. The system also includes a driver circuit that is configured to drive the data value stored in the memory element onto a latch output. The system additionally includes a clocking circuit that is configured to cause the driver circuit to drive the data value stored in the memory element onto the latch output in response to an assertion of the clock signal.

Abstract: An on-chip monitoring circuit is composed of a plurality of individually addressable nodes that are connected together in a circuit which extends from an external data port to each of the monitored circuit points. Address and enable information is passed from node to node. Each node contains address decoding circuitry and enable generation circuitry. As a node receives address information, it decodes part of the address information and enables some of the nodes connected to it, passing the remainder of the address information to the enabled nodes. This process continues until an end node is reached which is connected to the circuit point which is to be monitored. Data generated at the monitored point is passed back though the enabled nodes to the external data port.

Abstract: Apparatus, methods and computer program products are disclosed that allow for dynamic administration, management and monitoring of daemon programs executing within a computer. The invention uses service agent programs to communicate with a daemon program that provides services for a resource. The daemon program responds to administrative messages from the service agent. The service agent program uses these administrative messages to interact with the daemon program to perform administrative operations on the daemon program or the resources served by the daemon program without requiring the daemon program to be terminated and restarted.

Abstract: A method and apparatus are disclosed for handling an input event directed to a thread within a process operating in a multi-threaded system. A process is alerted that an input event effecting one of its active connection threads has been received. An input polling thread in the process is enabled and is used, in conjunction with other thread-specific data, to determine which of the threads in the process has an event directed to it. That thread is then triggered to handle the input event. The active connection thread receiving the input event is assigned a light weight process to execute only after it is determined that the thread requires it to process the input event. The input polling thread for a process detects input events for its process and causes the appropriate connection thread in the process to be assigned a light weight process when the connection thread needs it to execute. This greatly reduces the number of light weight processes assigned to threads in a multi-threaded operating system.

Abstract: Software, methods, and systems for representing devices on a computer network are described. In one embodiment, the system of the invention includes a topology service. The topology service includes a protocol interface mechanism, an engine, and a database support mechanism. The topology service is coupled with a data storage mechanism. In a more specific embodiment, the protocol interface mechanism, engine, and database support mechanism each configured to operate as independent components.

Abstract: A method and apparatus for driving a plurality of addressable elements consist of driving and selectively enabling one or more addressable elements arranged as an M×N array using two drivers. The columns may be addressed in parallel. Columns may be coupled to a conductor by a charge transfer/isolation circuit. A voltage waveform or pulse train may be propagated down the display conductor such that a pulse is present on the display conductor for each element of a row of elements to be addressed. When the beginning of the pulse train has propagated to the last column tap-off point so that a different pulse is present at each column tap-off point corresponding to the row of elements to be selected, a corresponding charge is transferred to each column conductor in parallel. Thus, a voltage is supplied to select each element on the selected row as determined by the state of the pulse train at each column tap-off point.

Abstract: A device for automatically varying resistance includes a comparator for comparing a control voltage to a reference voltage; a switch operatively coupled to the comparator; and a first resistor and second resistor operatively coupled in a series connection between a pull-up voltage and a signal line. The switch is operatively coupled in a parallel connection with the first resistor and, based on the comparison between the control voltage and the reference voltage, the switch selectively bypasses the first resistor. A method of automatically varying resistance includes comparing a control voltage and a reference voltage; pulling-up a signal line to a pull-up voltage through a first resistor and a second resistor operatively connected in series if the comparison has a first outcome; and pulling up the signal line to the pull-up voltage through only the second resistor if the comparison has a second outcome.

Abstract: A method for regulating resonance in a micro-chip has been developed. The circuit includes an on-chip de-coupled capacitor that is shunted across the supply and ground voltages, and a band-pass shunt regulator that is in parallel to the capacitor across the supply and ground voltages. The regulator will short circuit the supply and ground voltages at a pre-determined frequency to reduce the resonance effect on the micro-chip.

Abstract: Type safe linkage is ensured by establishing a constraint if a class references an attribute that is contained in another class. This constraint acts as a “promise” to later ensure type safe linkage. At some point later—such as at the earliest time that the type is loaded by both loaders—the constraint is verified. This may be accomplished by verifying that the type for the attribute is the same regardless of whether it is loaded by a loader that defines the referencing class or a loader that defines the referred class. If the constraint is not met, an error message is provided.