Abstract: A method and apparatus for bypassing multiple pre-tests and post-tests during a system call when those tests are known to be inapplicable. One or more slow path flags are checked during a system call or TRAP. If the slow path flag is clear, execution follows a fast instruction path, resulting in faster execution for the system call or TRAP. Otherwise execution follows a slow instruction path. The slow path flags are set, cleared, and checked at appropriate times. The invention improves the execution time of a thread in a software process and may be used in a data processing system employing multiple threads. Each thread in the data processing system has its own set of slow path flags. The invention can set, clear and check the slow path flags of each thread independently, in subsets of threads, or in all threads.

Abstract: Apparatus, methods and computer program products are disclosed for interfacing a client based, multi-threaded API that is written in a first programming language (such as JAVA) with a server based, single-thread API that is written in a second programming language (such as C or C++). The invention uses an object factory to generate a server object for each client. Programmed-method invocations performed on logical objects at the client are communicated to the server object. The server object processes the programmed-method invocation to perform the requested service such as providing network management information services.

Abstract: In processor with multiple execution units and at least one instruction buffer the dispatch of instructions to available units is prioritised for multiple paths following a conditional branch. For example, instructions in the instruction buffer relating to a predicted path following a conditional branch can be dispatched to available execution units in preference to instructions relating to any other path, the instructions relating to any other paths being dispatched to any execution units remaining available. Compared to a processor with conventional predictive branch execution, prioritised dispatch of instructions in accordance with prediction priorities enables optimisation of the use of available execution units. There is a gain in efficiency where a non-predicted path proves to be the correct path without impacting efficiency where the predicted path proves to be the correct path. This net gain in efficiency can be achieved with a minimum of additional resources.

Abstract: A bridge for a multi-processor system includes bus interfaces for connection to an I/O bus of a first processing set, an I/O bus of a second processing set and a device bus. A bridge control mechanism is operable to permit direct memory access to memory of the processing sets by a device on the device bus, to arbitrate between the first and the second processing sets for access to the bridge in a first, split, mode, and to monitor lockstep operation of the first and second processing sets in a second, combined, mode. The dirty RAM mechanism defines a dirty indicator (e.g., a bit) for each of a plurality of regions of processing set memory, a dirty indicator being set to a predetermined value when the region of memory has been written to by a DMA access.

Abstract: A method and apparatus for passing generic objects in a distributed system is disclosed. At the receiving process, the generic object is unmarshaled. However, the object of type T is maintained in its marshaled form. If the generic object is subsequently passed to another process, a copy of the marshaled form of the object of type T is passed. The object of type T is not unmarshaled until the generic object is received by a process that narrows the generic object into the object of type T.

Abstract: A method and apparatus for coupling object state and behavior in a DBMS is provided such that an object's class definition, behavior information, and state information are included in the DBMS. An object is instantiated using an object class definition, state information, and behavior information from the DBMS. In addition, an object can be stored in the DBMS by storing its class definition along with its state and behavior information in the DBMS. The behavior information stored in the DBMS can be used within and without the DBMS environment.

Abstract: Two-way set associative data is stored in a cache memory array. An odd set data bank stores odd number sets of the two-way set associative data, where the two ways of each odd number set are aligned horizontally within the odd set data bank. An even set data bank stores even number sets of the two-way set associative data, where the two ways of each even number set are aligned horizontally within the even set data bank. Also, the odd set data bank is aligned horizontally with the even set data bank such that each odd number set is aligned horizontally with a next even number set. The horizontally aligned ways are interleaved for data path width reduction. Set and way selection circuits extract lines of data from the array. The array may be structurally implemented by single-ported RAM cells.

Abstract: A cross-domain data transfer technique is disclosed in which page remapping operations are eliminated in situations where physical memory addresses can be passed across domains. By passing physical memory addresses across domains instead of virtual memory addresses, the page remapping operations necessarily associated with passing virtual memory addresses across domains can be avoided in many cases. With the receipt of data across domains, page remapping operations are able to be deferred until the data is received in a domain that needs to touch the data. In certain cases, the transfer of data can be completed without ever having to map in the data to the receiving domain's address space. With the transmission of data across domains, where possible the pages are borrowed in their physical form. The invention can be embodied in many ways, including system, apparatus or method forms.

Abstract: A portable telephone provides a graphical user interface (GUI) using a high-resolution display. The GUI provides a Universal Mailbox for storing both electronic mail and voicemail messages, either of which can be accessed by a user from the same display screen. An automatic reply feature allows a user to initiate an outgoing reply to a received message with the touch of a button. For a reply to a voicemail message, the GUI accesses Caller ID information to automatically identify and dial out to the phone number of the sender of the original message. For an electronic mail reply, the GUI automatically displays a reply form addressed to the source address. Reply forms may be generic, custom designed for a specific source address, or provided by the sender. An advanced call control feature automatically checks a destination telephone number against a database to determine whether the phone number is currently appropriate for the party to be called .

Abstract: An apparatus, system, and method for speeding up data transfers while reducing bus contention during repeated consecutive read-write operations. By reducing the length of time during which selected data pulses are driven on the memory bus, a higher percentage of usage of the memory bus may be attained without increasing the likelihood of bus contention and resulting degradation or damage to the memory system. The selected data pulse is preferably the write data pulse driven on the memory bus by the memory controller. A zero bus turnaround protocol may be implemented. The memory controller may include interface circuitry and write control circuitry that outputs an associated control signal to a three-state buffer. The three-state buffer, after being enabled by the associated control signal, drives write data on a data line of a memory bus. The turn-on delay associated with the three-state buffer exceeds the turn-off delay also associated with the three-state buffer.

Abstract: Methods, systems, and computer program products centrally manage references to objects recently employed by a user operating in a software development environment. After transmission of collection messages to plural applications, a receiver centrally managing object references receives an information block of object references. A writer of the centrally managing object references system writes the information blocks into memory. A reader further reads previously written information blocks to inform plural applications of what objects were previously referenced.

Abstract: Methods and systems for compressing and decompressing 3-D geometry data which includes regularly tiled surface portions. One compression method includes representing a surface portion as a “vertex raster” by specifying an extent value and encoding the vertex parameter values of vertices within the surface portion. The extent value specifies the arrangement of vertices within the surface portion and allows the vertices to be properly assembled into drawing primitives during decompression. The encoded vertex parameter values (such as position, color, normals, z-displacement values, texture map coordinates, and surface material properties) may be encoded globally (by setting initial values and corresponding delta values), locally (on a per-vertex basis), or using a combination of these techniques. Absolute, delta, or delta-delta encoding may be utilized for these parameter values.

Abstract: An I/O monitor includes an interface mechanism for connection between a processor and an I/O bus and an error signal modifier. The error signal modifier responds to an error signal from the I/O bus by substituting a determined response for passing to the processor. By returning a determined response to the processor, as opposed to the bus error signal, the need for bus error exception processing by the processor software is removed. The monitor determines a resource forming the source of the bus error and labels the resource as defective in a status register for the resource in the monitor. The monitor generates an interrupt when a resource is first labelled as defective. Subsequently, further access to the resource by the processor are handled by the monitor. The monitor responds to an I/O read operation to a resource labelled as defective to prevent the I/O read operation from being passed to the bus and to return a determined data response.

Abstract: A data processing system comprises a plurality of nodes and a serial data bus interconnecting the nodes in series in a closed loop, for passing address and data information. At least one processing node includes a processor, a printed circuit board and a memory which is partitioned into a plurality of sections, including a first section for directly sharable memory located on the printed circuit board, and a second section for block sharable memory. A local bus connects the processor, block sharable memory and printed circuit board, for transferring data in parallel from the processor to the directly sharable memory on the printed circuit board, and for transferring data from the block sharable memory to the printed circuit board.

Abstract: Symmetry in a filter is used to reduce the complexity of an interpolator or a decimator and to simplify derivation of resulting discrete samples. In particular, an inverse relationship between weights applied to two samples is recognized and exploited. An inverse relationship is recognized when a first weight is associated with a first of the samples and a second weight is associated with a second of the samples and a weight which is equivalent to the first weight is associated with the second sample and a weight which is equivalent to the second weight is associated with the first sample. The inverse relationship is exploited by forming two composite weights of the first and second weights and weighting composite sample signals with the composite weights. A first of the composite weights has a value which is one-half of the sum of the values of the first and second weights. A second of the composite weights has a value which is one-half of the difference of the values of the first and second weights.

Abstract: An efficient method for purging cache memory sub-blocks within a cache memory block is disclosed. The method is particularly applicable to cache memories established on rotating magnetic media, such as a hard disk drive. The method is unique in that it requires absolutely no system overhead when the system is running and the cache is not completely full. When all sub-blocks within the cache memory have been filled, sophisticated, system resource-intensive algorithms are not employed to determine which is the oldest or the least frequently used sub-block of data. Instead, sub-blocks of data are removed in a pseudo-random manner until ample space is available within the cache.

Abstract: A method for repairing a pipeline in response to a branch instruction having a branch, includes the steps of providing a branch repair table having a plurality of entries, allocating an entry in the branch repair table for the branch instruction, storing a target address, a fall-through address, and repair information in the entry in the branch repair table, processing the branch instruction to determine whether the branch was taken, and repairing the pipeline in response to the repair information and the fall-through address in the entry in the branch repair table when the branch was not taken.

Abstract: A dashboard for a vehicle, comprising a monitor which displays graphical images depicting dashboard instruments. In one embodiment, the monitor is a general purpose LCD graphics display coupled to a graphics generator. The graphics generator is a processor which executes a virtual dashboard software application. The processor receives vehicle information such as speed, fuel level, mileage and battery charge, and processes this information using the virtual dashboard software application to generate graphics signals which are transmitted to the monitor for display to the driver. The images displayed to the driver are determined by the virtual dashboard application, and not by the monitor itself. The displayed images are user-selectable so that they can be varied to suit the preferences of different drivers. The driver may alternately select different groups of images to view on the monitor using touch screens or speech commands.

Abstract: An enterprise computing manager in which an application is composed of a client (front end) program which communicates utilizing a network with a server (back end) program. The client and server programs are loosely coupled and exchange information using the network. The client program is composed of a User Interface (UI) and an object-oriented framework (Presentation Engine (PE) framework). The UI exchanges data messages with the framework. The framework is designed to handle two types of messages: (1) from the UI, and (2) from the server (back end) program via the network. The framework includes a component, the mediator which manages messages coming into and going out of the framework. A distributed computer system is presented with software for a client computer, a server computer and a network for connecting the client computer to the server computer which utilizes an execution framework code segment configured to couple the server computer and the client computer via the network.