Patents Assigned to Symetrix Corporation
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Publication number: 20010041372Abstract: A method for forming an interface insulator layer in a ferroelectric FET memory, in which a liquid precursor is applied to a semiconductor substrate. Preferably, the liquid precursor is an enhanced metalorganic decomposition (“EMOD”) precursor, applied using a liquid-source misted deposition technique. Preferably, the EMOD precursor solution applied to the substrate contains metal ethylhexanoates containing metal moieties in relative molar proportions for forming an interface insulator layer containing ZrO2, CeO2, Y2O3 or (Ce1−xZrx)O2, wherein 0≦x≦1.Type: ApplicationFiled: March 29, 2001Publication date: November 15, 2001Applicant: Symetrix CorporationInventors: Koji Arita, Shinichiro Hayashi, Tatsuo Otsuki, Carlos A. Paz de Araujo
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Patent number: 6310373Abstract: An MIS device (20) includes a semiconducting substrate (22), a silicon nitride buffer layer (24), a ferroelectric metal oxide superlattice material (26), and a noble metal top electrode (28). The layered superlattice material (26) is preferably a strontium bismuth tantalate, strontium bismuth niobate, or strontium bismuth niobium tantalate. The device is constructed according to a preferred method that includes forming the silicon nitride on the semiconducting substrate prior to deposition of the layered superlattice material. The layered superlattice material is preferably deposited using liquid polyoxyalkylated metal organic precursors that spontaneously generate a layered superlattice upon heating of the precursor solution. UV exposure during drying of the precursor liquid imparts a C-axis orientation to the final crystal, and results in improved thin-film electrical properties.Type: GrantFiled: August 21, 1995Date of Patent: October 30, 2001Assignees: Symetrix Corporation, Matsushita Electronics CorporationInventors: Masamichi Azuma, Carlos A. Paz De Araujo
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Publication number: 20010031505Abstract: A liquid precursor for forming a thin film of ferroelectric metal oxide in an integrated circuit contains metal oxides in excess of the stoichiometrically balanced amount. When the precursor comprises strontium, bismuth, tantalum and niobium for forming strontium bismuth tantalum niobate, the precursor contains excess amounts of at least one of tantalum and niobium. Capacitors containing thin films of layered superlattice material made from a precursor containing excess tantalum and niobium show good polarizability and low percentage imprint after 1010 negative polarization switching pulses at 75° C., and after 109 negative polarization switching pulses at 125° C.Type: ApplicationFiled: May 19, 2001Publication date: October 18, 2001Applicant: Symetrix Corporation and Matsushita Electronics CorporationInventors: Koji Arita, Shinichiro Hayashi, Joseph D. Cuchiaro, Carlos A. Paz de Araujo
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Patent number: 6285048Abstract: Integrated circuit capacitors in which the capacitor dielectric is a thin film of BST having a grain size smaller than 2000 Å. Typical gain sizes are 40 nanometers and less. The BST is formed by deposition of a liquid precursor by a spin-on process. The original liquid precursor includes an alkoxycarboxylate dissolved in 2-methoxyethanol and an xylene exchange is preformed just prior to spinning. The precursor is dried in air at a temperature of about 400° C. and then furnace annealed in oxygen at a temperature of between 675° C. and 850° C.Type: GrantFiled: December 10, 1993Date of Patent: September 4, 2001Assignees: Symetrix Corporation, Matsushita Electronics CorporationInventors: Masamichi Azuma, Michael C. Scott, Carlos A. Paz de Araujo, Joseph D. Cuchiaro
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Patent number: 6281534Abstract: A liquid precursor for forming a thin film of ferroelectric metal oxide in an integrated circuit contains metal oxides in excess of the stoichiometrically balanced amount. When the precursor comprises strontium, bismuth, tantalum and niobium for forming strontium bismuth tantalum niobate, the precursor contains excess amounts of at least one of tantalum and niobium. Capacitors containing thin films of layered superlattice material made from a precursor containing excess tantalum and niobium show good polarizability and low percentage imprint after 1010 negative polarization switching pulses at 75° C., and after 109 negative polarization switching pulses at 125° C.Type: GrantFiled: October 13, 1998Date of Patent: August 28, 2001Assignees: Symetrix Corporation, Matsushita Electronics CorporationInventors: Koji Arita, Shinichiro Hayashi, Joseph D. Cuchiaro, Carlos A. Paz de Araujo
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Publication number: 20010011743Abstract: A nonvolatile nondestructible read-out ferroelectric FET memory comprising a semiconductor substrate, a ferroelectric functional gradient material (“FGM”) thin film, and a gate electrode. In one basic embodiment, the ferroelectric FGM thin film contains a ferroelectric compound and a dielectric compound. The dielectric compound has a lower dielectric constant than the ferroelectric compound. There is a concentration gradient of the ferroelectric compound in the thin film. In a second basic embodiment, the FGM thin film is a functional gradient ferroelectric (“FGF”), in which compositional gradients of ferroelectric compounds result in unconventional hysteresis behavior. The unconventional hysteresis behavior of FGF thin films is related to an enlarged memory window in ferroelectric FET memories. FGM thin films are preferably formed using a liquid source MOD methods, preferably a multisource CVD method.Type: ApplicationFiled: February 27, 2001Publication date: August 9, 2001Applicant: Symetrix CorporationInventors: Koji Arita, Carlos A. Paz de Araujo
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Publication number: 20010012698Abstract: A high dielectric constant insulator including a thin film of a metal oxide selected from the group consisting of tungsten-bronze-type oxides, pyrochlore-type oxides, and combinations of Bi2O3 with an oxide selected from the group consisting of perovskites and pyrochlore-type oxides. An embodiment contains metal oxides represented by the general stoichiometric formulas AB2O6, A2B2O7 and A2Bi2B2O10, wherein A represents A-site atoms selected from the group of metals consisting of Ba, Bi, Sr, Pb, Ca, K, Na and La; and B represents B-site atoms selected from the group of metals consisting of Ti, Zr, Ta, Hf, Mo, W and Nb. Preferably, the metal oxides are (BaxSr1−x)(TayNb1−y)2O6, where 0≦x≦1.0 and 0≦y≦1.0; (BaxSr1−x)2(TayNb1−y)2O7, where 0≦x≦1.0 and 0≦y≦1.0; and (BaxSr1−x)2Bi2(TayNby−1)2O10, where 0≦x≦1.0 and 0≦y≦1.0. Thin films according to the invention have a relative dielectric constant ≧40, and preferably about 100.Type: ApplicationFiled: March 2, 2001Publication date: August 9, 2001Applicant: Symetrix CorporationInventors: Shinichiro Hayashi, Vikram Joshi, Narayan Solayappan, Joseph D. Cuchiaro, Carlos A. Paz de Araujo
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Publication number: 20010010377Abstract: A hydrogen barrier layer is formed above a ferroelectric thin film in an integrated circuit. The hydrogen barrier layer is directly over a protected segment of the ferroelectric thin film, while a sacrificial segment of the ferroelectric thin film extends laterally beyond the edges of the hydrogen barrier layer. The sacrificial segment absorbs hydrogen so that it cannot diffuse laterally into the protected segment of the ferroelectric thin film. After it absorbs hydrogen, the sacrificial segment is etched away to allow electrical connection to circuit layers below it. The ferroelectric thin film preferably comprises a layered superlattice compound. Excess bismuth or niobium added to the standard precursor solution of a strontium bismuth tantalum niobate compound helps to reduce hydrogen degradation of the ferroelectric properties.Type: ApplicationFiled: February 7, 2001Publication date: August 2, 2001Applicant: Symetrix Corporation and NEC CorporationInventors: Joseph D. Cuchiaro, Akira Furuya, Carlos A. Paz de Araujo, Yoichi Miyasaka
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Patent number: 6255121Abstract: A method for forming an interface insulator layer in a ferroelectric FET memory, in which a liquid precursor is applied to a semiconductor substrate. Preferably, the liquid precursor is an enhanced metalorganic decomposition (“EMOD”) precursor, applied using a liquid-source misted deposition technique. Preferably, the EMOD precursor solution applied to the substrate contains metal ethylhexanoates containing metal moieties in relative molar proportions for forming an interface insulator layer containing ZrO2, CeO2, Y2O3 or (Ce1-xZrx)O2, wherein 0≦x≦1.Type: GrantFiled: February 26, 1999Date of Patent: July 3, 2001Assignees: Symetrix Corporation, Matsushita Electronics CorporationInventors: Koji Arita, Shinichiro Hayashi, Tatsuo Otsuki, Carlos A. Paz de Araujo
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Patent number: 6245580Abstract: A coating of liquid precursor containing a metal is applied to a first electrode, baked on a hot plate in oxygen ambient at a temperature not exceeding 300° C. for five minutes, then RTP annealed at 675° C. for 30 seconds. The coating is then annealed in oxygen or nitrogen ambient at 700° C. for one hour to form a thin film of layered superlattice material with a thickness not exceeding 100 nm. A second electrode is applied to form a capacitor, and a second anneal is performed in oxygen or nitrogen ambient at a temperature not exceeding 700° C. If the material is strontium bismuth tantalate, the precursor contains u mole-equivalents of strontium, v mole-equivalents of bismuth, and w mole-equivalents of tantalum, where 0.8≦u≦1.0, 2.0≦v≦2.3, and 1.9≦w≦2.1.Type: GrantFiled: January 11, 1999Date of Patent: June 12, 2001Assignee: Symetrix CorporationInventors: Narayan Solayappan, Vikram Joshi, Carlos A. Paz de Araujo
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Patent number: 6236076Abstract: A nonvolatile nondestructible read-out ferroelectric FET memory comprising a semiconductor substrate, a ferroelectric functional gradient material (“FGM”) thin film, and a gate electrode. In one basic embodiment, the ferroelectric FGM thin film contains a ferroelectric compound and a dielectric compound. The dielectric compound has a lower dielectric constant than the ferroelectric compound. There is a concentration gradient of the ferroelectric compound in the thin film. In a second basic embodiment, the FGM thin film is a functional gradient ferroelectric (“FGF”), in which compositional gradients of ferroelectric compounds result in unconventional hysteresis behavior. The unconventional hysteresis behavior of FGF thin films is elated to an enlarged memory window in ferroelectric FET memories. FGM thin films are preferably formed using a liquid source MOD methods, preferably a multisource CVD method.Type: GrantFiled: April 29, 1999Date of Patent: May 22, 2001Assignees: Symetrix Corporation, Matsushita Electronics CorporationInventors: Koji Arita, Carlos A. Paz de Araujo
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Patent number: 6225656Abstract: A protective layer in a ferroelectric integrated circuit contains small amounts of oxygen to protect ferroelectric oxide material against hydrogen degradation during the fabrication process. Typically, the protective layer is a hydrogen diffusion barrier layer formed to cover a thin film of ferroelectric oxide material. In one method, a small amount of oxygen is included in the sputter atmosphere during deposition of a hydrogen diffusion barrier or a metallized wiring layer. The oxygen forms oxides that inhibit diffusion of hydrogen towards the ferroelectric oxide material. The oxygen forms a concentration gradient so that the oxygen concentration in the interior of the protective layer is zero, and the oxygen concentration near the surfaces of the layer is about two weight percent.Type: GrantFiled: December 1, 1998Date of Patent: May 1, 2001Assignees: Symetrix Corporation, NEC CorporationInventors: Joseph D. Cuchiaro, Akira Furuya, Carlos A. Paz de Araujo, Yoichi Miyasaka
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Patent number: 6225156Abstract: A hydrogen barrier layer is formed above a ferroelectric thin film in an integrated circuit. The hydrogen barrier layer is directly over a protected segment of the ferroelectric thin film, while a sacrificial segment of the ferroelectric thin film extends laterally beyond the edges of the hydrogen barrier layer. The sacrificial segment absorbs hydrogen so that it cannot diffuse laterally into the protected segment of the ferroelectric thin film. After it absorbs hydrogen, the sacrificial segment is etched away to allow electrical connection to circuit layers below it. The ferroelectric thin film preferably comprises a layered superlattice compound. Excess bismuth or niobium added to the standard precursor solution of a strontium bismuth tantalum niobate compound helps to reduce hydrogen degradation of the ferroelectric properties.Type: GrantFiled: April 17, 1998Date of Patent: May 1, 2001Assignees: Symetrix Corporation, NEC CorporationInventors: Joseph D. Cuchiaro, Akira Furuya, Carlos A. Paz de Araujo, Yoichi Miyasaka
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Patent number: 6207465Abstract: In a ferroelectric integrated circuit, a hydrogen barrier layer comprising titanium or titanium nitride or both is formed over a metal oxide element to protect it from hydrogen degradation. After hydrogen annealing and other process steps causing hydrogenating or reducing conditions, the hydrogen barrier layer is removed in a two-step etching process. The first etch step is a dry etch, preferably a standard ion-mill etching process, which rapidly removes most of the hydrogen barrier layer. The second step is a wet, chemical etch, preferably using a solution containing NH4OH, H2O2, and H2O, which selectively removes remnants of the hydrogen barrier layer from the circuit by oxidizing a chemical element of the barrier layer. The metal oxide material preferably comprises a layered superlattice compound.Type: GrantFiled: April 17, 1998Date of Patent: March 27, 2001Assignees: Symetrix Corporation, NEC CorporationInventors: Joseph D. Cuchiaro, Akira Furuya, Carlos A. Paz de Araujo, Yoichi Miyasaka
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Patent number: 6203619Abstract: An apparatus and method are disclosed for fabricating thin films for use in an active component of an integrated circuit by the use of an assembly line type process. A plurality of substrate stations are located on a platen which is rotated to move each station sequentially between a misted deposition device, a drying device, and a solidification device. The misted deposition device includes a mist showerhead in a movable housing. The mist showerhead separates a velocity reduction chamber from a deposition chamber.Type: GrantFiled: October 26, 1998Date of Patent: March 20, 2001Assignee: Symetrix CorporationInventor: Larry D. McMillan
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Patent number: 6198225Abstract: A thin film of ferroelectric layered superlattice material in a flat panel display device is energized to selectively influence the display image. In one embodiment, a voltage pulse causes the layered superlattice material to emit electrons that impinge upon a phosphor, causing the phosphor to emit light. In another embodiment, an electric potential creates a remanent polarization in the layered superlattice material, which exerts an electric field in liquid crystal layer, thereby influencing the transmissivity of light through the liquid crystal. The layered superlattice material is a metal oxide formed using an inventive liquid precursor containing an alkoxycarboxylate. The thin film thickness is preferably in the range 50-140 nm, so that polarizabilty and transparency of the thin film is enhanced. A display element may comprise a varistor device to prevent cross-talk between pixels and to enable sudden polarization switching. A functional gradient in the ferroelectric thin film enhances electron emission.Type: GrantFiled: June 7, 1999Date of Patent: March 6, 2001Assignees: Symetrix Corporation, Matsushita Electronics CorporationInventors: Gota Kano, Yasuhiro Shimada, Shinichiro Hayashi, Koji Arita, Carlos A. Paz de Araujo, Joseph D. Cuchiaro, Larry D. McMillan
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Patent number: 6194227Abstract: The surface of a Si substrate is coated with a lower electrode of precious metal (Pt), then a buffer layer comprising an oxide thin film containing Bi is deposited. On the surface of the buffer layer, a thin film of a Bi layer structured ferroelectric substance is formed. Thus, reaction of the Bi layer structured ferroelectric substance with the precious metal coating the Si substrate is avoided during crystallization carried out at a low temperature. Therefore, deviation in composition of the thin film thus formed is suppressed to provide the thin film with a high density. When the thickness of the buffer layer is not greater than five percent of that of the Bi layer structured ferroelectric thin film, electrical characteristics of a capacitor are not deteriorated. When electrical connection is conducted by polycrystalline Si, production of oxide can be avoided by deposition at 650° C.Type: GrantFiled: October 14, 1998Date of Patent: February 27, 2001Assignees: Symetrix Corporation, NEC CorporationInventor: Takashi Hase
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Patent number: 6188098Abstract: A semiconductor device has a device isolation oxide film, an interlayer insulating film, hydrogen barrier films, a lower electrode, a capacitor insulating film, an upper electrode, an interlayer insulating film and a wiring layer, formed on a silicon substrate. A gate electrode is formed on a gate oxide film between impurity diffusion regions in the silicon substrate. Further, a capacitor portion, comprising the lower electrode, the capacitor insulating film (ferroelectric or high dielectric substance) and the upper electrode, is completely covered with the hydrogen barrier films. The hydrogen barrier films prevent deterioration of the ferroelectric substance and the high dielectric constant material due to reducing conditions in a hydrogen atmosphere. Other device characteristics, however, are not adversely affected because only the capacitor portion is completely covered with the hydrogen barrier films.Type: GrantFiled: October 26, 1998Date of Patent: February 13, 2001Assignees: Symetrix Corporation, NEC CorporationInventor: Kazushi Amanuma
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Patent number: 6180971Abstract: In the manufacture of an integrated circuit memory capacitor, an underlying hydrogen barrier layer, either electrically nonconductive or conductive, is formed on a substrate. Then, the lower electrode layer and the ferroelectric/dielectric layer are formed and selectively etched. A nonconductive hydrogen barrier layer is formed on the dielectric layer and selectively etched. After a heat treatment in oxygen, the upper electrode layer and a conductive hydrogen barrier layer are successively deposited and selectively etched. The nonconductive hydrogen barrier layer covers the capacitor except for a part of the upper electrode, and the conductive hydrogen barrier layer covers a portion where there is no nonconductive hydrogen barrier layer. Thus, the underlying barrier layer, the nonconductive barrier layer and the conductive barrier layer together completely cover the memory capacitor. The dielectric layer comprises a ferroelectric or high-dielectric constant metal oxide.Type: GrantFiled: November 23, 1998Date of Patent: January 30, 2001Assignees: Symetrix Corporation, NEC CorporationInventor: Yukihiko Maejima
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Patent number: 6174213Abstract: Metal organic precursor compounds are dissolved in an organic solvent to form a nonaqueous liquid precursor. The liquid precursor is applied to the inner envelope surface of a fluorescent lamp and heated to form a metal oxide thin film layer. The metal oxide thin film layer may be a conductor, a protective layer or provide other functions. The films have a thickness of from 20 nm to 500 nm. A conductive layer comprising tin-antimony oxide with niobium dopant may be fabricated to have a differential resistivity profile by selecting a combination of precursor composition and annealing temperatures.Type: GrantFiled: September 1, 1999Date of Patent: January 16, 2001Assignees: Symetrix Corporation, Matsushita Electronics CorporationInventors: Carlos A. Paz de Araujo, Jolanta Celinska, Joseph D. Cuchiaro, Jeffrey W. Bacon, Larry D. McMillan, Akihiro Matsuda, Gota Kano, Yoshio Yamaguchi, Tatsuo Morita, Hideo Nagai