Patents Assigned to Symetrix Corporation
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Patent number: 5843516Abstract: A precursor liquid comprising several metal 2-ethylhexanoates, such as strontium, tantalum and bismuth 2-ethylhexanoates, in a xylenes/methyl ethyl ketone solvent is prepared, a substrate is placed within a vacuum deposition chamber, a small amount of hexamethyl-disilazane is added to the precursor liquid is misted, and the mist is flowed into the deposition chamber while maintaining the chamber at ambient temperature to deposit a layer of the precursor liquid on the substrate. The liquid is dried, baked, and annealed to form a thin film of a layered superlattice material, such as strontium bismuth tantalate, on the substrate. Then an integrated circuit is completed to include at least a portion of the layered superlattice material film in a component of the integrated circuit.Type: GrantFiled: September 16, 1996Date of Patent: December 1, 1998Assignees: Symetrix Corporation, Matsushita Electronics CorporationInventors: Gary F. Derbenwick, Larry D. McMillan, Narayan Solayappan, Michael C. Scott, Carlos A. Paz de Araujo, Shinichiro Hayashi
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Patent number: 5840110Abstract: Metal alkoxycarboxylate-based liquid precursor solutions are used to form electronic devices (100) that include mixed layered superlattice materials of a type having discrete oxygen octahedral layers and collated with a superlattice-generator layer. The precursor solutions include a plurality of metal moieties in effective amounts for yielding the layered superlattice materials. These metal moieties are mixed to include an A/B portion capable of forming an A/B layer, a perovskite-like AB layer portion capable of forming a perovskite-like AB octahedral layer, and a superlattice-generator portion capable of forming the superlattice-generator layer. The precursors are deposited in liquid form upon a substrate and annealed to provide the layered superlattice materials.Type: GrantFiled: May 10, 1996Date of Patent: November 24, 1998Assignees: Symetrix Corporation, Matsushita Electronics CorporationInventors: Masamichi Azuma, Carlos A. Paz De Araujo, Larry D. McMillan
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Patent number: 5825057Abstract: A liquid precursor containing a metal is applied to a substrate, RTP baked, and annealed to form a layered superlattice material. Prebaking the substrate and oxygen in the RTP and anneal is essential, except for high bismuth content precursors. Excess bismuth between 110% and 140% of stoichiometry and RTP temperature of 725.degree. C. is optimum. The film is formed in two layers, the first of which uses a stoichiometric precursor and the second of which uses an excess bismuth precursor. The electronic properties are so regularly dependent on process parameters and material composition, and such a wide variety of materials are possible, that electronic devices can be designed by selecting from a continuous record of the values of one or more electronic properties as a continuous function of the process parameters and material composition, and utilizing the selected process and material composition to make a device.Type: GrantFiled: December 5, 1994Date of Patent: October 20, 1998Assignees: Symetrix Corporation, Olympus Optical Co., Ltd.Inventors: Hitoshi Watanabe, Carlos A. Paz De Araujo, Hiroyuki Yoshimori, Michael C. Scott, Takashi Mihara, Joseph D. Cuchiaro, Larry D. McMillan
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Patent number: 5818238Abstract: A first terminal of a device-under-measurement (DUM) is connected to the input of a buffer amplifier having its output applied to the inverting input of an operational amplifier through a resistor having the value "aR". A resistor having a value "R" is connected between the inverting input and ground. A second terminal of the DUM is connected to the input of a buffer amplifier having its output connected to the non-inverting input of the operational amplifier through a resistor having the value "ar". The non-inverting input is also connected to the output of a signal generator through a resistor having the value "r". The second terminal is also connected to ground through a load. An oscilloscope is connected across the outputs of the buffer amplifiers, and a computer controls the signal generator in response to a signal from the oscilloscope.Type: GrantFiled: March 15, 1996Date of Patent: October 6, 1998Assignee: Symetrix CorporationInventor: Alan DeVilbiss
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Patent number: 5814849Abstract: A method for fabricating an integrated circuit capacitor having a dielectric layer comprising BST with excess B-site material, such as titanium, added. A polyoxyalkylated metal liquid precursor solution is prepared comprising a stock solution of BST of greater then 99.999% purity blended with excess B-site material such as titanium such that the titanium is in the range of 0-100 mol %. A xylene exchange is then performed to adjust the viscosity of the solution for spin-on application to a substrate. The precursor is spun on a first electrode, dried at 400.degree. C. for 2 minutes, then annealed at 650.degree. C. to 800.degree. C. for about an hour to form a layer of BST with excess titanium. A second electrode is deposited, patterned, and annealed at between 650.degree. C. to 800.degree. C. for about 30 minutes. The resultant capacitor exhibits an enlarged dielectric constant with only a small increase in leakage current.Type: GrantFiled: January 27, 1997Date of Patent: September 29, 1998Assignees: Symetrix Corporation, Matsushita Electronics CorporationInventors: Masamichi Azuma, Carlos A. Paz De Araujo, Michael C. Scott
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Patent number: 5811847Abstract: An integrated circuit memory, MMIC, or other device including a dielectric comprising lead-tin zirconium-titanium oxide (PSZT). The proportion of tin ranges from 30% to 50% of the total amount of tin, zirconium and titanium. The dielectric is formed by applying a first liquid precursor having 10% excess lead to a substrate and heating it to form a first PSZT thin film, applying a second liquid precursor having 5% excess lead to the first thin film and heating to form a second thin film, then applying the first liquid precursor and heating to form a third thin film, and annealing the three thin films together to form a PSZT dielectric layer.Type: GrantFiled: June 28, 1996Date of Patent: September 22, 1998Assignee: Symetrix CorporationInventors: Vikram Joshi, Joseph D. Cuchiaro, Carlos A. Paz de Araujo, Larry D. McMillan
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Patent number: 5803961Abstract: Metal alkoxycarboxylate-based liquid precursor solutions are used to form electronic devices (100) that include mixed layered superlattice materials (112) of a type having discrete oxygen octahedral layers (124) and (128) collated with a superlattice-generator layer (116). The precursor solutions include a plurality of metal moieties in effective amounts for yielding the layered superlattice materials. These metal moieties are mixed to include an A/B portion capable of forming an A/B layer (124), a perovskite-like AB layer portion capable of forming a perovskite-like AB octahedral layer (128), and a superlattice-generator portion capable of forming the superlattice-generator layer (116). The precursors are deposited in liquid form upon a substrate and annealed to provide the layered superlattice materials.Type: GrantFiled: May 10, 1996Date of Patent: September 8, 1998Assignees: Symetrix Corporation, Matsushita Electronics CorporationInventors: Masamichi Azuma, Carlos A. Paz De Araujo, Larry D. McMillan
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Patent number: 5792592Abstract: A photosensitive liquid solution is used to make thin films for use in integrated circuits. The photosensitive liquid solution contains a photo initiator, and solvent, and a mixture of metals bonded to free-radical-susceptible monomers. The metals are mixed in amounts corresponding to the desired stoichiometry of a metal oxide thin film that derives from the. The photosensitive liquid solution is applied to a substrate, soft baked, and exposed to ultraviolet radiation under a photo mask. The ultraviolet radiation patterns the soft-baked film through a free radical polymerization chain reaction. A solvent etch is used to remove the unpolymerized portion of the polymerized film. The remaining thin film pattern is annealed to provide a patterned metal oxide film.Type: GrantFiled: May 24, 1996Date of Patent: August 11, 1998Assignees: Symetrix Corporation, Mitsubishi Materials CorporationInventors: Hiroto Uchida, Nobuyuki Soyama, Kensuke Kageyama, Katsumi Ogi, Michael C. Scott, Larry D. McMillan, Carlos A. Paz de Araujo
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Patent number: 5788757Abstract: A metal organic liquid precursor solution includes metal organic complexes dispersed in an ester solvent. The ester solvent has medium length carbon chains to prevent the precipitation of strongly electropositive metals in solution. A liquid precursor solution is used to make thin film metal oxides of uniform thickness and consistent quality.Type: GrantFiled: December 23, 1996Date of Patent: August 4, 1998Assignees: Symetrix Corporation, Mitsubishi Materials CorporationInventors: Hiroto Uchida, Nobuyuki Soyama, Kensuke Kageyama, Katsumi Ogi, Jeffrey W. Bacon, Michael C. Scott, Larry D. McMillan, Carlos A. Paz de Araujo
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Patent number: 5784310Abstract: Thin film ferroelectric materials for use in integrated memory circuits, such as FERAMS and the like, contain strontium bismuth niobium tantalate having an empirical formula SrBi.sub.2+E (Nb.sub.X Ta.sub.2-X)O.sub.9+3E/2, wherein E is a number representing an excess amount of bismuth ranging from zero to 2; and X is a number representing an excess amount of niobium ranging from 0.01 to 0.9. The thin films demonstrate an exceptional resistance to polarization imprinting when challenged with unidirectional voltage pulses.Type: GrantFiled: March 3, 1997Date of Patent: July 21, 1998Assignee: Symetrix CorporationInventors: Joseph D. Cuchiaro, Narayan Solayappan, Carlos A. Paz de Araujo, Larry D. McMillan
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Method and apparatus for fabricating silicon dioxide and silicon glass layers in integrated circuits
Patent number: 5759923Abstract: A precursor liquid comprising silicon in a xylenes solvent is prepared, a substrate is placed within a vacuum deposition chamber, the precursor liquid is misted, and the mist is flowed into the deposition chamber while maintaining the chamber at ambient temperature to deposit a layer of the precursor liquid on the substrate. The liquid is dried, baked, and annealed to form a thin film of silicon dioxide or silicon glass on the substrate. Then an integrated circuit is completed to include at least a portion of the silicon dioxide or silicon glass layer as an insulator for an electronic device in the integrated circuit.Type: GrantFiled: March 14, 1996Date of Patent: June 2, 1998Assignees: Symetrix Corporation, Matsushita Electronics CorporationInventors: Larry D. McMillan, Michael C. Scott, Carlos A. Paz de Araujo, Tatsuo Otsuki, Shinichiro Hayashi -
Patent number: 5751034Abstract: A charge storage device, such as an integrated circuit memory, including a dielectric comprising a barium-strontium-niobium oxide. A liquid precursor including the metals barium, strontium, and niobium is prepared and applied to a platinum electrode. The precursor is baked and annealed to form a dielectric having the formula Ba.sub.x Sr.sub.y Nb.sub.z O.sub.30, where x=1.3 to 3.5, y=1.5 to 3.7, and z=10. A top platinum electrode is then formed to provide a memory cell capacitor. Optimum results to date have been obtained with Ba.sub.2 Sr.sub.3 Nb.sub.10 O.sub.30, which yields a memory cell dielectric with dielectric constant over 1000 and a leakage current of less than 10.sup.-5 amperes per square centimeter for voltages up to 5 volts.Type: GrantFiled: June 12, 1997Date of Patent: May 12, 1998Assignee: Symetrix CorporationInventors: Joseph D. Cuchiaro, Vikram Joshi, Claudia P. DaCruz, John M. McNelis, Carlos A. Paz de Araujo
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Patent number: 5723171Abstract: An electrode for a ferroelectric electronic device is formed on an SiO.sub.2 isolation layer by depositing an adhesion layer, such as titanium, between about 25 .ANG. and 500 .ANG. thick, then a layer of a nobel metal, such as platinum, that is at least 10 times thicker than the adhesion layer. The electrode is then annealed at a temperature higher than the minimum oxide eutectic temperature of the adhesion layer. The electrode is moved into the annealing furnace at a ramp rate such that it reaches its anneal temperature in five minutes or less. The relative thinness of the adhesion layer and the quick ramp up of the anneal causes all the titanium to be tied up in the oxide before it can diffuse through the platinum, and prevents the formation of rutile phases of the titanium and defects such as voids and hillocks in the platinum, which can destabilize the electrode.Type: GrantFiled: December 23, 1996Date of Patent: March 3, 1998Assignee: Symetrix CorporationInventors: Joseph D. Cuchiaro, Larry D. McMillan, Carlos A. Paz de Araujo
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Patent number: 5723361Abstract: A method for fabricating an integrate circuit capacitor having a dielectric layer comprising BST with excess A-site and B-site materials such as barium and titanium added. An organometallic or metallic soap precursor solution is prepared comprising a stock solution of BST of greater than 99.999% purity blended with excess A-site and B-site materials such as barium and titanium such that the barium is in the range of 0.01-100 mol %, and such that the titanium is in the range of 0.01-100 mol %. A xylene exchange is then performed to adjust the viscosity of the solution for spin-on application to a substrate. The precursor solution is spun on a first electrode, dried at 400.degree. C. for 2 to 10 minutes, then annealed at 650.degree. C. to 800.degree. C. for about an hour to form a layer of BST with excess titanium. A second electrode is deposited, patterned, and annealed at between 650.degree. C. to 800.degree. C. for about 30 minutes.Type: GrantFiled: July 5, 1994Date of Patent: March 3, 1998Assignees: Symetrix Corporation, Matsushita Electronics CorporationInventors: Masamichi Azuma, Carlos A. Paz De Araujo, Michael C. Scott
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Patent number: 5721699Abstract: A memory cell includes a ferroelectric capacitor and a transistor connected between one side of the capacitor and a bit line. A drive circuit includes an operational amplifier having an output, an inverting input, and a non-inverting input. A plate line is connected between the other side of the capacitor and the output. The non-inverting input is connected to a data-in line through a first resistor and to the bit line through a second resistor. The inverting input is connected to a constant voltage source through a third resistor, and to the plate line through a fourth resistor. A first buffer amplifier is connected between the bit line and the second resistor, and a second buffer amplifier is connected between the plate line and the fourth resistor. Voltage is connected to the other one of the operational amplifier inputs.Type: GrantFiled: March 18, 1996Date of Patent: February 24, 1998Assignee: Symetrix CorporationInventor: Alan DeVilbiss
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Patent number: 5719416Abstract: A method of fabricating a ferroelectric or layered superlattice DRAM compatible with conventional silicon CMOS technology. A MOSFET is formed on a silicon substrate. A thick layer of BPSG followed by a thin SOG layer overlies the MOSFET. A capacitor is formed by depositing a layer of platinum, annealing, depositing an intermediate layer comprising a ferroelectric or layer superlattice material, annealing, depositing a second layer of platinum, then patterning the capacitor. Another SOG layer is deposited, contact holes to the MOSFET and capacitor are partially opened, the SOG is annealed, the contact holes are completely opened, and a Pt/Ti/PtSi wiring layer is deposited.Type: GrantFiled: July 18, 1994Date of Patent: February 17, 1998Assignees: Symetrix Corporation, Olympus Optical Co., Ltd.Inventors: Hiroyuki Yoshimori, Hitoshi Watanabe, Carlos A. Paz De Araujo, Shuzo Hiraide, Takashi Mihara, Larry D. McMillan
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Patent number: 5708302Abstract: An integrated circuit capacitor (20) includes a bottom electrode structure (24) having an adhesion metal portion (34), a noble metal portion (36), and a second noble metal layer (40). A process of manufacture includes annealing the adhesion metal portion (34) and the noble metal portion (36) prior to the deposition of second noble metal layer (40) for purposes of forming barrier region (38). The electrode (24) preferably contacts metal oxide layer (26), which is made of a perovskite or perovskite-like layered superlattice material. A temporary capping layer (59) is formed and removed in manufacture, which serves to increase polarization potential from the device by at least 40%.Type: GrantFiled: April 26, 1995Date of Patent: January 13, 1998Assignees: Symetrix Corporation, Matsushita Electronics CorporationInventors: Masamichi Azuma, Carlos A. Paz De Araujo, Joseph D. Cuchiaro
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Patent number: 5699035Abstract: A thin-film zinc oxide varistor (10) for use in integrated circuits and the like is produced by applying a polyoxyalkylated metal complex, such as a metal alkoxycarboxylate, to a substrate (12, 14, and 16) for the formation of a dried nonohmic layer (18). The method of production includes the steps of providing a substrate and a precursor solution including a polyoxyalkylated zinc complex (P22, P24), coating a portion of the substrate with the precursor solution (P26), drying the coated substrate (P32), and crystallizing the dried thin-film zinc oxide layer (P30). The resultant crystalline zinc oxide varistor layer (18) may be doped with bismuth, yttrium, praseodymium, cobalt, antimony, manganese, silicon, chromium, titanium, potassium, dysprosium, cesium, cerium, and iron to provide a non-ohmic varistor. The varistor layer (10) is annealed at a temperature ranging from about 400 to about 1000.degree. C.Type: GrantFiled: March 22, 1995Date of Patent: December 16, 1997Assignee: Symetrix CorporationInventors: Takeshi Ito, Shuzo Hiraide, Michael C. Scott, Carlos A. Paz de Araujo, Larry D. McMillan
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Patent number: 5690727Abstract: A method for fabricating an integrated circuit capacitor having a dielectric layer comprising BST with excess B-site material, such as titanium, added. A polyoxyalkylated metal liquid precursor solution is prepared comprising a stock solution of BST of greater then 99.999% purity blended with excess B-site material such as titanium such that the titanium is in the range of 0-100 mol %. A xylene exchange is then performed to adjust the viscosity of the solution for spin-on application to a substrate. The precursor is spun on a first electrode, dried at 400.degree. C. for 2 minutes, then annealed at 650.degree. C. to 800.degree. C. for about an hour to form a layer of BST with excess titanium. A second electrode is deposited, patterned, and annealed at between 650.degree. C. to 800.degree. C. for about 30 minutes. The resultant capacitor exhibits an enlarged dielectric constant with only a small increase in leakage current.Type: GrantFiled: January 27, 1997Date of Patent: November 25, 1997Assignees: Symetrix Corporation, Matsushita Electronics CorporationInventors: Masamichi Azuma, Carlos A. Paz de Araujo, Michael C. Scott
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Patent number: 5688565Abstract: A precursor liquid comprising several metal 2-ethylhexanoates, such as stroritium tantalum and bismuth 2-ethylhexanoates, in a xylenes/methyl ethyl ketone solvent is prepared, a substrate is placed within a vacuum deposition chamber, the precursor liquid is misted, and the mist is flowed into the deposition chamber while maintaining the chamber at ambient temperature to deposit a layer of the precursor liquid on the substrate. The liquid is dried, baked, and annealed to form a thin film of a layered superlattice material, such as strontium bismuth tantalate, on the substrate. Then an integrated circuit is completed to include at least a potion of the layered superlattice material film in a component of the integrated circuit.Type: GrantFiled: June 7, 1995Date of Patent: November 18, 1997Assignee: Symetrix CorporationInventors: Larry D. McMillan, Carlos A. Paz de Araujo, Michael C. Scott