Abstract: Techniques are provided for steering vector generation. A methodology implementing the techniques according to an embodiment includes converting time domain data received from an antenna array to channelized frequency domain data. The method also includes receiving a request from a signal detection system, the request including a timestamp and duration of a detected signal of interest (SOI) and an indication that the SOI is pulsed or continuous. The method further includes generating, for a pulsed SOI, steering vectors to steer the antenna array to the pulsed SOI based on a segment of the time domain data stored in a first memory and identified by the time stamp and duration; and generating, for a continuous SOI, steering vectors to steer the antenna array to the continuous SOI based on a segment of the channelized frequency domain data stored in a second memory and identified by the time stamp and duration.

Abstract: A method fabricating at least one universal substrate from a batch product. The method includes steps of: providing a preform having a predetermined profile; wrapping a plurality of conductors about an outer surface of the preform; injecting a nonconductive matrix between conductors of the plurality of conductors, wherein the nonconductive matrix permeates between interstitial spaces of the plurality of conductors to isolate some conductors of the plurality of conductors from one another; forming the batch product that includes the plurality of conductors and the nonconductive matrix; and wafering at least one section of the batch product to form the at least one universal substrate. The plurality of conductors of the at least one universal substrate defines a first connection surface, a second connection surface opposite to the first connection surface, and a plurality of conductive pathways defined between the first connection surface and the second connection surface.

Abstract: Techniques are provided for fabricating an expandable tightly coupled dipole array (TCDA) antenna with dual-linear linear polarization. An antenna implementing the techniques according to an embodiment includes an array of the electrically coupled antenna elements. The antenna elements comprise a horizontally polarized planar dipole antenna disposed on a first foldable substrate and a ground plane disposed on a second foldable substrate. The second substrate is parallel to the first substrate. The antenna elements also comprise a first printed circuit board (PCB) coupling the first substrate to the second substrate, the first PCB perpendicular to the first substrate and the second substrate, and a second PCB coupling the first substrate to the second substrate, the second PCB perpendicular to the first substrate and the second substrate and parallel to the first PCB. The antenna elements further comprise a vertically polarized dipole antenna disposed on the second PCB.

Abstract: A crimping tool for assembling a countermeasure expendable. The crimping tool includes a main body that has a top end, a bottom end vertically opposite to the top end, and an axis defined between the top end and the bottom end. The main body is configured to receive a cap of the countermeasure expendable, a spacer of the countermeasure expendable, and a cartridge case of the countermeasure expendable. The crimping tool also includes a presser that selectively operably engages with the main body and is configured to press the cap and the spacer of the countermeasure expendable into the cartridge case of the countermeasure expendable. The crimping tool also includes a set of crimpers that operably engages with the main body and is configured to crimp at least the cap, the spacer, the cartridge case with one another to collectively maintain the cap and the spacer with the cartridge case.

Abstract: A smart store communication interface (SSCI) squib of a countermeasure expendable. SSCI squib also includes a first electrical network. SSCI squib also includes a second electrical network that is isolated from the first electrical network. SSCI squib includes a fire pin contact that operably engages with the first electrical network and the second electrical network. The SSCI squib is configured to one of ignite a propellant loaded inside of a housing of the SSCI squib and communicate with a processor of the countermeasure expendable in response to receiving at least one electrical signal at the fire pin contact.

Abstract: Techniques are provided for employing an embedded software defined radio (SDR) in a navigation system. A navigation system implementing the techniques according to an embodiment includes a global positioning system (GPS) receiver configured to acquire and track received GPS signals. The system also includes an SDR configured to process received communication signals. The communication signals include timing data. The SDR is further configured to calculate position and navigation data based on a combination of the processed communication signals and the tracked GPS signals provided by the GPS receiver. The system further includes a system timer configured to provide a common time base for use by the GPS receiver and the SDR. The navigation system is implemented in an application specific integrated circuit (ASIC).

Abstract: An antenna assembly includes an antenna feed configured to receive a signal over a wide bandwidth, a ground plane, and an antenna element. The antenna element includes first and second conductive dipole arms each in planar alignment with a surface of the ground plane and adjacent to each other. The antenna assembly further includes a conductive wall (“H-wall”) in electrical communication with the ground plane and having an end adjacent to, and physically separate from, the second conductive dipole arm, where an axial length of the H-wall being orthogonal to the ground plane, and a resistive surface having an attenuation effect on the reflected signal from the ground plane.

Abstract: A method of determining a schedule for a pointing device includes distributing targets among a plurality of groups and assigning schedules to the groups, after which the groups and group schedules are not modified. A partial pointing schedule is successively grown by selecting a list of remaining groups, and appending a best candidate sub-schedule for the list to the partial schedule. If a sub-schedule cannot be found for which the grown partial schedule meets all applicable requirements, the partial schedule is pruned to a previous state and a different, previously evaluated sub-schedule is appended to the pruned partial schedule to attempt re-growth. Groups, group schedules, lists, and sub-schedules can be selected according to values, dwell times, and/or windows of performance of the targets, groups, and sub-schedules. If no schedule is found that meets all requirements, a missed group can be excluded from the schedule.

Abstract: An antenna assembly includes an electrically conductive ground plane; a signal pin adjacent to the ground plane; and a tapered conductive surface coupled to the signal pin, the tapered conductive surface being symmetric about an axis passing through the signal pin and orthogonal to the ground plane, where the ground plane and the tapered conductive surface are an additively manufactured contiguous unitary component. The antenna assembly can further include a support structure extending from the ground plane to the tapered conductive surface. The support structure can be coupled to an outer edge of the tapered conductive surface or a center region of the tapered conductive surface. The antenna assembly can further include a cover over the tapered conductive surface thereby forming a hollow region between the cover and the tapered conductive surface.

Abstract: An antenna assembly includes a first flare arm, a second flare arm located adjacent to the first flare arm, a feed block having an opening therein, a feed slot extending from the opening to an outer periphery of the feed block, and a feed line integral with the feed block as a contiguous unitary component. The first flare arm and the second flare arm are symmetric about the feed block. The feed line can have a first portion integrated into the feed block and a second portion at least partially extending across the feed slot. A method of fabricating an antenna assembly includes additively manufacturing a feed block having a feed slot adjacent to a first flare arm and a second flare arm, and additively manufacturing a feed line having a first portion integral with the feed block, and a second portion at least partially extending across the feed slot.

Abstract: An adaptive filter protocol stored on a non-transitory computer readable medium that is operatively in communication with a processor of a platform. The adaptive filter protocol includes a first processing loop that is operatively in communication with at least one receiving device of the platform for receiving at least one input signal. The adaptive filter protocol also includes a second processing loop that is operatively in communication with the first processing loop and has a deterministic gradient descent optimization logic and an interpolation logic. When the at least one receiving device receives the at least one input signal, the adaptive filter protocol enables the processor to generate a refined match filter parameters that substantially correlates with the initial parameters of the at least one input signal upon completing a plurality of refining cycles of the second processing loop.

Abstract: An adaptive filter protocol stored on a non-transitory computer readable medium that is operatively in communication with a processor of a platform. The adaptive filter protocol includes a first processing loop that is operatively in communication with at least one receiving device of the platform for receiving at least one input signal. The adaptive filter protocol also includes a second processing loop that is operatively in communication with the first processing loop and has a deterministic gradient descent optimization logic and an interpolation logic. When the at least one receiving device receives the at least one input signal, the adaptive filter protocol enables the processor to generate a refined match filter parameters that substantially correlates with the initial parameters of the at least one input signal upon completing a plurality of refining cycles of the second processing loop.

Abstract: A communications circuit includes a first circuit block and a second circuit block. The first circuit block includes a first splitter, a first signal path coupled to a first output of the first splitter, a second signal path coupled to a second output of the first splitter, and a first switch configured to couple the second signal path to a third signal path or to couple a fourth signal path to the third signal path. The second circuit block includes a second splitter, a fifth signal path coupled to a first output of the second splitter, a sixth signal path coupled to a second output of the second splitter, and a second switch configured to couple the sixth signal path to the third signal path or to couple a seventh signal path to the third signal path. The third signal path extends between the first and second circuit blocks.

Abstract: A computer program product and corresponding method for targeting one or more points in a three dimensional (3D) model is provided. The computer program product including least one non-transitory computer readable storage medium in operative communication with a computer processing unit (CPU), the storage medium having instructions stored thereon that, when executed by the CPU, implement a process to register the 3D model with a stereoscopic image pair. The steps performed include inputting a first image and a second image that define a stereoscopic image pair into an object targeting program, wherein an object is shown in the first image and the second image, inputting a three dimensional (3D) model of the object into the object targeting program, registering the 3D model to the stereoscopic image pair, and targeting a point associated with or near the object based on the 3D model having been registered to the stereoscopic image pair.

Abstract: An ultra-wideband radio frequency (RF) apparatus for combining and/or dividing RF signals. RF apparatus includes a circuit board, a communication cable that operably engages with the circuit board, at least two transmission lines that are formed on the circuit board and operably engages with the communication cable, and at least two connectors that operably engages with the at least two transmission lines. The RF apparatus is operable in a first configuration and a second configuration. When the RF apparatus is provided in the first configuration, the RF apparatus is operable to divide a first RF signal into at least two RF signals. When the RF apparatus is provided in the second configuration, the RF apparatus is operable to combine the at least two RF signals into a second RF signal. The RF apparatus is capable of achieving a low insertion loss less than 1 dB over a bandwidth greater than 20:1.

Abstract: An antenna assembly includes a first flexible layer including a conductive ground plane on a first layer of dielectric material, and a second flexible layer including a first array of conductive patches on a second layer of dielectric material. The antenna assembly further includes a second array of conductive patches on a third layer of dielectric material. The first, second, and third flexible layers are rollable or foldable, to provide a stowed position for the antenna assembly and a deployed position for the antenna assembly. In an example, the first array of conductive patches includes at least a first patch and a second patch, and the second array of conductive patches includes at least a third patch and a fourth patch. In the deployed position, the first patch is above the third patch and the ground plane, and the second patch is above the fourth patch and the ground plane.

Abstract: An attenuator circuit includes a differential input having first and second inputs, and a differential output having first and second outputs. The attenuator circuit further includes a first transistor coupled between the first input and the first output, a second transistor coupled between the second input and the second output, a third transistor coupled between the first input and the second output, and a fourth transistor coupled between the second input and the first output. During a pass-through state, the first and second transistors are enabled, and the third and fourth transistors may be disabled. During an attenuation state, the first, second, third, and fourth transistors are all disabled. An attenuator network (e.g., T or Pi network) may have its differential input terminals coupled to the first and second inputs of the differential input, and its differential output terminals coupled to the first and second outputs of the differential output.

Abstract: A method of manufacturing an antenna assembly includes additively manufacturing an element that is monolithic and that includes (i) a ground plane, (ii) a patch above the ground plane, and (iii) a structure having a lower end in contact with the ground plane and an upper end in contact with the patch. The method further includes applying a dielectric material between the ground plane and the patch. In an example, the dielectric material is dielectric foam. The method further includes removing a section of the ground plane around the lower end of the structure, such that the structure extends through the ground plane and not in contact with the ground plane. The method further includes connecting an inner conductor of a coaxial cable connector to the lower end of the structure, and an outer portion of the coaxial cable connector to the ground plane.

Abstract: A method of growing large GaAs or GaP IR window slabs by HVPE, and in embodiments by LP-HVPE, includes obtaining a plurality of thin, single crystal, epitaxial-quality GaAs or GaP wafers, cleaving the wafers into tiles having ultra-flat, atomically smooth, substantially perpendicular edges, and then butting the tiles together to form an HVPE substrate larger than 4 inches for GaP, and larger than 8 inches or even 12 inches for GaAs. Subsequent HVPE growth causes the individual tiles to fuse by optical bonding into a large “tiled” single crystal wafer, while any defects nucleated at the tile boundaries are healed, causing the tiles to merge with themselves and with the slab with no physical boundaries, and no degradation in optical quality. A dopant such as Si can be added to the epitaxial gases during the final HVPE growth stage to produce EMI shielded GaAs windows.

Abstract: A method of manufacturing a structurally competent, EMI-shielded IR window includes using a mathematical model that combines the Sotoodeh and Nag models to determine an optimal thickness and dopant concentration of a doped layer of GaAs or GaP. A slab of GaAs or GaP is prepared, and a doped layer of the same material having the optimal thickness and dopant concentration is applied thereto. In embodiments, the doped layer is applied by an HVPE method such as LP-HVPE, which can also provide enhanced GaAs transparency near 1 micron. The Drude model can be applied to assist in selecting an anti-reflective coating. If the model predicts that the requirements of an application cannot be met by a doped layer alone, a doped layer can be applied that exceeds the required IR transparency, and a metallic grid can be applied to improve the EMI shielding, thereby satisfying the requirements.