Patents Assigned to Tabula, Inc.
  • Patent number: 7535252
    Abstract: Some embodiments provide a method of operating a configurable circuit. The method performs a first operation by the configurable circuit based on a first configuration data set. When a user-design signal has a value from a set of values, the method performs a second operation based on a second configuration data set, after the first operation. When the user-design signal does not have a value from said set of values, the method performs a third operation based on a third configuration data set, after the first operation. Some embodiments provide a reconfigurable IC that includes a set of reconfigurable circuits and sets of associated configuration storage elements that store configuration data sets. At least one reconfigurable circuit receives a first sub-set of its configuration data when a user-design signal has a first value and receives a second sub-set of its configuration data when the user-design signal has a second value.
    Type: Grant
    Filed: May 25, 2007
    Date of Patent: May 19, 2009
    Assignee: Tabula, Inc.
    Inventors: Steven Teig, Andrew Caldwell, Jason Redgrave
  • Patent number: 7532032
    Abstract: Some embodiments of the invention provide configurable integrated circuit (IC) that has a first interface rate for exchanging signals with a circuit outside of the configurable IC. The configurable IC has an array of configurable circuits. The array includes several configurable logic and interconnect circuits. Each configurable logic circuit can configurably perform a set of functions. The configurable interconnect circuits can configurably couple the logic circuits. At least several of the configurable circuits can be reconfigured faster than the first rate.
    Type: Grant
    Filed: August 28, 2006
    Date of Patent: May 12, 2009
    Assignee: Tabula, Inc.
    Inventors: Herman Schmit, Michael Butts, Brad L. Hutchings, Steven Teig
  • Patent number: 7532030
    Abstract: Some embodiments provide a first interconnect circuit for accessing stored data in a reconfigurable IC. The reconfigurable IC has at least one reconfigurable circuit and a set of storage elements for storing several data sets for the particular reconfigurable circuit. The first interconnect circuit includes second, third, and fourth interconnect circuits, where the fourth interconnect circuit connects to outputs of the second and third interconnect circuits. The second and third interconnect circuits connect to the storage element sets to provide data sets to the fourth interconnect circuit, which, in turn, provides the received data to the particular reconfigurable circuit. The fourth interconnect circuit operates at a different rate than the second and third interconnect circuits. In some embodiments, the stored data sets are configuration data sets for configuring the particular reconfigurable circuit.
    Type: Grant
    Filed: July 20, 2007
    Date of Patent: May 12, 2009
    Assignee: Tabula, Inc.
    Inventor: Jason Redgrave
  • Patent number: 7528627
    Abstract: Some embodiments of the invention provide a configurable integrated circuit (“IC”). This IC includes several configurable circuits for receiving configuration data and configurably performing a set of operations based on the configuration data. It also includes several hybrid circuits. Each particular hybrid circuit can interchangeably perform as either a logic circuit or an interconnect circuit in the configurable IC.
    Type: Grant
    Filed: October 31, 2007
    Date of Patent: May 5, 2009
    Assignee: Tabula, Inc.
    Inventors: Jason Redgrave, Brad Hutchings, Herman Schmit, Steven Teig
  • Patent number: 7530033
    Abstract: Some embodiments of the invention provide a configurable integrated circuit (“IC”). The configurable IC includes a set of multiplexers that each has a set of input terminals, a set of output terminals, and a set of select terminals. The set of multiplexers includes a group of multiplexers, where at least one input terminal of each multiplexer in the group is a permanently inverting input terminal. During at least a set of cycles during the operation of the configurable IC, several multiplexers in the group of multiplexers are used to implement a particular function.
    Type: Grant
    Filed: November 7, 2005
    Date of Patent: May 5, 2009
    Assignee: Tabula, Inc.
    Inventors: Andrew Caldwell, Herman Schmit, Steven Teig
  • Patent number: 7530044
    Abstract: Some embodiments provide a method for manufacturing a programmable system in package. The method divides a system into sets of operations. For each set of operations, the method identifies several integrated circuits (“IC's”) for performing the set of operations. The method packages several of identified IC's into a single IC package. The several identified IC's includes at least one configurable IC. In some embodiments, the configurable IC is a reconfigurable IC that can reconfigure more than once during run time. In some of these embodiments, the reconfigurable IC can be reconfigured at a first clock rate that is faster than the clock rates of one or more of the other IC's in the PSiP. The first clock rate is faster than the clock rate of all of the other IC's in the PSiP in some embodiments.
    Type: Grant
    Filed: March 15, 2005
    Date of Patent: May 5, 2009
    Assignee: Tabula, Inc.
    Inventor: Steven Teig
  • Patent number: 7529992
    Abstract: An integrated circuit (IC) performs error detection and correction on configuration data. The IC includes a configuration memory for storing configuration data and error correction data, and error correction circuitry for receiving the configuration data, correcting a particular error in the received configuration data when the particular error exists in the configuration data, and outputting the configuration data without the particular error. The IC further includes a configurable circuit (e.g., a configurable logic circuit or a configurable interconnect circuit) that receives the error-corrected configuration data from the error correction circuitry, and circuitry to write the corrected configuration data and error data back into the configuration memory.
    Type: Grant
    Filed: March 27, 2006
    Date of Patent: May 5, 2009
    Assignee: Tabula, Inc.
    Inventors: Steven Teig, Jason Redgrave, Timothy Horel
  • Patent number: 7525835
    Abstract: The invention relates to reduced power cells. Some embodiments of the invention provide a memory circuit that has a storage cell. The storage cell contains several electronic components and an input. The electronic components receive a reduced voltage from the input to the cell. The reduced voltage reduces the current leakage of the electronic components within the cell. Some embodiments provide a memory circuit that has a level converter. The level converter receives a reduced voltage and converts the reduced voltage into values that can be used to store and retrieve data with stability in the cell. Some embodiments provide a method for storing data in a memory circuit that has a storage cell. The method applies a reduced voltage to the input of the cell. The method level converts the reduced voltage. The reduced voltage is converted to a value that can be used to store and retrieve data with stability in the cell. The reduced voltage reduces a current leakage of electronic components within the cell.
    Type: Grant
    Filed: August 24, 2007
    Date of Patent: April 28, 2009
    Assignee: Tabula, Inc.
    Inventor: Jason Redgrave
  • Patent number: 7525342
    Abstract: Some embodiments provide a reconfigurable IC that includes at least two sections, each with several configurable circuits. Each configurable circuit configurably performs a set of operations. Each section stores multiple configuration data sets for each configurable circuit. Each configuration data set for a particular configurable circuit specifies the operation that the particular configurable circuit has to perform from the circuit's set of operations, where the configurable circuits of different sections iterate through different numbers of configuration data sets.
    Type: Grant
    Filed: August 18, 2007
    Date of Patent: April 28, 2009
    Assignee: Tabula, Inc.
    Inventors: Steven Teig, Herman Schmit, Jason Redgrave
  • Patent number: 7525344
    Abstract: Some embodiments provide a configurable IC that includes a configurable routing fabric with storage elements. In some embodiments, the routing fabric provides a communication pathway that routes signals to and from source and destination components. The routing fabric of some embodiments provides the ability to selectively store the signals passing through the routing fabric within the storage elements of the routing fabric. In this manner, a source or destination component continually performs operations (e.g., computational or routing) irrespective of whether a previous signal from or to such a component is stored within the routing fabric. The source and destination components include configurable logic circuits, configurable interconnect circuits, and various other circuits that receive or distribute signals throughout the configurable IC.
    Type: Grant
    Filed: May 27, 2007
    Date of Patent: April 28, 2009
    Assignee: Tabula, Inc.
    Inventors: Steven Teig, Herman Schmit, Jason Redgrave
  • Patent number: 7521958
    Abstract: Some embodiments of the invention provide a configurable integrated circuit (“IC”). This IC includes several configurable logic circuits for receiving configuration data and configurably performing a set of operations based on the configuration data. It also includes several hybrid circuits. Each particular hybrid circuit has: (1) a set of inputs, (2) a set of outputs for selectively connecting to the set of inputs, and (3) a set of select lines for receiving select signals that direct the hybrid circuit to connect the input set to the output set in a particular manner. At least one select signal is for controllably receiving configuration data and at least one select line is for controllably receiving signals generated by the configurable logic circuits.
    Type: Grant
    Filed: April 23, 2007
    Date of Patent: April 21, 2009
    Assignee: Tabula, Inc.
    Inventors: Brad Hutchings, Herman Schmit, Steven Teig
  • Patent number: 7521959
    Abstract: Some embodiments provide a configurable IC that includes a configurable routing fabric with storage elements. In some embodiments, the routing fabric provides a communication pathway that routes signals to and from source and destination components. The routing fabric of some embodiments provides the ability to selectively store the signals passing through the routing fabric within the storage elements of the routing fabric. In this manner, a source or destination component continually performs operations (e.g., computational or routing) irrespective of whether a previous signal from or to such a component is stored within the routing fabric. The source and destination components include configurable logic circuits, configurable interconnect circuits, and various other circuits that receive or distribute signals throughout the configurable IC.
    Type: Grant
    Filed: May 27, 2007
    Date of Patent: April 21, 2009
    Assignee: Tabula, Inc.
    Inventor: Steven Teig
  • Patent number: 7518400
    Abstract: Some embodiments provide a barrel shifter on a configurable integrated circuit (IC). The barrel shifter has a first set of tiles and a second set of tiles with configurable circuits. The barrel shifter also has a first set of non-neighboring offset connections (NNOCs) connecting at least one of the tiles in the first set to at least one of the tiles in the second set.
    Type: Grant
    Filed: March 8, 2006
    Date of Patent: April 14, 2009
    Assignee: Tabula, Inc.
    Inventors: Jason Redgrave, Herman Schmit
  • Patent number: 7518402
    Abstract: Some embodiments provide a configurable IC that includes several configurable tiles. The configurable tiles include several interior tiles within the interior of an arrangement of configurable tiles. The arrangement has several sides that define the exterior boundary of the arrangement. In some embodiments, each configurable interior tile includes a set of configurable logic circuits, a set of configurable input-select circuits for selecting inputs to the configurable logic circuits, and a set of configurable routing interconnect circuits for routing signals between the configurable logic circuits. The set of configurable input-select circuits in each interior tile has a set of inputs that are supplied by a set of asymmetric locations in the configurable IC.
    Type: Grant
    Filed: July 9, 2007
    Date of Patent: April 14, 2009
    Assignee: Tabula, Inc.
    Inventors: Herman Schmit, Steven Teig, Brad Hutchings, Randy Renfu Huang, Jason Redgrave
  • Patent number: 7514957
    Abstract: Some embodiments provide a configurable IC that includes a configurable routing fabric with storage elements. In some embodiments, the routing fabric provides a communication pathway that routes signals to and from source and destination components. The routing fabric of some embodiments provides the ability to selectively store the signals passing through the routing fabric within the storage elements of the routing fabric. In this manner, a source or destination component continually performs operations (e.g., computational or routing) irrespective of whether a previous signal from or to such a component is stored within the routing fabric. The source and destination components include configurable logic circuits, configurable interconnect circuits, and various other circuits that receive or distribute signals throughout the configurable IC.
    Type: Grant
    Filed: May 27, 2007
    Date of Patent: April 7, 2009
    Assignee: Tabula, Inc
    Inventors: Herman Schmit, Randy Renfu Huang
  • Patent number: 7512850
    Abstract: Some embodiments provide a configurable integrated circuit (IC) that has several configurable circuits and several user design state (UDS) circuits. The UDS circuits store user-design state values. The configurable IC also includes a debug network communicatively coupled to the UDS circuits. The debug network is for retrieving the user-design state values of several UDS circuits at various stoppages of the operation of the IC without retrieving configuration data that is used to configure the configurable circuits of the IC. The retrieved user-design state values at each stoppage are used as the checkpointed state of the IC while debugging the IC. In some embodiments, the debug network allows the checkpointing of only certain portions of the configurable IC.
    Type: Grant
    Filed: March 13, 2006
    Date of Patent: March 31, 2009
    Assignee: Tabula, Inc.
    Inventors: Jason Redgrave, Brad Hutchings, Herman Schmit, Steven Teig, Tom Kronmiller
  • Patent number: 7504858
    Abstract: Some aspects of the present invention involve connections in a configurable IC. Some embodiments provide a configurable integrated circuit with a first array of tiles. The first array of tiles has columns and rows of tiles. The IC has a first tile within the first array of tiles. The first tile has a set of outputs. The IC has a second tile in the array of tiles. The second tile has a set of inputs. The IC has a non-neighboring offset connection (NNOC) from an output of the first tile to an input of the second tile. The second tile is offset from the first tile by at least one row and at least two columns or by at least two rows and at least one column.
    Type: Grant
    Filed: March 8, 2006
    Date of Patent: March 17, 2009
    Assignee: Tabula, Inc.
    Inventors: Herman Schmit, Steven Teig, Brad Hutchings
  • Patent number: 7501855
    Abstract: Some embodiments provide a configurable integrated circuit (IC) with an arrangement of circuit elements, a trace buffer, and a transport network separate from the arrangement of circuit elements. The transport network transports data from the arrangement of circuit elements to the trace buffer. In some embodiments the configurable IC is on a single chip. In some embodiments the configurable IC further includes trigger circuits for triggering the trace buffer to stop recording a set of data. In some such embodiments the configurable IC further includes deskew circuits for temporally aligning a subset of the data. In some embodiments the subset of the data passes through the transport network on its way to the deskew circuits.
    Type: Grant
    Filed: June 27, 2007
    Date of Patent: March 10, 2009
    Assignee: Tabula, Inc
    Inventors: Brad Hutchings, Jason Redgrave
  • Patent number: 7496879
    Abstract: Some embodiments provide a method of designing a configurable integrated circuit (“IC”) with several configurable circuits. The method receives a design having several different operations for the configurable circuits to perform in different operational cycles. The method assigns the operations concurrently to different operational cycles and different configurable circuits. In some embodiments, the method concurrently optimizes the assignment of the operations to different operation cycles and different configurable circuits. In some embodiments, the optimization includes moving the operations between different operational cycles and different configurable circuits in order to identify an assignment of the operations that satisfies a set of optimization criteria.
    Type: Grant
    Filed: March 15, 2005
    Date of Patent: February 24, 2009
    Assignee: Tabula, Inc.
    Inventors: Andre Rohe, Steven Teig
  • Patent number: 7492186
    Abstract: Some embodiments of the invention provide a configurable integrated circuit (IC) that has several configurable circuits for configurably performing different operations. During the operation of the IC, each particular configurable circuit performs a particular operation that is specified by a particular configuration data set for the particular configurable circuit. While the IC operates and a first set of configurable circuits performs a first set of operations, configuration data is loaded from the outside of the IC for configuring a second set of configurable circuits. In some embodiments, the configurable IC includes a configuration network for rapid loading configuration data in the IC from outside of the IC. In some of these embodiments, the configuration network is a pipelined network.
    Type: Grant
    Filed: March 13, 2006
    Date of Patent: February 17, 2009
    Assignee: Tabula, Inc.
    Inventors: Brad Hutchings, Jason Redgrave, Teju Khubchandani, Herman Schmit, Steven Teig