Abstract: A method for forming aluminum bumps by first sputter aluminum and then chemical mechanical polishing to remove excess aluminum is disclosed. In the method, a pre-processed electronic substrate which has a plurality of I/O pads formed on top is first provided. An insulating material layer such as SiO2, Si3N4, SOG or polyimide is then deposited on the pads to a thickness that is essentially the thickness of the aluminum bumps to be formed. A plurality of openings with one on each of the plurality of I/O pads is then photolithographically formed, followed by a sputtering deposition to fill the plurality of openings with a metal that includes aluminum. A chemical mechanical polishing technique is then used to remove the excess aluminum so that a top surface of the aluminum bump is flush with the top surface of the insulating material layer, followed by the final step of removing at least partially a thickness of the insulating material layer by a wet etch process.

Abstract: A method and system for monitoring the quality of a slurry utilized in a chemical mechanical polishing operation. A slurry is generally delivered through a tubular path during a chemical mechanical polishing operation. A laser light is generally transmitted from a laser light source, such that the laser light comes into contact with the slurry during the chemical mechanical polishing operation. The laser light can then be detected, after the laser light comes into contact with the slurry to thereby monitor the quality of the slurry utilized during the chemical mechanical polishing operation. The laser light that comes into contact with the slurry can be also be utilized to monitor a mixing ratio associated with the slurry.

Abstract: A method for fabricating a pair of patterned target layers within a microelectronic product employs a pair of patterned etch mask layers of different thicknesses. The pair of patterned etch mask layers of different thicknesses provides that the pair of patterned target layers may be formed with individual linewidth control, absent fabrication or modification of a photomask to realize the same result. The method is particularly useful for fabricating pair of gate electrodes for use within CMOS devices.

Abstract: A full-image exposure process of a field of a semiconductor wafer having an alignment mark is disclosed. The field of the semiconductor wafer may be located at an edge of the wafer, such as the lower-left or upper-right edge of the wafer, and is exposed using a full-image mask, such as a positive photoresist mask, and that can be inclusive of the alignment mark. A clear out process is subsequently performed around the alignment mark on the field of the semiconductor wafer to reveal the alignment mark. Prior deposition of photoresist or other layers, and subsequent exposure and stripping of the photoresist and etching of the other layers may also be performed.

Abstract: An in-line hot-wire sensor for monitoring the mixing and the flow rate of slurry is disclosed. The hot-wire sensor may include a number of resistors organized into a Wheatstone bridge, as well as a frequency-domain transform mechanism. The resistors include a hot-wire resistor that is placed in-line with the slurry after substances have been mixed to become the slurry. The Wheatstone bridge thus yields a signal that is transformed to the frequency domain by the frequency-domain transform mechanism, such as by performing a Fast Fourier Transform (FFT) of the signal. The frequency-domain transform is used to monitor the mixing of the substances into the slurry, and the flow rate of the slurry. The signal may be amplified prior to transformation to the frequency domain.

Abstract: The removal of defect particles that may be created during polysilicon hard mask etching, and that are embedded within the polysilicon layer, is disclosed. Oxide is first grown in the polysilicon layer exposed through the patterned hard mask layer, so that the defect particle becomes embedded within the oxide. Oxide growth may be accomplished by rapid thermal oxidation (RTO). The oxide is then exposed to an acidic solution, such as hydrofluoric (HF) acid, to remove the oxide and the embedded defect particle embedded therein.

Abstract: A method for coating a thick spin-on-glass layer on a semiconductor structure without cracking problems and with improved planarization is disclosed. In the method, a pre-processed semiconductor structure that has a plurality of metal lines on top is first provided. After a first conformal layer of silicon oxide is deposited on top to insulate the metal lines, a first and a second layer of SOG are coated on top to a total thickness of at least 2500 Å. On top of the second SOG layers, is then deposited a second layer of silicon oxide by a plasma enhanced oxide deposition technique to a thickness of at least 1000 Å. A third and a fourth SOG layer are then coated on top of the stress buffer layer to a total thickness of at least 2500 Å.

Abstract: Within both a method for controlling microelectronic fabrication production and a system for controlling microelectronic fabrication production there is developed and evaluated for a plurality of microelectronic fabrication facilities a plurality of demand, allocation and output management plans prior to assigning and entering within at least one microelectronic fabrication facility a microelectronic fabrication order. The development and evaluation of the plurality of demand, allocation and output management plans provides for enhanced flexibility when assigning and entering the microelectronic fabrication order.

Abstract: A method for preventing or reducing corrosion of copper containing features included in a semiconductor wafer in a chemical mechanical polishing (CMP) process including providing a semiconductor wafer polishing surface including copper filled anisotropically etched features; polishing the semiconductor wafer polishing surface according to a first CMP process including applying at least one polishing slurry to contact the semiconductor wafer polishing surface for removing an uppermost layer of the semiconductor wafer polishing surface; and, alternately applying a copper corrosion inhibitor solution for a period of time and the at least one polishing slurry for a period of time to contact the semiconductor wafer polishing surface to comprise a polishing cycle said polishing cycle performed at least once during at least a second CMP process.

Abstract: A method and an apparatus for detecting contaminating species such as metal particles on a wafer edge from a semiconductor fabrication process are disclosed. In the method, a wafer is suspended and rotated in a container with a volume of solvent at a bottom portion of the container such that only an edge portion of the wafer is exposed to the solvent. After the wafer is turned in the solvent such that the entire edge portion of the wafer has been exposed to the solvent, the solvent may be removed for analyzing in an electronic instrument for detecting the species of contaminating particles. The apparatus further includes a wafer mounting device for supporting the wafer which can be adjusted in height to suit wafers of different diameters.

Abstract: A method forming sidewall spacers on a semiconductor substrate without using the conventional plasma etching method is disclosed. In the method, a semiconductor substrate that has a gate structure formed on a top surface is first provided, followed by the deposition of a dielectric material layer on top of the semiconductor substrate. The substrate is then rotated to a rotational speed of at least 50 rpm, and an acid vapor is flown onto the substrate until the sidewall spacers are formed. The dielectric material layer for forming the sidewall spacers may be SiO2, SiON or Si3N4. The acid vapor utilized may be formed from an acid of HF, H3PO4, H2SO4 or HCl. In a preferred embodiment, the semiconductor substrate may be rotated to a rotational speed between about 100 rpm and about 150 rpm for a time period between about 10 sec. and about 20 sec.

Abstract: An apparatus for monitoring the Z-axis position of a transfer blade on a wafer transfer robot which transfers wafers among multiple chambers in a semiconductor fabrication facility. The invention comprises a CCD laser displacement sensor which measures the height or Z-axis position of the transfer blade and generates an analog voltage the value of which depends on the height of the transfer blade. An analog controller connected to the CCD laser displacement sensor converts the analog voltage signal to physical distance, which may be displayed on an LCD display on the analog controller. The analog controller may further be connected to a robot controller through an interface PCB, in which case a voltage signal corresponding to an abnormal position of the transfer blade is transmitted to the robot controller and the wafer transfer operation is terminated.

Abstract: A reticle for holding a mask thereon with reduced particle contamination problem is described. The reticle is constructed by a base plate that is formed of an optically transparent material such as quartz and has a recessed slot in a top surface to enclose an area at least the size of a mask formed on the base plate. An adhesive partially fills the recessed slot such that a top surface of the adhesive is at least 0.5 mm below the top surface of the base plate. A pellicle frame is mounted in the recessed slot with a bottom end of the frame encased in the adhesive and a thin film covering the top end of the pellicle frame to from a hermetically sealed cavity for protecting the mask.

Abstract: A tensioning assembly for a polishing belt on a linear chemical mechanical polishing apparatus. The tensioning assembly comprises first and second rollers which are operably engaged by respective air cylinders and exert a selected degree of downward tension on the lower run of the horizontal polishing belt. A third roller biased typically by a spring pushes upwardly on the lower run of the belt between the first and second rollers. Accordingly, the first and second rollers, in conjunction with the third roller, tension the belt on the apparatus to maintain optimum material removal rates and uniformity. The degree of tension exerted on the belt can be varied according to stretching of the belt resulting from prolonged use.

Abstract: An apparatus and method for testing the electrical characteristics of a semiconductor wafer, including integrated circuit components thereof. An outer layer surrounds an inside needle, such that the outer layer comprises a hard material, which can penetrate through a semiconductor layer to permit subsequent testing of at least one semiconductor integrated circuit component located below the semiconductor layer. The inside needle may be adapted to electrically contact one or more electrical semiconductor circuit components located below the semiconductor layer. The inside needle generally comprises a prober, while the outer layer generally comprises a piercer. The outer layer may be configured from a hard material, such as diamond or carborundum. The inside needle and the outer layer together form a concentric double layer structure prober. The outer layer generally comprises a sheath formed from a hard dielectric material, such that the sheath comprises a piercer.

Abstract: A method for coating a thick spin-on-glass layer on a semiconductor structure without cracking problems and with improved planarization is disclosed. In the method, a pre-processed semiconductor structure that has a plurality of metal lines on top is first provided. After a first conformal layer of silicon oxide is deposited on top to insulate the metal lines, a first and a second layer of SOG are coated on top to a total thickness of at least 2500 Å. On top of the second SOG layers, is then deposited a second layer of silicon oxide by a plasma enhanced oxide deposition technique to a thickness of at least 1000 Å. A third and a fourth SOG layer are then coated on top of the stress buffer layer to a total thickness of at least 2500 Å.

Abstract: A cleaning tool for cleaning substrates, comprising a circulation conduit through which is circulated a cleaning liquid or gas. The circulation conduit is disposed in fluid communication with an upstream flow chamber and a downstream cleaning chamber, the cross-sectional area of which cleaning chamber is less than the cross-sectional area of the flow chamber. In use, the cleaning chamber receives a wafer substrate for cleaning of particles or removal of polymer films from the substrate. The smaller cross-sectional area of the cleaning chamber accelerates the flow of a cleaning fluid flowing through the cleaning chamber from the flow chamber. The rapidly-flowing cleaning fluid removes the particles and/or films from the substrate while preventing dropping of the removed particles or re-deposition of the film back onto the substrate. A particle filter may be provided in the circulation conduit downstream of the cleaning chamber for removing the particles.

Abstract: A distributed communications network apparatus and method employ a plurality of static information pages in a plurality of languages. The apparatus and method also employ a language selection utility for purposes of selecting a static page within the plurality of static pages, in accord with a language preference determined with respect to a requester. The requester may then be directed to the static page within the plurality of static pages, in accord with the language preference. By employing the plurality of static pages in conjunction with the language selection utility, the apparatus and method are provided with enhanced efficiency.

Abstract: A method for wet etching a metal nitride containing layer overlying a silicon oxide containing layer in a semiconductor device or micro-electro-mechanical device manufacturing process including providing a substrate including a silicon oxide containing layer and an overlying exposed metal nitride containing layer; providing a wet etching solution including phosphoric acid and water; adding a silicon containing compound which undergoes a hydrolysis reaction in the wet etching solution; and, contacting the exposed metal nitride containing layer with the wet etching solution for a period of time to remove the metal nitride containing layer.

Abstract: A dryer lid for a substrate dryer such as a Marangoni-type substrate drying system. The dryer lid includes a lid panel which is mounted on a substrate cleaning tank and has a gasket slot that extends into the bottom surface of the lid panel, around the perimeter thereof. A sealing gasket is seated in the gasket slot. The gasket slot receives the upper edge of a lid frame, the bottom edge of which typically supports a gas shower panel fitted with multiple gas nozzles inside the substrate cleaning tank. Accordingly, the sealing gasket is interposed between the lid frame and the lid panel and seals the junction between those elements to prevent leakage of vaporized IPA and nitrogen drying gases from the cleaning tank during drying of substrates in the cleaning tank.