Abstract: A semi-conductor wafer polishing head includes three air lines for controlling three respective head functions, and an air control system providing precise head control and functional checking of each head sub-system, including air line pressure checking and chamber leak rate testing. The control system includes electrically operated valves for selectively coupling air chambers in the head with either a source of pressurized air, a source of negative air pressure, or a vent to atmosphere. A pair of air gauges are employed to check chamber leak rate respectively during positive and negative air pressure tests.

Abstract: A self-sensing wafer holder in a robot blade is described which includes a holder body of generally elongated shape adapted for carrying a wafer on a top surface and at least three sensors positioned on the holder body sufficiently away from each other to form a plane that is covered by the wafer. The at least three sensors can be of the capacitive type, the optical type or the weight sensing type. The wafer holder is capable of determining whether a wafer is properly seated on top of the holder and automatically stopping the motion of the robot blade when a misplacement is detected by utilizing a sensing circuit including logic gates.

Abstract: An apparatus and a method for controlling a polishing profile on a substrate during a polishing process are disclosed. In the apparatus for controlling the polishing profile on a silicon wafer during a CMP process, an elastic plate that has sufficient rigidity is used as a backing plate for a wafer to be polished. By deforming the elastic plate with a contour adjusting device, the curvature of the substrate to be polished can be changed from being convex to being concave, or vice versa. The present invention novel apparatus and method therefore allows the achievement of a more uniform thickness profile after a polishing process. The present invention novel method and apparatus farther allows an in-situ control of the curvature of a elastic plate during polishing and thus a specific thickness profile on the substrate surface.

Abstract: The structure includes a plurality of first ring shape structure formed on a semiconductor wafer to act as the gates of the MOS devices. The areas in the inner side of the first ring shape structures are drain regions. A plurality of source regions having second ring shape structures are formed around each sides the first ring shape structures. A p conductive type region is formed in the wafer adjacent to the source regions. A third ring shape structure is formed in the semiconductor wafer to surround the p+conductive type region for serving as a guard ring.

Abstract: A method for determining an end point in a chemical mechanical polishing process by utilizing a dual wavelength interference technique and an apparatus for carrying out such method are provided. In the method, a rotating platen that is equipped with a laser generating source capable of generating laser emissions in two different wavelengths is utilized such that a dual wavelength interference pattern may be received by a laser detector and a greatly expanded period between cycles in a resulting dual wavelength interference pattern may be utilized to determine the end point for material removal in a significantly larger thickness of material. The present invention novel method and apparatus can be utilized not only in monitoring the end point of CMP polishing of a thin oxide layer such as ILD or STI, but also in material removal of larger thickness such as in the planarization process of an IMD layer.

Abstract: An apparatus for calibrating the centering of polishing heads in a polishing machine that is equipped with a plurality of spindles onto which polishing heads are mounted and a method for using such apparatus are disclosed. In the apparatus, a calibration disc is provided which has a hollow shaft mounted at a center of the bottom surface of the disc. A centering pin slidingly engaging an elongated cavity in the hollow shaft such that its protruded tip portion may be adjusted by using a locking device such as a set screw for different calibration procedures. The present invention novel apparatus can be used to calibrate the positioning of a polishing head mounted in a spindle with a pedestal in a load cup that is equipped with a center alignment aperture. The calibration can be conducted not only in the X, Y direction (or in the circumferential direction) of the spindle movement, but also in the Z direction (or a sweep direction) of the traversing spindle that occurs during a polishing operation.

Abstract: An apparatus for detecting defects in a wafer edge and a method for detecting are disclosed. In the apparatus, an ultrasonic detection unit is used to detect crazing or micro-cracks in a wafer edge, while a laser detection unit is used for detecting cracks in the wafer edge. The ultrasonic detection unit and the laser detection unit may be positioned in a detection module together with a wafer platform for holding and rotating a wafer positioned thereon. The detection module is placed in a mini-environment of clean room conditions which also include a robot transport device and a wafer storage cassette. The present invention novel apparatus is compact in size and can be moved to any location in a fab plant such that it is positioned adjacent to a process machine.

Abstract: A mobile WIP parts tracking system useful in semi-conductor fabrication operations, includes an identifying tag fixed to each of a plurality of parts containers, and a tag reader mounted on the head of a robotic carrier which delivers the containers to and removes the containers from any or a plurality of storage bin containers within a storage facility. A control system coordinates the movements of the robotic carrier and received information from the tag reader in order to provide positive, continuous tracking of the storage bin location of each of the containers within the facility. In addition to generating continuous tracking information, the robotic carrier may be used to scan each of the storage bin locations in order to search for a desired container.

Abstract: A mechanical indicator assembly mounted on a cassette stage in a semiconductor processing system is mechanically actuated when a wafer carrying cassette is correctly positioned onto the stage. The indicator assembly includes a pin engaged by the cassette which moves a lever mounted reflector to a position indicating that the cassette is correctly positioned. An electro-optical assembly disposed entirely outside a housing surrounding the stage, directs a light beam toward the reflector, and senses reflected light indicative of correct positioning of the cassette on the stage.

Abstract: The present invention discloses a Schmitt-trigger circuit with less power consumption by reducing the amount of the required DC current. The Schmitt-trigger circuit disclosed in the present invention basically encompasses a comparison circuit, a first current cutting circuit, and a second current cutting circuit. The comparison circuit receives the input signal and then generates the output signal. Both the first and second current cutting circuits feed in the output signal, and then generate feedback signals to feed the comparison circuit for cutting the DC current path when the input signal rises or falls to predetermined trigger points. When there is only one of the first and second current cutting circuits is required, the higher or lower trigger point can be adjusted without necessary to vary the size-ratio of the PMOS and NMOS transistors.

Abstract: The present invention provides a method for preparing samples for microscopic examination that requires a glass slide to be laminated to a sample substrate by an adhesive layer for polishing in a sample polishing process. A cavity can be first formed in the surface of the substrate by a focused ion beam technique to reveal a characteristic feature which needs to be examined. A wax-based material is then used to fill the cavity and to protect the characteristic feature before an adhesive layer is applied on top of the substrate for bonding a glass slide to the substrate. After the sample is sectioned in the polishing process to reveal a new cross-section that contains the characteristic feature, the protective coating of the wax-based material can be removed by a suitable solvent such that the characteristic feature is ready for microscopic examination. A suitable wax-based material can be a wax that is similar to a candle wax which can be easily removed by acetone.

Abstract: A method for wetting a filter element by a high viscosity liquid and an apparatus for practicing such method are provided. In the method, a sealable container that is equipped with a vibration device and is capable of holding a pressurized liquid therein is used. The vibration device creates a vibration in the pressurized liquid such that trapped air bubbles in the filter element are separated from the filter element and are exhausted. The method and apparatus can be used for pre-wetting any filter element in any type of liquid, either of the high viscosity type or of the low viscosity type, even though it is particularly suitable for wetting a filter element by a high viscosity liquid and removing trapped air bubbles in the filter element.

Abstract: The orientation of a wafer carried on a blade of a semiconductor wafer transfer system is sensed in order to prevent wafer damage during transfer of the wafer from chamber-to-chamber within a semiconductor processing system. At least a pair of laser beams are used to sense both tilt of the wafer on the blade, and mis-alignment of the blade in the chamber. A control and logic circuit lock out movement of the blade when the laser beams indicate tilt of the wafer or mis-alignment of the blade.

Abstract: A dynamic-floating-gate arrangement is used to improve the ESD robustness of driving-current-programmable CMOS output buffers in cell libraries, by suitably dynamically floating the gates of the NMOS/PMOS buffers using a small-dimension CMOS device having its drain connected to the gate of an unused CMOS buffer, its source connected to one of two voltage sources, and its gate connected between a resistance, that is connected between the two voltage sources, and a capacitance connected between the resistance and the same one of the two voltage sources as the source of the small-dimension CMOS device.

Abstract: A method and apparatus for storing wafers without the moisture absorption problem by providing a wafer storage container that has a cavity therein and an inert gas supply line into the cavity for flowing an inert gas at a substantially constant flow rate into the cavity while allowing a portion of the inert gas to escape into surrounding environment outside the cavity such that there is always a positive pressure differential maintained between the cavity and the outside environment to keep out moisture.

Abstract: A method is provided for forming a shallow trench isolation that has rounded and protected corners by first forming a bird's beak field oxide layer prior to the trench-forming step such that a rounded and protected top corner and a rounded bottom corner of the trench can be formed. The rounded top and bottom corners of the shallow trench opening have a radius of at least 100 .ANG. and a trench depth of not more than 5000 .ANG.. The top corner of the trench opening is protected by the beak portion of the bird's beak against etching in a subsequent oxide dip process before gate formation.

Abstract: The present invention discloses a method for depositing a coating layer on an article without edge bead formation by integrating the steps of an edge bead rinsing process with a coating spin-out process such that an edge portion of the wafer can be efficiently cleaned with a cleaning solvent when the coating material is still in its liquid state. While the present invention method can be applied to any coating materials and to any coated substrate, it is particularly suitable for cleaning a spin-on-glass material from a semiconductor wafer such that the wafer edge is not coated with a SOG material and thus particulate contamination caused by cracked SOG from the wafer edge can be avoided.

Abstract: The present invention discloses a method for increasing capacitance in DRAM capacitors by the operating steps of first providing a cavity in a semiconductor substrate, then depositing a first polysilicon layer in the cavity, and a metal layer on top of the polysilicon layer to form a silicide layer. The semiconductor substrate is then heat treated in a rapid thermal processing method so that the metal silicide layer forms an island structure on top of the first polysilicon layer. The first polysilicon layer can then be isotropically etched by using the metal silicide island structure as a mask to form an island structure in the first polysilicon layer. Additional dielectric layer and polysilicon layers are then deposited to form the insulating layer and the upper electrode for the capacitor. The increased surface area, i.e., approximately two times, of the lower electrode polysilicon layer greatly increases its storage area for the capacitor and therefore greatly improves its capacitance.

Abstract: A wafer centering device which includes a wafer centering chuck and a wafer calibration disk and a method for using such device are disclosed. The wafer centering chuck can be advantageously used to replace a vacuum chuck in a processing station that utilizes a rotating wafer platform. A center locating pin provided at the center of the wafer centering chuck can then be used to calibrate a centering position for a liquid dispensing nozzle head which dispenses any type of liquid on a rotating wafer. The wafer calibration disk may be used advantageously to calibrate the motion of a robot arm wafer loader when the disk is used in place of a regular wafer. A center aperture and a calibration grid provided on the wafer calibration disk may be used advantageously to identify the deviation of the center when the calibration disk is placed on a wafer centering chuck by the robotic arm.

Abstract: The present invention is a method for reducing particles during the manufacturing of fin or cylinder capacitors on a wafer. This invention utilizes a negative photoresist wafer edge exposure process to protect the edge of a wafer. This prevents polysilicon peeling from the edge of the wafer so as to reduce the defects and particles appearing on the wafer.