Patents Assigned to TECHNOLOGIES INC.
  • Publication number: 20200082682
    Abstract: A method for monitoring devices based at least in part on detected conditions includes accumulating, by one or more sensory nodes, sensed information in an area that includes a controllable device. The method also includes analyzing the sensed information to identify historical information regarding the area that includes the controllable device. The method also includes sensing a condition within the area by the one or more sensory nodes. The method also includes determining, based at least in part on the sensed condition and at least in part on the historical information, that the sensed condition relates to the controllable device. The method further includes generating, responsive to said determining, an alert regarding the controllable device.
    Type: Application
    Filed: November 14, 2019
    Publication date: March 12, 2020
    Applicant: ONEEVENT TECHNOLOGIES, INC.
    Inventors: Kurt Joseph Wedig, Daniel Ralph Parent, Scott Holmstrom, Paul Robert Mullaly
  • Publication number: 20200080159
    Abstract: In accordance with the invention, a novel gene translocation, (5q32, 6q22), in human non-small cell lung carcinoma (NSCLC) that results in a fusion proteins combining part of CD74 with Proto-oncogene Tyrosine Protein Kinase ROS Precursor (ROS) kinase has now been identified. The CD74-ROS fusion protein is anticipated to drive the proliferation and survival of a subgroup of NSCLC tumors. The invention therefore provides, in part, isolated polynucleotides and vectors encoding the disclosed mutant ROS kinase polypeptides, probes for detecting it, isolated mutant polypeptides, recombinant polypeptides, and reagents for detecting the fusion and truncated polypeptides.
    Type: Application
    Filed: November 19, 2019
    Publication date: March 12, 2020
    Applicant: Cell Signaling Technology, Inc.
    Inventors: Ting-Lei Gu, Ailan Guo
  • Publication number: 20200083059
    Abstract: A method used in forming an array of elevationally-extending strings of memory cells comprises forming a stack comprising vertically-alternating insulative tiers and wordline tiers. The stack comprises an etch-stop tier between a first tier and a second tier of the stack. The etch-stop tier is of different composition from those of the insulative tiers and the wordline tiers. Etching is conducted into the insulative tiers and the wordline tiers that are above the etch-stop tier to the etch-stop tier to form channel openings that have individual bases comprising the etch-stop tier. The etch-stop tier is penetrated through to extend individual of the channel openings there-through. After extending the individual channel openings through the etch-stop tier, etching is conducted into and through the insulative tiers and the wordline tiers that are below the etch-stop tier to extend the individual channel openings deeper into the stack below the etch-stop tier.
    Type: Application
    Filed: September 11, 2018
    Publication date: March 12, 2020
    Applicant: Micron Technology, Inc.
    Inventors: John D. Hopkins, Gordon A. Haller, Tom J. John, Anish A. Khandekar, Christopher Larsen, Kunal Shrotri
  • Publication number: 20200084139
    Abstract: Methods and systems are provided for link health forecasting to determine potential link failures such that remedial action may be taken prior to any data loss or degradation. DDM/DOM information may be used in conjunction with OAM protocols to monitor and predict link health degradation for faster failovers or self healing.
    Type: Application
    Filed: October 28, 2019
    Publication date: March 12, 2020
    Applicant: Cisco Technology, Inc.
    Inventors: Shrawan Chittoor Surender, Srinivas Pitta, Siddartha Gundeti, Arkadiy Shapiro
  • Publication number: 20200082683
    Abstract: A method for monitoring devices based at least in part on detected conditions includes accumulating, by one or more sensory nodes, sensed information in an area that includes a controllable device. The method also includes analyzing the sensed information to identify historical information regarding the area that includes the controllable device. The method also includes sensing a condition within the area by the one or more sensory nodes. The method also includes determining, based at least in part on the sensed condition and at least in part on the historical information, that the sensed condition relates to the controllable device. The method further includes generating, responsive to said determining, an alert regarding the controllable device.
    Type: Application
    Filed: November 14, 2019
    Publication date: March 12, 2020
    Applicant: ONEEVENT TECHNOLOGIES, INC.
    Inventors: Kurt Joseph Wedig, Daniel Ralph Parent, Scott Holmstrom, Paul Robert Mullaly
  • Publication number: 20200082873
    Abstract: Apparatuses and methods for distributing row hammer refresh events across a memory device is disclosed. In one embodiment, the present disclosure is directed to an apparatus that includes a first memory configured to receive a sequential series of refresh commands and to replace a first of the sequential refresh commands with a row hammer refresh operation once during a refresh steal cycle, a second memory configured to receive the sequential series of refresh commands at to replace a second of the sequential refresh command with a row hammer refresh operation once during a refresh steal cycle, wherein the first of the sequential refresh commands and the second of the sequential refresh commands are different commands.
    Type: Application
    Filed: November 13, 2019
    Publication date: March 12, 2020
    Applicant: MICRON TECHNOLOGY, INC.
    Inventor: Gregg D. Wolff
  • Publication number: 20200083371
    Abstract: Some embodiments include an integrated assembly with a semiconductor base having a horizontally-extending upper surface, and having a recessed region. A transistor gate is supported by the semiconductor base. The transistor gate has a first segment over the horizontally-extending upper surface, and has a second segment over the recessed region. The first segment has a first vertically-extending surface along an outer edge. The second segment has a ledge along an edge of the recessed region. The ledge has an upper surface which is lower than the horizontally-extending upper surface. The second segment has a second vertically-extending surface extending upwardly from an inner portion of the ledge. A first spacer is along the first vertically-extending surface. A second spacer is along the second vertically-extending surface. The second spacer has a bottom edge beneath the horizontally-extending upper surface of the base.
    Type: Application
    Filed: September 7, 2018
    Publication date: March 12, 2020
    Applicant: Micron Technology, Inc.
    Inventor: Masahiro Yokomichi
  • Publication number: 20200081782
    Abstract: Apparatuses and methods for memory repair for a memory device are described. An example apparatus includes: a data input/output circuit that provides data via a plurality of data signal lines; memory cell arrays; an ECC/Parity redundancy array; and a redundancy circuit coupled to the plurality of data signal lines. The redundancy circuit includes an error correction block that generates error correction information based on the data and provides the error correction information to the ECC/Parity redundancy array. If during test it is determined that a failure is not repairable by standard redundancy including error correction code, the error correction parity array is not needed and can be redirected by a block repair circuit. The error correction circuit can now have its functionality changed to allow the error correction array to become a block repair.
    Type: Application
    Filed: November 15, 2019
    Publication date: March 12, 2020
    Applicant: Micron Technology, Inc.
    Inventors: Seth Eichmeyer, James Rehmeyer, Benjamin Johnson, Jason Johnson
  • Publication number: 20200083230
    Abstract: Some embodiments include an integrated assembly having a first transistor adjacent to a second transistor. The first transistor has a first conductive gate material over a first insulative region, and the second transistor has a second conductive gate material over a second insulative region. A continuous high-k dielectric film extends across both of the first and second insulative regions. In some embodiments, the transistors may be incorporated into a sense amplifier.
    Type: Application
    Filed: October 16, 2019
    Publication date: March 12, 2020
    Applicant: Micron Technology, Inc.
    Inventors: Takuya Imamoto, Takeshi Nagai, Yoichi Fukushima
  • Publication number: 20200083069
    Abstract: A method for transferring micro-devices includes providing a device structure on a first layer over a first substrate and positioning an electromagnetic apparatus directly over the device structure. The method further includes activating an electromagnet in the electromagnetic apparatus to generate and confine a magnetic flux into a magnetic structure of the electromagnetic apparatus and magnetically couple the device structure to a surface of the magnetic structure proximal to the device structure. The method further includes lifting and removing the device structure from the first substrate and placing the device structure on a second layer over a second substrate, where the second substrate is separate from the first substrate. The method further includes releasing the device structure from the electromagnet, such that the device structure is decoupled from the electromagnet.
    Type: Application
    Filed: September 12, 2018
    Publication date: March 12, 2020
    Applicant: LuxNour Technologies Inc.
    Inventors: Makarem A. Hussein, Mohamed G. Zanaty
  • Publication number: 20200083694
    Abstract: An apparatus for protecting a component of a power distribution system against wildlife, the apparatus comprising a cover having a first wall and a second wall, the first wall and the second wall being spaced apart to receive part of the component; the first wall having an opening for receiving a pin; and a cantilever mount at the opening for supporting the pin in the first wall. Various configurations of cantilever mount and pin may be used. Opposing pins in opposing walls may be used. The pins may extend towards each other and may or may not meet.
    Type: Application
    Filed: September 27, 2018
    Publication date: March 12, 2020
    Applicant: Cantega Technologies Inc.
    Inventors: Martin S. Niles, Keith Yeats, Edmond LeRouzic, Paul Alfaro, Dick Yokota
  • Publication number: 20200081037
    Abstract: A sensing apparatus for characterizing current flow through a conductor includes a plurality of magnetic sensors. In some embodiments, the sensors are grouped in pairs to achieve common mode rejection of signals generated in response to magnetic fields not resulting from current flow through the conductor. Sensors having different levels of sensitivity are used to collect information regarding the magnetic field generated by the current flowing through the conductor, where such information is processed in order to characterize the magnetic field. In some cases the sensors are included on or in flexible material that can be wrapped around the conductor.
    Type: Application
    Filed: November 13, 2019
    Publication date: March 12, 2020
    Applicant: Everspin Technologies, Inc.
    Inventors: Angelo Ugge, Markus Schwickert, David Hayner
  • Patent number: 10586598
    Abstract: A memory device that includes a plurality of memory cells arranged in rows and columns, a plurality of bit lines each connected to one of the columns of memory cells, and a plurality of differential sense amplifiers each having first and second inputs and an output. For each of the differential sense amplifiers, the differential sense amplifier is configured to generate an output signal on the output having an amplitude that is based upon a difference in signal amplitudes on the first and second inputs, the first input is connected to one of the bit lines, and the second input is connected to another one of the bit lines. Alternately, one or more sense amplifiers are configured to detect signal amplitudes on the bit lines, and the device includes calculation circuitry configured to produce output signals each based upon a difference in signal amplitudes on two of the bit lines.
    Type: Grant
    Filed: July 2, 2018
    Date of Patent: March 10, 2020
    Assignee: Silicon Storage Technology, Inc.
    Inventors: Vipin Tiwari, Nhan Do
  • Patent number: 10587481
    Abstract: Techniques are provided for implementing clustering services in a virtual data center or other virtualized infrastructure in a manner that allows packets to be directed to a particular service engine of a service engine cluster.
    Type: Grant
    Filed: January 9, 2018
    Date of Patent: March 10, 2020
    Assignee: Cisco Technology, Inc.
    Inventors: Venkataraman Natham, Pagalavan Krishnamoorthy, Ramesh Santhanakrishnan, Ali Golshan
  • Patent number: 10588128
    Abstract: Provided is a wireless communication terminal. The processor is configured to receive, from a base wireless communication terminal through the transceiver, a first frame including first information indicating a duration required for a pending frame exchange sequence and second information indicating a frequency band which is allocated for transmission of a second frame, wherein the pending frame exchange sequence is a transmission sequence between one or more wireless communication terminals, set a network allocation vector (NAV) according to the first information indicating the duration for the pending frame exchange sequence, and reset the NAV when the wireless communication terminal does not receive a PLCP Protocol Data Unit (PPDU) for a reference time from a time point at which the first frame is received.
    Type: Grant
    Filed: February 28, 2018
    Date of Patent: March 10, 2020
    Assignees: WILUS INSTITUTE OF STANDARDS AND TECHNOLOGY INC., SK TELECOM CO., LTD.
    Inventors: Jinsoo Ahn, Yongho Kim, Jinsam Kwak, Juhyung Son
  • Patent number: 10586923
    Abstract: Semiconductor memory devices, resistive memory devices, memory cell structures, and methods of forming a resistive memory cell are provided. One example method of a resistive memory cell can include a number of dielectric regions formed between two electrodes, and a barrier dielectric region formed between each of the dielectric regions. The barrier dielectric region serves to reduce an oxygen diffusion rate associated with the dielectric regions.
    Type: Grant
    Filed: July 28, 2017
    Date of Patent: March 10, 2020
    Assignee: Micron Technology, Inc.
    Inventors: Matthew N. Rocklein, D. V. Nirmal Ramaswamy
  • Patent number: 10587096
    Abstract: A solid-state light source with built-in access resistance modulation is described. The light source can include an active region configured to emit electromagnetic radiation during operation of the light source. The active region can be formed at a p-n junction of a p-type side with a p-type contact and a n-type side with a n-type contact. The light source includes a control electrode configured to modulate an access resistance of an access region located on the p-type side and/or an access resistance of an access region located on the n-type side of the active region. The solid-state light source can be implemented in a circuit, which includes a voltage source that supplies a modulation voltage to the control electrode to modulate the access resistance(s).
    Type: Grant
    Filed: February 28, 2017
    Date of Patent: March 10, 2020
    Assignee: Sensor Electronic Technology, Inc.
    Inventors: Michael Shur, Grigory Simin
  • Patent number: 10583914
    Abstract: Sounds are generated by an aerial vehicle during operation. For example, the motors and propellers of an aerial vehicle generate sounds during operation. Systems, methods, and apparatus may actively adjust the position and/or configuration of one or more propeller blades of a propulsion mechanism to generate different sounds and/or lifting forces from the propulsion mechanism.
    Type: Grant
    Filed: June 27, 2016
    Date of Patent: March 10, 2020
    Assignee: Amazon Technologies, Inc.
    Inventors: Brian C. Beckman, John Raymond Brodie, Vedran Coralic, Taylor David Grenier, Gur Kimchi, Dominic Timothy Shiosaki, Ricky Dean Welsh, Richard Philip Whitlock
  • Patent number: 10587515
    Abstract: Technology for stateless forwarding of packets in an ICN is disclosed. Content routers modify a dynamic filter in an interest packet. In one aspect, a content router extracts a dynamic filter from an interest packet received on an ingress port and combines the dynamic filter with a local filter associated with the ingress port. The packet filter and the local filter may be combined without losing information in the packet filter or the local filter. A new filter may be inserted into the interest packet based on the combined packet filter and local filter. The interest packet having the new filter may be forwarded on an egress port. The data packet that returns the content object for the interest packet may be forwarded statelessly based on the dynamic filter. Thus, the data packet may be forwarded without use of a pending interest table (PIT).
    Type: Grant
    Filed: February 7, 2017
    Date of Patent: March 10, 2020
    Assignee: Futurewei Technologies, Inc.
    Inventors: Aytac Azgin, Ravishankar Ravindran
  • Patent number: D877927
    Type: Grant
    Filed: June 15, 2018
    Date of Patent: March 10, 2020
    Assignee: Violet Defense Technology, Inc.
    Inventor: Mark Nathan