Abstract: A conjugate of a modified randomly branched asymmetric polymer without a core and a member of a binding pair is described. The modified randomly branched asymmetric polymer can contain chain branches, terminal branches or both. The modified randomly branched asymmetric polymer can contain random asymmetric branches or random asymmetric junctions. The binding pair can be an antibody, antigen or a ligand. The conjugate includes a drug.
Abstract: A sectioned bit line of an SRAM memory device, an SRAM memory device having a sectioned bit line, and associated systems and methods are described. In one illustrative implementation, the sectioned bit line may comprise a local bit line, a memory cell connected to the local bit line, and a pass gate coupled to the local bit line, wherein the pass gate is configured to be coupled to a global bit line. In other implementations, an SRAM memory device may be configured involving sectioned bit lines and a global bit line wherein the pass gates are configured to connect and isolate the sectioned bit line and the global bit line.
Type:
Grant
Filed:
December 9, 2011
Date of Patent:
November 26, 2013
Assignee:
GSI Technology, Inc.
Inventors:
LeeLean Shu, Chenming W. Tung, Hsin You S. Lee
Abstract: Techniques are provided for mitigating the effects of slow or no drain devices on a fabric. One or more of the described embodiments can be used alone or in combination to address problems associated with inter-switch link blocking and to address the situation where flows which are not associated with slow/no drain devices suffer the negative impacts of slow or no drain devices on a fabric.
Abstract: A motor drive is provided that includes a control circuit or board and a one or more functional circuits or option boards coupled to the control board, and a profile that includes a configuration for the option board. A method of operating a motor drive that includes loading a profile for a option board coupled to a control board of the controller, wherein the profile comprises a configuration for the option board. A tangible machine-readable medium implementing the method is also provided.
Type:
Grant
Filed:
August 2, 2012
Date of Patent:
November 26, 2013
Assignee:
Rockwell Automation Technologies, Inc.
Inventors:
Alan J. Campbell, John Howard Stuedemann, Gary A. Kabitzke, Ronald Rudy Hrlevich
Abstract: The embodiments described herein provide a method and controller for performing a sequence of commands. In one embodiment, a controller receives a command from a host to perform a memory operation in a flash memory device, wherein the command comprises at least one bit that indicates whether the command is a stand-alone command or is part of a sequence of commands. The controller analyzes the at least one bit to determine whether the at least one bit indicates that the command is a stand-alone command or is part of a sequence of commands. If the at least one bit indicates that the command is a stand-alone command, the controller performs the command. If the at least one bit indicates that the command is part of a sequence of commands, the controller performs the command as part of the sequence of commands.
Type:
Grant
Filed:
December 30, 2009
Date of Patent:
November 26, 2013
Assignee:
SanDisk Technologies Inc.
Inventors:
Robert D. Selinger, Gary Lin, Chaoyang Wang
Abstract: Methods and systems for providing interconnection between network operation environments are disclosed in some embodiments. This can include providing interoperability between 3GPP and 3GPP2 standards environments. In one embodiment, a method is disclosed that includes receiving a request from a mobile device for service at a gateway, determining a mode of operation for the mobile device by inspecting an incoming message, wherein the mode of operation includes 3GPP and 3GPP2, establishing a connection using a proxy mobile internet protocol (PMIP), where the type of connection established is dependent on the mode of operation, providing an IP address to a mobile device based on the mode of operation and the parameters associated with the mode of operation, and communicating with an authentication, authorization, and accounting (AAA) server operating in accordance with the mode of operation.
Type:
Grant
Filed:
November 23, 2010
Date of Patent:
November 26, 2013
Assignee:
Cisco Technology, Inc.
Inventors:
Kuntal Chowdhury, Robert Marks, Rajesh Velandy, Andrew Gibbs
Abstract: Methods and apparatus for resource resolution in computing environments using directed graphs are disclosed. A system includes a resource resolver and data sources that comprise records on resource classes of a provider network. The resolver receives a request to identify a set of resources of the provider network based on specified criteria. The resolver utilizes a directed graph representation of the data sources to identify query sequences to be directed to the data sources in response to the request. Each node of the graph represents a data source, and each edge represents a logical relationship between the data sources represented by the nodes connected by the edge. Each edge has a weight based on a performance metric obtained from a data source whose node is connected by the edge. The resolver issues queries of a preferred query sequence, identified using edge weights, to respective data sources.
Abstract: A light emitting assembly includes an extruded heat sink (20) divided into a pair of elongated sections (64) with a plurality of light emitting diodes (88) disposed thereon. The elongated sections (64) present identical cross sections and are disposed in spaced and parallel relationship to mirror one another and define a fin space (68) therebetween. A plurality of fins (70) including bends (72) stamped therein are spring compressed between the elongated sections (64). The fins (70) include shoes (76) at fin ends to space the fins (70) from one another in the fin space (68). The fins (70) are retained in a fin channel (38) between a pair of ridges (28). A plurality of straps (82) extend across the fin space (68) to clamp the fins (70) between the elongated sections (64).
Abstract: Apparatus and methods are disclosed, such as those involving a flash memory device. One such apparatus includes a memory block including a plurality of memory cells; and a data randomizer configured to randomly or pseudo-randomly change original data to be stored in the memory block to changed data. The original data is changed such that a pattern of data as stored in the memory block is different than what it would have been if the original data had been stored in the memory block during a write operation. This configuration can reduce or eliminate data pattern-dependent errors in data digits stored in memory cells.
Abstract: A mask having features formed by self-organizing material, such as diblock copolymers, is formed on a partially fabricated integrated circuit. A copolymer template, or seed layer, is formed on the surface of the partially fabricated integrated circuit. To form the seed layer, diblock copolymers, composed of two immiscible blocks, are deposited in the space between copolymer alignment guides. The copolymers self-organize, with the guides guiding the self-organization and with each block aggregating with other blocks of the same type, thereby forming the seed layer. Supplemental diblock copolymers are deposited over the seed layer. The copolymers in the seed layer guide self-organization of the supplemental copolymers, thereby vertically extending the pattern formed by the copolymers in the seed layer. Block species are subsequently selectively removed to form a pattern of voids defined by the remaining block species, which form a mask that can be used to pattern an underlying substrate.
Abstract: A pre-packaged electrophoresis cassette (1), the cassette (1) comprising a gel layer (2) and a buffer solution layer (3), the gel layer comprising a first polymer made from a monomer and a cross-linker, and being in contact with the buffer solution layer to form a gel-buffer interface (4) for receiving a sample which is to undergo electrophoresis. The gel and/or the buffer solution are such that absorption of water by the gel layer from the buffer solution layer is inhibited, thereby maintaining the performance capabilities of the electrophoresis cassette during storage.
Abstract: An organization process execution portion 64 is provided in a file management system 1 that has a function to manage files and search folders and a function to search files. When a search condition has been newly designated by a user, if the designated search condition does not match the search condition of any existing search folder, the organization process execution portion 64 generates a new search folder in which the designated search condition is indicated. If the designated search condition matches the search condition of an existing search folder, a new search folder is not generated.
Type:
Grant
Filed:
February 4, 2009
Date of Patent:
November 26, 2013
Assignee:
Konica Minolta Business Technologies, Inc.
Abstract: The present invention relates to systems and methods for detecting deviations from an orthodontic treatment plan. One method includes receiving a tracking model, performing a matching step between individual teeth in a plan model and the tracking model, comparing the tracking model with the plan model, and detecting one or more positional differences.
Abstract: Display enhancement improves performance of constrained display devices such as electrophoretic displays (EPDs). With display enhancement, a display controller rapidly writes area updates to the display, while a union of the area updates is maintained. Area updates which the display controller cannot present are discarded, while the union provides a representation of what area on the screen has been affected. A repair operation takes place which generates an area update encompassing the areas which may have been affected.
Type:
Grant
Filed:
March 24, 2010
Date of Patent:
November 26, 2013
Assignee:
Amazon Technologies, Inc.
Inventors:
Jay Michael Puckett, Jyotindra K. Vasudeo
Abstract: A method for optically controlling an atomic force microscope (AFM) includes acquiring an optical image of a sample using an optical imaging device, identifying a feature of interest on the sample using the optical image, acquiring a high resolution AFM image of the sample using an AFM imaging device, the AFM imaging device comprising a cantilever having a tip, overlaying the AFM image with the optical image at the feature of interest, and positioning the probe tip over the feature of interest using the optical image.
Type:
Grant
Filed:
September 30, 2011
Date of Patent:
November 26, 2013
Assignee:
Agilent Technologies, Inc.
Inventors:
Christian Rankl, Asger Iversen, Tianwei Jing
Abstract: A method for forming an opening within a semiconductor material comprises forming a neck portion, a rounded portion below the neck portion and, in some embodiments, a protruding portion below the rounded portion. This opening may be filled with a conductor, a dielectric, or both. Embodiments to form a transistor gate, shallow trench isolation, and an isolation material separating a transistor source and drain are disclosed. Device structures formed by the method are also described.
Abstract: Microelectronic devices with improved heat dissipation, methods of making microelectronic devices, and methods of cooling microelectronic devices are disclosed herein. In one embodiment, the microelectronic device includes a microelectronic substrate having a first surface, a second surface facing opposite from the first surface, and a plurality of active devices at least proximate to the first surface. The second surface has a plurality of heat transfer surface features that increase the surface area of the second surface. In another embodiment, an enclosure having a heat sink and a single or multi-phase thermal conductor can be positioned adjacent to the second surface to transfer heat from the active devices.
Type:
Grant
Filed:
September 12, 2012
Date of Patent:
November 26, 2013
Assignee:
Micron Technology, Inc.
Inventors:
Joseph T. Lindgren, Warren M. Farnworth, William M. Hiatt, Nishant Sinha
Abstract: A magnetic head includes a coil, a main pole, a write shield, first and second yoke layers, and first and second coupling parts. The first yoke layer is located on the trailing side relative to the main pole whereas the second yoke layer is located on the leading side relative to the main pole. The first coupling part couples the main pole and the first yoke layer to each other. The second coupling part couples the first yoke layer and the second yoke layer to each other. The first coupling part includes a plurality of first magnetic path portions, and the second coupling part includes a plurality of second magnetic path portions. The coil includes one winding portion extending to pass around the first and second magnetic path portions alternately in a zigzag manner.
Abstract: A method is disclosed for calculating a distance to objects or a nearest object to a wireless enabled device. The method includes the steps of broadcasting a signal by the wireless enabled device to data tags, receiving by the data tags the signal by the wireless enabled device, and obtaining by each of the data tags a signal strength indicator of the wireless enabled device based on the signal from the wireless enabled device. Each of the data tags in a range transmits a signal to the wireless enabled device including the signal strength indicator of the wireless enabled device. Each signal strength indicator of the wireless enabled device is communicated to a positioning and communication system.
Type:
Grant
Filed:
December 4, 2011
Date of Patent:
November 26, 2013
Assignee:
IVIU Technologies, Inc.
Inventors:
Rick Sturdivant, Joaquin Felipe Brown, David E. Brown, Chris Turner, Aaron Dewitt
Abstract: Systems, methods of operating a memory device, and methods of arbitrating access to a memory array in a memory device having an internal processor are provided. In one or more embodiments, conflicts in accessing the memory array are reduced by interfacing an external processor, such as a memory controller, with the internal processor, which could be an embedded ALU, through a control interface. The external processor can control access to the memory array, and the internal processor can send signals to the external processor to request access to the memory array. The signals may also request a particular bank in the memory array. In different embodiments, the external processor and the internal processor communicate via the control interface or a standard memory interface to grant access to the memory array, or to a particular bank in the memory array, for example.