Abstract: A computer level 1 cache memory design with cache windowing divides a large level 1 cache into smaller sizes called windows, allowing the cache to provide more data faster to the CPU. Cache windowing provides the fast access times of a small level 1 cache through fewer, shorter paths and less circuitry than a large cache with multiple associative cache sets. Cache windowing allows context switching to occur with a simple change in cache window designation, eliminating the wait for cache reloading. Simulations of real cache implementations show an average of approximately 30% improvement in CPU throughput with cache windowing, scaling with CPU speed increases. The resulting system 1) maintains or improves CPU utilization rates as CPU speeds increase, 2) provides large level 1 caches while maintaining cache access times of one CPU clock cycle, and 3) provides high CPU utilization rates for those processing applications where locality of memory references is poor (e.g., networking applications).