Abstract: A method for matching hardcopy colors to display colors for registered-dot ink-jet copiers. Video RGB (red-green-blue) is converted into chromaticity coordinates in XYZ color space. An explicit solution is achieved by defining a new MSW color space which restricts the hardcopy colors to some percentage of one of the binary mixtures (M) of inks, some percentage of one of the single (S) inks, and some percentage of paper white (W). The color data in XYZ space is converted to MSW space and unreachable display colors are mapped into reachable hardcopy colors. Correction for hardcopy non-linearities is accomplished by using coverage ratios to correct for color shifts due to interaction among the inks. The MSW values are then converted to CMY (cyan-magenta-yellow) values which are processed in accordance with an appropriate dithering algorithm for conversion into dots for printing on paper.

Abstract: A display system (10) receives from a light source (12) a sequence of images, each representing a different depth plane of a subject, and selectively reflects each image from its corresonding one of plural light direction modulators (16 and 18) to synthesize a three-dimensional image of the subject. Each modulator is positioned along an axis (20) at a location that corresponds to a different depth plane. Each modulator reflects the first image incident to it and transmits the succeeding images in the sequence. In a display system having N+1 depth plane images, each of N modulators comprises a variable optical retarder (34) and a liquid crystal chiral cell (36). The N modulators reflect left-circularly polarize light and transmit right-circularly polarized light. An N+1 modulator preferably comprises a liquid crystal chiral cell and reflects light incident to it. An alternative embodiment (50) develops full color images.

Abstract: A high-speed power amplifier for driving inductive loads is capable of operating at frequencies of at least 270 kHz. The drive amplifier includes an oscillator that develops a continuous square-wave signal having relatively short transition times and a regulated 50% duty cycle. The oscillator output signal is applied to a filar-wound impedance transformer whose response time characteristics do not change substantially the transition time characteristics of the oscillator output signal. The impedance transformer circuit includes a pair of transistors operating in a push-pull configuration simultaneously to maintain the relatively short transition times of the oscillator output signal and to develop the high-current transformer output signal needed to drive a power transistor switch. The power amplifier is designed to provide a base current signal that promotes better dissipation of the power generated in the power transistor as it operates at high switching speeds.

Abstract: A switch device comprises a support member having at least first and second stationary contacts thereon. An armature is mounted on the support member by means of a body of elastomeric material that is attached to both the support member and the armature. Deformation of the body of elastomeric material allows the armature to pivot relative to the support member between a first position in which electrically-conductive material of the armature establishes electrically conductive connection between the stationary contacts and a second position in which the armature is spaced from at least one of the contacts. At least one permanent magnet is carried by the armature. An electrically-driven switch actuator is mounted stationarily relative to the support member and has first and second energization states.

Abstract: A counting circuit includes a digital counter for counting the pulses of an input signal during a counting interval and a pair of digital latches for latching the binary state of the input signal at the beginning and end of the counting interval, respectively. The latched binary states of the input signal and the pulse count of the digital counter are evaluated by an interpreter such as logic circuitry or a microprocessor. The interpreter resolves the pulse count into half clock cycles by comparing the binary states and in response adjusts the pulse count by the addition or subtraction of half a clock cycle.

Abstract: A broadband, monolithic integrated-circuit power divider/combiner circuit utilizing gallium arsenide field-effect transistors configured as distributed amplifiers. Two distributed amplifiers include a common merged transmission line element which divides/combines the input signal(s).

Abstract: A voltage-controlled current source produces two output current signals whose difference is linearly related to an input voltage signal. The source includes an input buffer and a reference buffer each coupled separately to a current mirror and also coupled together across a current transmitting resistor. In response to the input voltage signal and current transmitted between the buffers, the current mirrors produce currents that differ in proportion to the difference between the input and reference voltage signals. The current mirrors also reproduce the differing currents in output paths as the output current signals. A fixed current source is coupled to each output path for drawing a fixed current from each path to linearize the current difference.

Abstract: A system for correcting display distortion caused by CRT beam current changes in an oscilloscope system is disclosed. A Z-axis signal proportional to the CRT beam current is multiplied by two factors adjustable for either or both of X and Y axes and then added to the respective axis deflection signal which controls CRT beam deflection, thereby providing improved display quality.

Abstract: A very high resolution cathode-ray tube is provided with a combination cylindrical high voltage electrode and particle trap disk that is supported by a multiplicity of spring fingers from the interior wall of the cathode-ray tube neck. One set of the spring fingers contacts the high voltage coating on the interior of the cathode-ray tube envelope. The particle trap portion is provided with an aperture smaller than the adjacent circumferential edge of the lower voltage electron lens electrode in the adjacent electron gun structure, while the higher voltage electron portion is larger in diameter than the lower voltage electrode of the electron gun structure and overlaps the lower voltage electrode. A ring getter device is supported from the higher voltage electrode.

Abstract: A vacuum media capturing and retention system for a drum type printer or recorder is disclosed. The apparatus includes a vacuum drum with two regions of vacuum passages, one for capturing the leading edge of the media and the second for retaining the trailing edge of the media. When the leading edge of the media is initially captured the vacuum level in the drum is at one level. After the leading edge of the media is captured the vacuum level is dropped to a lower level until the trailing edge of the media is captured. Following the capture of the media trailing edge, the vacuum level within the drum is again increased to retain the media thereto during the copying or recording operation of the overall device.

Abstract: A serial DAC comprises two shift registers having their data input terminals connected together for receiving serial binary data. The shift registers are clocked alternately, whereby each shift register is clocked at substantially half the rate at which data is applied to the data input terminals of the shift registers. Two current switches are associated with the shift registers respectively, each switch being operative to steer input current to one of two output terminals if the data output of the associated shift register is a digital 1 and to steer input current to the other output terminal if the data output is a digital 0. Two current sources supply equal, constant currents to input terminals of the two current switches respectively.

Abstract: Graphics commands for a display are listed and divided into sublists corresponding to separate strips or bands of the display, and these sublists drive the display memory consecutively and substantially concurrently with the processing of additional sublists. Graphics commands relating to graphics extending between bands are transferred to successive sublists during processing to provide their display in successive bands. A pair of band size bit map memories are alternately loaded with band information and read out.

Abstract: A variable size and position dialog area or alphanumeric area is provided for the screen of a computer terminal in response to a single line of data from a data bus, containing the numerical indication of the initial line of a plurality of lines of alphanumeric information to be displayed and the numerical indication of the last line of a plurality of lines of alphanumeric information to be displayed. The numerical indications are successively loaded to a state machine operating as a counter which disables the alphanumeric display during a first counting operation and enables the alphanumeric display for the duration of a second counting operation.

Abstract: A high frequency sample and hold circuit has a sampling diode bridge for coupling an input test signal to be sampled to a holding capacitor when all of the diodes of the bridge are forward biased by an applied strobe signal, thereby charging the capacitor to the input voltage. The diode bridge substantially uncouples the input signal from the holding capacitor when the strobe current direction is reversed such that the holding capacitor retains the charge stored thereon and therefore remains charged to the current sample signal voltage at the instant the strobe current reverses direction. Any holding capacitor charging current generated by the sampling bridge as it returns to equilibrium after strobe current reversal is offset by a holding capacitor charging current of substantially equal magnitude and opposite phase generated by a compensating bridge.

Abstract: A memory gate for an error sampler comprises a memory capacitor having one terminal connected to a reference potential level. A current steering network has an input terminal at which it receives signal current and also has an output terminal connected to the other terminal of the memory capacitor. The current steering network either directs current received at its input terminal to its output terminal or diverts the current from the output terminal, depending on the relationship between the potential at a control terminal of the current steering network and the potential at the output terminal of the current steering network. The potential at the control terminal is biased to follow the potential at the output terminal of the current steering network, and therefore the amount by which the potential at the control terminal must be changed in order to change the state of the current steering network is independent of the voltage on the memory capacitor.

Abstract: A unitary electronic circuit element has an interconnect surface at which it is provided with contact pads and is mounted on a circuit board using a flexible, sheet-form interconnect member that comprises dielectric material and runs of electrically conductive material. Each conductor run extends between a contact pad that is exposed at a first main face of the interconnect member and a termination point that is exposed at a second main face of the interconnect member. The interconnect surface of the electronic circuit element and the second main face of the interconnect member are placed in mutually confronting relationship, and the circuit element is attached to the second main face of the interconnect member by way of its interconnect surface, whereby electrically conductive contact is established between the contact pads of the circuit element and the corresponding termination points of the interconnect member.

Abstract: An integrated circuit chip is mounted to an etched circuit board using a flexible, sheet-form interconnect member that comprises dielectric material and runs of electrically conductive material each run extending between a contact pad that is exposed at a first main face of the interconnect member and a termination point that is exposed at a second main face of the interconnect member. The interconnect face of the chip and the second main face of the interconnect member are placed in mutually confronting relationship, and the chip is attached to the second main face of the interconnect member by way of its interconnect face, whereby electrically conductive contact is established between the contact pads of the chip and corresponding termination points of the interconnect member. The chip is attached by way of its back face to a thermally conductive plate that has, at one main face, pressure pads that at least partially surround a chip receiving area of the plate.

Abstract: A microwave interconnect for integrated or hybrid circuits includes a flexible sheet bearing a flexible conductor which is divided into a plurality of insulated conductive lines, at least some of which make contact with the integrated or hybrid circuit, as well as with a second circuit to which the first is thereby connected. The flexible sheet is backed by a body of elastomeric material and a compression bar which assures good electrical contact of the flexible conductor with the circuits when the compression bar is tightened down on the circuits. The construction allows some degree of misregistration of parts while providing circuit coupling operative at high frequencies.

Abstract: A phase detector uses the junction of a coplanar waveguide and a slot line. The coplanar waveguide serves as an input terminal and is contiguous to the slot line which is shorted. A strobe pulse is applied to the shorted slot line via a snap-off diode, and an input signal is passed via sampling diodes and capacitors to a common mode output.

Abstract: A sequence of digital data values is processed by deriving the average W.sub.n of two of the data values X.sub.n-1 and X.sub.n+1. If W.sub.n lies within the quantization step q centered on the data value X.sub.n, W.sub.n is adopted as a modified value of X.sub.n, but if W.sub.n lies outside the quantization step the modified value of X.sub.n is taken to be X.sub.n +q/2 or X.sub.n -q/2, depending on whether W.sub.n is greater or less than X.sub.n.