Abstract: A test and measurement instrument includes a pattern detector for detecting a beginning sequence in a signal under test (SUT), and generates a synchronization signal. In response to the synchronization signal, a memory outputs a reference test pattern. A symbol comparator compares the reference test pattern with the SUT. The symbol comparator can produce a symbol error rate. One or more 8b to 10b converters receives the SUT from the input and the digitized data from the memory, and converts the data from an 8b coded format to a 10b coded format. A bit comparator compares the 10b coded reference test pattern with the 10b coded SUT in response to the symbol comparator. The bit comparator is coupled to a bit error counter, which produces a bit error rate independent of any disparity errors that may be present in the incoming digitized data received by the test and measurement instrument.

Abstract: A test and measurement instrument includes a display having a time domain graticule and a frequency domain graticule. A processor is configured to process an input signal to generate a time domain waveform for display in the time domain graticule, the input signal being correlated to a time base. The processor is also configured to process a second input signal and generate a frequency domain waveform for display in the frequency domain graticule, the second input signal being correlated to the same time base. The frequency domain waveform is correlated to a selected time period of the time base. The processor is also configured to generate a spectrum time indicator configured to graphically illustrate a transform parameter, a location and the selected time period in the time domain graticule with respect to the frequency domain waveform.

Abstract: A test and measurement instrument includes a display having a time domain graticule and a frequency domain graticule. A processor is configured to sample an input signal to generate a time domain waveform for display in the time domain graticule. The processor is also configured to generate a frequency domain waveform for display in the frequency domain graticule, the frequency domain waveform being correlated to a selected time period of the time domain graticule. The processor is also configured to generate a spectrum time indicator configured to graphically illustrate a location and the selected time period of the time domain graticule with respect to the frequency domain waveform.

Abstract: Constellation display allows a user to evaluate the quality of a signal under test with the constellation display even if the signal is a digital modulation signal that has many possible ideal phases. A signal analyzer 10 acquires time domain data of the signal under test that has N ideal phases. The signal analyzer 10 demodulates the signal under test to measure the phases ?m and amplitudes Am of the symbols of the signal. Phase differences d? between the ideal and measured phases of the measured symbols are calculated. K group phases ?gi are assigned to N of the ideal phases. The signal analyzer displays a constellation using phases ?gi+d? and the measured amplitudes Am. That is, points are plotted at locations of X=Am*cos(?gi+d?)+jAm*sin(?gi+d?) on a complex plane.

Abstract: A signal analyzer provides frequency domain data at different time and frequency resolution. First type frequency domain data is derived from time domain data of a signal under test by first type frames and displayed as a spectrogram. A selecting box is displayed on the spectrogram for selecting the first type frames. The signal analyzer produces second type frequency domain data by treating the time domain data corresponding to the first type frequency domain data included in the selected first type frames with the selecting box as one frame by FFT calculation. The resultant second type frequency domain data are displayed as a spectrum that has different time and frequency resolution from the spectrogram.

Abstract: A two stage adaptive filter for use in a batch receiver includes an equalizer filter having as inputs an acquired signal representing a batch of data points and an equalizer filter value. The filtered signal is batch processed to produce reference and data symbols, which symbols are input to a residual filter to generate iteratively over the batch an error value. The error value is convolved with the equalizer filter value to produce a new equalizer filter value for use by the equalizer filter when a next batch of data points is processed.

Abstract: A receiver 31 receives a wireless signal of, for example, an RFID system that conducts communication with a wireless signal based on reflection modulation. A demodulation block 33 demodulates the received signal obtained at the receiver 31 with orthogonal demodulation. A display block 36 provides signal points derived from the orthogonal demodulation onto an orthogonal coordinate display to display characteristics of the reflection modulation concerning an RF tag that conducts the reflection modulation of the wireless signal. The display of the signal points may have vector display or at least numerical values indicating magnitudes of the vectors. The processed results may be stored and signal points based on the stored results may be displayed on the orthogonal coordinate to compare sets of the characteristics of the reflection modulations on the display.

Abstract: A first frequency analysis range and a second frequency analysis range narrower than the first one are set with an operation panel 34, etc. A first signal path 171 produces first time domain data of a frequency converted signal under test by a first data production rate depending on the first frequency analysis range. A second signal path 172 produces second time domain data of frequency converted signal under test by a second data production rate depending on the second frequency analysis range and slower than the first data production rate. A CPU receives the first and second time domain data in parallel and produces first and second frequency domain data by FFT wherein frequency shift amounts in the frequency conversions in the first and second signal paths are different depending on the difference between the center frequencies of the first and second frequency analysis ranges.

Abstract: A waveform display apparatus and method displays one or more waveforms of a signal under test at high throughput while acquiring digital data of the signal under test in a large acquisition memory. A user sets a time interval of user's interest when viewing a signal under test and sets trigger criteria through a user interface. An ADC converts the signal under test into digital data that is stored in a large acquisition memory. A trigger unit detects and produces trigger events, based on a trigger, as trigger event information during one acquisition process. A trigger event eliminator may discard some of the trigger events based on pre-trigger and post-conditions set through the interface by a user. The trigger events are recorded in a trigger list as the trigger event information. A control unit locates the digital data in the acquisition memory corresponding to the trigger events in the trigger list and displays a waveform associated with the trigger event for the time interval on a display device.

Abstract: A processor performs line-rate filtering using hardware-assisted Patricia trees. A PCAP-style filter is converted into a form that can be inserted into a Patricia tree. The PCAP filter expression is parsed and converted into disjunctive normal form (DNF). Each DNF clause of the filter is inserted into a Patricia tree. The DNF clauses are checked for overlaps and the overlapping clauses are combined when possible.

Abstract: An equalization simulator with training sequence detection uses an oscilloscope to acquire digital samples of an analog waveform signal from a serial data link to produce a digitized waveform record. The equalization simulator has training sequence detection receiving the digitized waveform record and generates a training sequence, an equalization adapter receiving the digitized waveform record and the training sequence and generating equalizer taps, and an equalizer receiving the equalizer taps and the digitized waveform record and generating an equalized digitized waveform record.

Abstract: Embodiments of the invention include an electronic load having variable reactive load capability and techniques for controlling and/or modeling a reactive component in a load. The electronic load can include a user interface through which a latency value is received from a user. A delay is created based on the latency value between the time that a variable of the input signal is sensed and the time that a variable of the input signal is driven to a new value, thereby simulating a reactive component in the electronic load based on the created delay. In one example embodiment, the driven variable can be stepped after the created delay to produce an approximation of a capacitive or inductive element. In another example embodiment, the driven variable can be slewed during the delay period using an arbitrary waveform generator, thereby more accurately simulating the reactive component.

Abstract: A planar body is configured such that its edges engage the sidewall of a via of a device under test to create point electrical contacts and the planar body resists removal of the planar body from the via after insertion. The edges of the planar body may include barbs that create point electrical contacts and resist removal of the planar body from the via after insertion. The end of the body that is inserted into the via may form a tapered tip to facilitate insertion. The end of the planar body that is inserted into the via may include barbs that resist removal of the planar body from the via after insertion. The edges of the planar body may include stops that prevent further insertion of the planar body into the via beyond the stops.

Abstract: A time synchronized measurement system has a master device and a slave device. The master device and the slave device each have a time measurement device for assigning a corresponding time of sending and/or receiving a piece of measurement information. The master device also has a reference clock pulse-generating device for transmitting a reference clock signal to the slave device. The reference clock signal is modulated by a piece of information on a common time basis for the master device and the slave device.

Abstract: A system and method for automatically detecting Anti-Steering of Roaming activity is disclosed. This method can be used by a monitoring system on a home network that continuously monitors all international MAP signaling with a visited network. Anti-Steering of Roaming is detected by estimating a number of roaming subscribers of different types, including a number of unique active roamers, a number of unique steered roamers, and a number of unique anti-steered roamers. The numbers of subscribers of the different types, either alone or in combination, are compared to threshold values. If the numbers exceed the threshold value, then the monitoring system alerts the home network that a visited network may be using Anti-Steering of Roaming technology.

Abstract: A method for adapting a user interface on a display device of a protocol tester having a visual network plan which is used for the configuration of a telecommunication measurement task by a user includes modifying the visual network plan in comparison to a basic network plan according to hardware and/or software existing in the protocol tester.

Abstract: A balun structure is disclosed having positive and negative going signal paths coupled to a ninety degree hybrid. The positive signal path has a circuit trace and a phase shaper structure that provides three hundred and sixty degrees of phase shift at Port 1 of the hybrid. The negative going signal path has a circuit trace and a second order phase shaper that provides four hundred and fifty degrees of phase shift at Port 2 of the hybrid. Port 1 is coupled to Port 3 of the hybrid and functions as an output port. The first order phase shaper and the second order phase shaper compensate for the signal loss caused by a signal cable coupled to the output port and provide a frequency band from DC to at least 15 GHz and a transient response having less than ten percent pre-shoot.

Abstract: A flexible timebase for eye diagrams uses a stable free running oscillator as a sample clock for equivalent time sampling of an input serial digital signal and of a reference signal, derived from a subdivided recovered clock of the input serial digital signal. The reference signal samples are provided to a digital phase-locked loop that provides the flexible timebase to an eye pattern generator. The eye pattern generator accumulates the input serial digital signal samples at times corresponding to the reference signal samples to produce the eye diagram. A linear phase detector in the digital phase locked loop converts the reference signal samples to a complex signal using a Hilbert transform and then to a linear ramp of phase values using a CORDIC algorithm with arctangent lookup table. A subtractor then subtracts the digital phase-locked loop feedback from the linear ramp to provide the input to the loop filter.

Abstract: Embodiments of the invention include systems and methods for predicting video quality through human vision perceptual color response and associated perceptual differences of video relative to a reference. Embodiments include a model of the human vision system developed as an extension to CIECAM02 to predict the macro-behavioral response to light stimuli with the following varying parameters, in addition to the parameters relevant to CIECAM02: spatial frequency, temporal frequency, angular extent, temporal extent, and surround.

Abstract: A digital-to-analog converter includes first and second pulse modulators to generate first and second pulse modulated signals in response to first and second digital values, a third pulse modulator to generate a third pulse modulated signal in response to a third digital value, and a switch/filter circuit to generate an analog signal by combining the first and second pulse modulated signals in response to the third pulse modulated signal. The first and second pulse modulated signals may be low-pass filtered before being combined. In some embodiments, the third digital value may be incremented in a single direction between transitions of the first and second digital values. In some other embodiments, the third digital value may be incremented in opposite directions between alternating transitions of the first and second digital values.