Abstract: The subject invention addresses the problem of aliasing in subsampled data by adding dither to the timing of the subsampling of the data. The subject invention solves a speed problem caused by delays in modifying (i.e., dithering) the A/D converter sampling clock. It is herein recognized that to maintain a high acquisition rate one should randomly select (i.e., dither) samples after demultiplexing the data into a wider and slower stream of samples, rather than attempting to modify the high speed A/D converter sampling clock.

Abstract: A direction finder using spread spectrum techniques has an array of antennas in a predetermined configuration for receiving a signal from a modulated, or interfering, signal source. The individual outputs from each antenna are input to respective direct sequence spread spectrum modulators where each is multiplied by a unique pseudo-random number (PRN) code, unique either in value or in time relationship. The spread spectrum outputs are summed and the summed output is demodulated and digitized to produce a digitized intermediate frequency (IF) signal. The digitized IF signal is processed by a digital signal processing (DSP) engine to determine relative phase or time of arrival of the signal from the modulated signal source at each antenna relative to one of the antennas used as a reference. The relative phases or times of arrival and the predetermined configuration of the antenna array are then used to estimate the direction to the modulated signal source with a high degree of accuracy.

Abstract: Reference frequency spur cancellation in a synthesized measurement receiver is achieved by determining for any given frequency to which the receiver is tuned a list of integer multipliers of the reference frequency that produce spurious signals in the receiver's passband. For those values the amplitude and phase for each spurious signal is determined in the digital domain and subtracted from the digital signal from the receiver. The reference frequency is then offset slightly and the measurement repeated. The maximum values between each measurement are combined to produce a measurement for the input signal without spurious signals.

Abstract: A probe or accessory incorporating the features of the subject invention includes a communications arrangement for communicating topology-related data to a host instrument connected to the probe or accessory. The topology-related data describes the probe or accessory as a network comprising multiple paths from the probe tip to host instrument input connector. Each path is associated with a feature of the probe or accessory, and only one path may be active at any given time. Each feature is described by a unique number, called a “tag”. New tags may be assigned when necessary so long as existing tags are not disturbed. A probe or accessory in accordance with the subject invention transmits a list of “Required Tags” to the host instrument. Each required tag is associated with a pathway within the probe or accessory. The host instrument may only exercise those paths for which all required tags are understood, or those for which no required tag is designated.

Abstract: A signal acquisition instrument acquires a succession of waveform records and sequentially transfers the waveform records to a rasterizer for rasterizing the waveform records to generate respective rasterized records each composed of a set of vectors, but inhibits transfer of a current waveform record to the rasterizer until a previous waveform record has been rasterized. The maximum number of dots (M) in each vector is made as large as possible provided that the rasterizer does not complete rasterization of the previous waveform record after acquisition of the current waveform record is complete.

Abstract: A keyed electronic interconnect assembly has a high speed coaxial interconnect for a coaxial transmission line having a central signal conductor and a surrounding shield conductor. The coaxial interconnect has a male side and a female side, with the female side including a shield sleeve having a chamber that receives a male shield contact on the male side. The shield sleeve has a contact with a compliant portion that flexibly grips the male shield contact. A mechanical alignment facility includes a closely mating pocket and body, each attached to a respective male or female side of the interconnect. A keying arrangement having protrusion elements and aperture elements are included in the pocket and body to provide selective mating of the pocket and body. Additional data connectors may be included with the pocket and body.

Abstract: A phase stable clock circuit includes a phase gate having track-and-hold (T/H) circuits with each T/H circuit receiving a phase shifted continuous sinusoidal signal of predetermined phase and a control input signal to hold, at a selected time during the signal epoch of the respective sinusoidal signals, phase values of the sinusoidal signals. The respective phase values are coupled to an infinite track-and-hold circuit to generate replicas of the phase values. The phase values and the replica phase values are coupled to respective multiplexers that selectively couple the phase values to multipliers during a first time period and replica phase values during a second time period. The output of each multiplexer is coupled to a multiplier that receives one of the phase shifted continuous sinusoidal signals. The output of the multipliers are summed in a summing circuit to generate an output signal with a predetermined stable startup phase relative to the transition.

Abstract: A method for splicing video in MPEG-2 transport stream based on locally available data identifies a splice point in a first video stream at an anchor frame and a splice point in a second video stream subsequent in time at an anchor frame, the time difference between the splice points forming a time span. Inserting into the time span a drain frame sequence for nearly emptying the buffers in a decoder. The drain frame sequence may be a black I-frame followed by as many freeze B-frames as necessary that reference the black I-frame, or may be as many freeze B-frames as necessary that reference the last anchor frame prior to the splice point in the first video stream.

Abstract: A system for displaying waveforms representing an input signal includes a display subsystem, coupled to a source of the input signal, for displaying a waveform representing the input signal in response to a display control signal. A trigger circuit is coupled to the input signal source and detects a trigger event. A time displacement circuit is coupled to the trigger circuit and generates a time displaced trigger signal a controllable amount of time after detection of the trigger event. A switch is coupled between the trigger circuit, the time displacement circuit, and the display subsystem. The switch selectively generates a display control signal in response to either the detected trigger event or a time displaced trigger signal.

Abstract: A stackable, recessed, locking, insulated thumbscrew for connecting modules together in a stack such that removal of one module from the stack does not loosen other modules in the stack has an insulated knurled cap that fits over the end of a main screw body. The main screw body has an interior threaded end and an exterior threaded end, with the knurled cap slidable over the interior threaded end by means of a bayonet pin on the main screw body and corresponding bayonet slot in the knurled cap. A cap spring is captured between a retainer flange integral with or retainer ring mounted on the interior threaded end adjacent the exterior threaded end and the knurled cap to apply pressure to the knurled cap. In a raised position the knurled cap may be readily grasped for manual screwing and unscrewing of the thumbscrew to add or remove a module from the stack.

Abstract: An apparatus and method for performing an auto-ranging function in electronics test equipment monitors both the RMS value and the peak value of the input signal to be measured. In the subject system, a peak signal measurement which exceeds the dynamic range of the currently-selected range will cause selection of the next higher range. A peak signal measurement which would exceed the dynamic range of the next lower measurement range, will prevent selection of the next lower range when the RMS value would otherwise have caused that selection. A peak signal value which does not exceed the dynamic range of the currently-selected measurement range, or the dynamic range of the next lower measurement range will allow control of measurement range selection to be determined by the RMS value of the input signal.

Abstract: An adapter for an electronic interconnect assembly has a high speed coaxial interconnect for a coaxial transmission line having a central signal conductor and a surrounding shield conductor. The coaxial interconnect has a male side and a female side, with the female side including a shield sleeve having a chamber that receives a male shield contact on the male side. The shield sleeve has a contact with a compliant portion that flexibly grips the male shield contact. A mechanical alignment facility portion selected from a pair of alignment facility portions including a closely mating pocket and body that has one of the male side or female side of the coaxial interconnect. An electrical signal connector is electrically coupled to the selected male or female of the coaxial interconnect.

Abstract: A reduced lock time phase locked loop has a speed up circuit with an operational amplifier to amplify a differential voltage across a filter resistor of an RC noise filter, the RC noise filter coupling a coarse tune voltage to a VCO. The amplifed differential voltage is applied to the bases of a pair of opposite polarity transistors, the emitters of the transistors being coupled to a filter capacitor in the RC noise filter for rapid charging/discharging. Alternatively the amplified differential voltage is applied to a pair of parallel, opposite polarity diodes coupled to the filter capacitor for rapid charging/discharging.

Abstract: An apparatus and method for the detection of repeated and frozen frames in a video signal obtains the absolute differences between pixels in corresponding fields of consecutive frames and generates a logic bit-map based on a threshold that is related to a maximum absolute difference for the field. The logic “1”s in the logic bit-map are counted to determine a normalized distribution count for the field and to determine an actual count in each of a plurality of segments of the logic bit-map. The actual counts are compared with bounds generated from the normalized distribution count and, if all the actual counts for the field are within the bounds, a repeated frame is reported. Alternatively in the absence of noise the actual counts are compared with a minimum value and, if all of the actual counts are below the minimum value, a repeated frame is reported.

Abstract: A high speed differential attenuator is formed on low temperature co-fired ceramic substrate structure having first and second parallel resistor-capacitor divider networks with each divider network having first and second parallel resistors and capacitors. The substrate has first and second dielectric layers with the top surface of the first dielectric layer having a voltage potential lead formed thereon for receiving an integrated circuit device. Each divider network further has first and second conductive elements formed on the top surface of the first dielectric layer functioning as first capacitive plates for the first and second capacitors. A third conductive element is disposed between the first and second dielectric layers and positioned beneath the first conductive element functioning as the other capacitive plate for the first capacitor.

Abstract: A crimpless strain relief termination for a coaxial cable has a crimpless mechanical termination and a strain relief bushing. The mechanical termination has a knurled bushing that is placed over the coaxial cable in a region where the outer insulating layer has been removed so that the bushing is in electrical contact with the outer shielding conductor of the cable. The outer shielding conductor is folded over the bushing such that the outer shielding conductor is in contact with knurling on the bushing. A heat shrinkable material having an inner adhesive coating is positioned over the bushing and heated to activate the adhesive and shrink the material to capture the shielding conductor between the heat shrinkable material and the bushing. The coaxial cable with the crimpless mechanical termination is inserted into a bore in a strain relief bushing that has an inwardly formed shoulder that engages the crimpless mechanical termination to provide mechanical strain relief for the coaxial cable.

Abstract: A clock recovery system includes a source of a data signal, and a free-running frequency adjustment circuit. The free-running frequency adjustment circuit includes an injection-locked oscillator having a free-running frequency and generating a clock signal and a phase locked loop, coupled in parallel with the injection locked oscillator, and generating a control signal adjusting the free running frequency of the injection locked oscillator.

Abstract: A method of estimating symbol timing phase and rate offsets of a sampled digitally modulated signal having repetitive symbol sync sequences includes the steps of estimating symbol sync sequence locations in a block of signal samples using a cross-correlation with a reference pattern of ideal symbol sync sequences. Signal samples within subranges defining the symbol sync sequences in the block of signal samples are filtered for removing intersymbol interference. An iterative process of cross-correlation of the filtered signal samples within the subranges using the reference pattern of ideal symbol sync sequences and an ideal symbol sync correction pattern generates timing phase and rate offset values that are used to derive filter coefficients for resampling the filtered signal samples within the subranges using an interpolating filter. The rate offset value is derived using a linear model and performing an optimal estimation.

Abstract: An input protection circuit for an RF circuit has an input switch that decouples a RF input signal from the circuit path when the power level of the input signal is greater than a preselected threshold. An isolation device receives the input signal from the switch and couples a first portion of the signal to a switch control loop. The switch control loop includes a level detector that generates an output proportional to the average power of the input signal. The output of the detector is coupled to a comparator that also receives a reference signal for comparison with the detector output. The comparator generates an output signal that energizes the switch when the detector output exceeds the reference signal. The switch couples the input signal directly to ground or through a load to ground. A reset command resets the input switch to re-couple the input signal into the RF circuit.

Abstract: A method of estimating pilot signal phase embedded in a wideband digital signal modulating a RF signal that is down converted to an intermediate frequency and digitized includes the steps of summing a block of the signal samples for removing the modulation data and generating data values representative of vector locations of the pilot signal with each data value representing an angular rotation of the pilot signal vector, and calculating the phase of the pilot signal by determining the arc tangent of the data values. The method produces a computationally efficient narrow band filter generated at the pilot signal frequency by simple addition of the digital data values. The method is usable in a software based 8-VSB digital television demodulation system.