Patents Assigned to Tensorcom, Inc.
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Publication number: 20230378661Abstract: An antenna array system and a method for making the antenna system. The system includes at least two antenna elements serving as transmitter elements, and at least two antenna elements serving as receiver elements. Each of the transmitter antenna and receiver antenna elements include a pair of curved arms, wherein a first arm in the pair of curved arms is configured to be connected from a signal trace of the antenna system. The second arm in the pair of curved arms is configured to be connected to a ground plane.Type: ApplicationFiled: August 4, 2023Publication date: November 23, 2023Applicant: Tensorcom, Inc.Inventor: Guang-Fu CHENG
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Patent number: 11769954Abstract: An antenna array system and a method for making the antenna system. The system includes at least two antenna elements serving as transmitter elements, and at least two antenna elements serving as receiver elements. Each of the transmitter antenna and receiver antenna elements include a pair of curved arms, wherein a first arm in the pair of curved arms is configured to be connected from a signal trace of the antenna system. The second arm in the pair of curved arms is configured to be connected to a ground plane.Type: GrantFiled: August 24, 2020Date of Patent: September 26, 2023Assignee: TENSORCOM, INC.Inventor: Guang-Fu Cheng
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Patent number: 10778250Abstract: Processors are arranged in a pipeline structure to operate on multiple layers of data, each layer comprising multiple groups of data. An input to a memory is coupled to an output of the last processor in the pipeline, and the memory's output is coupled to an input of the first processor in the pipeline. Multiplexing and de-multiplexing operations are performed in the pipeline. For each group in each layer, a stored result read from the memory is applied to the first processor in the pipeline structure. A calculated result of the stored result is output at the last processor and stored in the memory. Once processing for the last group of data in a first layer is completed, the corresponding processor is configured to process data in a next layer before the pipeline finishes processing the first layer. The stored result obtained from the next layer comprises a calculated result produced from a layer previous to the first layer.Type: GrantFiled: February 15, 2019Date of Patent: September 15, 2020Assignee: TensorCom, Inc.Inventors: Bo Xia, Ricky Lap Kei Cheung, Bo Lu
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Patent number: 10734957Abstract: A circuit comprises a Sallen-Key filter, which includes a source follower that implements a unity-gain amplifier; and a programmable-gain amplifier coupled to the Sallen-Key filter. The circuit enables programmable gain via adjustment to a current mirror copying ratio in the programmable-gain amplifier, which decouples the bandwidth of the circuit from its gain settings. The programmable-gain amplifier can comprise a differential voltage-to-current converter, a current mirror pair, and programmable output gain stages. The Sallen-Key filter and at least one branch in the programmable-gain amplifier can comprise transistors arranged in identical circuit configurations.Type: GrantFiled: March 13, 2019Date of Patent: August 4, 2020Assignee: Tensorcom, Inc.Inventors: Zaw Soe, Kevin Jing, Steve Gao
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Patent number: 10637453Abstract: A circuit comprises a first amplifier coupled to a first and a second node; a differential capacitive load coupled to the first and the second node, the differential capacitive load coupled between drains of transistors in a cross coupled transistor circuit; a current mirror coupled to a source of each transistor; and a capacitor coupled between the sources of the transistors. A plurality of amplifiers can be coupled to the differential capacitive load, wherein each amplifier comprises a clock-less pre-amplifier of a comparator. The amplifiers may be abutted to one another such that an active transistor of a first differential stage in a first amplifier behaves as a dummy transistor for an adjacent differential stage in a second amplifier.Type: GrantFiled: December 21, 2018Date of Patent: April 28, 2020Assignee: TensorCom, Inc.Inventor: Dai Dai
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Patent number: 10637517Abstract: Local oscillator (LO) leakage and Image are common and undesirable effects in typical transmitters. Typically, fairly complex hardware and algorithms are used to calibrate and reduce these impairments. A single transistor that draws essentially no dc current and occupies a very small area detects the LO leakage and Image signals. The single transistor operating as a square-law device is used to mix the signals at the input and output ports of a power amplifier. The mixed signal generated by the single transistor enables the simultaneous calibration of the LO leakage and Image Rejection.Type: GrantFiled: September 5, 2018Date of Patent: April 28, 2020Assignee: TensorCom, Inc.Inventors: KhongMeng Tham, Huainan Ma, Zaw Soe, Ricky Lap Kei Cheung
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Patent number: 10277182Abstract: A circuit comprises a Sallen-Key filter, which includes a source follower that implements a unity-gain amplifier; and a programmable-gain amplifier coupled to the Sallen-Key filter. The circuit enables programmable gain via adjustment to a current mirror copying ratio in the programmable-gain amplifier, which decouples the bandwidth of the circuit from its gain settings. The programmable-gain amplifier can comprise a differential voltage-to-current converter, a current mirror pair, and programmable output gain stages. The Sallen-Key filter and at least one branch in the programmable-gain amplifier can comprise transistors arranged in identical circuit configurations.Type: GrantFiled: December 6, 2017Date of Patent: April 30, 2019Assignee: TensorCom, Inc.Inventors: Zaw Soe, Kevin Jing, Steve Gao
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Patent number: 10250280Abstract: Processors are arranged in a pipeline structure to operate on multiple layers of data, each layer comprising multiple groups of data. An input to a memory is coupled to an output of the last processor in the pipeline, and the memory's output is coupled to an input of the first processor in the pipeline. Multiplexing and de-multiplexing operations are performed in the pipeline. For each group in each layer, a stored result read from the memory is applied to the first processor in the pipeline structure. A calculated result of the stored result is output at the last processor and stored in the memory. Once processing for the last group of data in a first layer is completed, the corresponding processor is configured to process data in a next layer before the pipeline finishes processing the first layer. The stored result obtained from the next layer comprises a calculated result produced from a layer previous to the first layer.Type: GrantFiled: January 29, 2016Date of Patent: April 2, 2019Assignee: TensorCom, Inc.Inventors: Bo Xia, Ricky Lap Kei Cheung, Bo Lu
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Publication number: 20180183391Abstract: A common-source Low Noise Amplifier (LNA) comprises a first spiral inductor coupled to a source of a first transistor, a second spiral inductor coupled to a drain of a second transistor, and a third inductor connecting the first transistor to the second transistor. The third inductor is configurable to enable a first capacitance to be coupled in parallel to form a bandpass filter. The first spiral inductor is configurable to enable a second capacitance to be coupled in parallel to form a resonant circuit. A variation of the LNA further includes a drain of a third transistor coupled to a gate of a fourth transistor with a first width, a source of the third transistor coupled to the resonant circuit, and an oscillator clock configured to operate at a first frequency that enables the third transistor, wherein the third transistor presents a first impedance to the resonant circuit, causing the resonant circuit to have a first bandwidth.Type: ApplicationFiled: January 31, 2018Publication date: June 28, 2018Applicant: Tensorcom, Inc.Inventor: Zaw Soe
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Patent number: 9960948Abstract: A receiver comprises a Low Noise Amplifier (LNA) configured to amplify an input signal and a resonant circuit coupled to the LNA. A first switch couples current from the resonant circuit to a first capacitor integrating a first voltage, wherein the first switch is enabled with a clock signal. A second switch couples current from the resonant circuit to a second capacitor integrating a second voltage, wherein the second switch is enabled with an inverse clock signal. A differential amplifier comprises a positive input for receiving the first voltage and a negative input for receiving the second voltage in order to produce a sum and a difference frequency spectrum between a signal spectrum carried within the current and a frequency of the clock signal.Type: GrantFiled: November 21, 2016Date of Patent: May 1, 2018Assignee: Tensorcom, Inc.Inventor: Zaw Soe
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Publication number: 20180097489Abstract: A circuit comprises a Sallen-Key filter, which includes a source follower that implements a unity-gain amplifier; and a programmable-gain amplifier coupled to the Sallen-Key filter. The circuit enables programmable gain via adjustment to a current mirror copying ratio in the programmable-gain amplifier, which decouples the bandwidth of the circuit from its gain settings. The programmable-gain amplifier can comprise a differential voltage-to-current converter, a current mirror pair, and programmable output gain stages. The Sallen-Key filter and at least one branch in the programmable-gain amplifier can comprise transistors arranged in identical circuit configurations.Type: ApplicationFiled: December 6, 2017Publication date: April 5, 2018Applicant: Tensorcom, Inc.,Inventors: Zaw Soe, Kevin Jing, Steve Gao
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Patent number: 9893692Abstract: A circuit comprises a Sallen-Key filter, which includes a source follower that implements a unity-gain amplifier; and a programmable-gain amplifier coupled to the Sallen-Key filter. The circuit enables programmable gain via adjustment to a current mirror copying ratio in the programmable-gain amplifier, which decouples the bandwidth of the circuit from its gain settings. The programmable-gain amplifier can comprise a differential voltage-to-current converter, a current mirror pair, and programmable output gain stages. The Sallen-Key filter and at least one branch in the programmable-gain amplifier can comprise transistors arranged in identical circuit configurations.Type: GrantFiled: November 16, 2016Date of Patent: February 13, 2018Assignee: Tensorcom, Inc.Inventors: Zaw Soe, Kevin Jing, Steve Gao
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Publication number: 20170317668Abstract: A circuit comprises a first amplifier coupled to a first and a second node; a differential capacitive load coupled to the first and the second node, the differential capacitive load coupled between drains of transistors in a cross coupled transistor circuit; a current mirror coupled to a source of each transistor; and a capacitor coupled between the sources of the transistors. A plurality of amplifiers can be coupled to the differential capacitive load, wherein each amplifier comprises a clock-less pre-amplifier of a comparator.Type: ApplicationFiled: July 18, 2017Publication date: November 2, 2017Applicant: Tensorcom, Inc.Inventor: Dai Dai
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Publication number: 20170310308Abstract: This invention eliminates the need for “capacitor coupling” or “transformer coupling,” and the associated undesirable parasitic capacitance and inductance associated with these coupling techniques when designing high frequency (˜60 GHz) circuits. At this frequency, the distance between two adjacent stages needs to be minimized. A resonant circuit in series with the power or ground leads is used to isolate a biasing signal from a high frequency signal. The introduction of this resonant circuit allows a first stage to be “directly coupled” to a next stage using a metallic trace. The “direct coupling” technique passes both the high frequency signal and the biasing voltage to the next stage. The “direct coupling” approach overcomes the large die area usage when compared to either the “AC coupling” or “transformer coupling” approach since neither capacitors nor transformers are required to transfer the high frequency signals between stages.Type: ApplicationFiled: July 11, 2017Publication date: October 26, 2017Applicant: Tensorcom, Inc.,Inventors: Zaw Soe, KhongMeng Tham
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Patent number: 9793880Abstract: This invention eliminates the need for “capacitor coupling” or “transformer coupling,” and the associated undesirable parasitic capacitance and inductance associated with these coupling techniques when designing high frequency (˜60 GHz) circuits. At this frequency, the distance between two adjacent stages needs to be minimized. A resonant circuit in series with the power or ground leads is used to isolate a biasing signal from a high frequency signal. The introduction of this resonant circuit allows a first stage to be “directly coupled” to a next stage using a metallic trace. The “direct coupling” technique passes both the high frequency signal and the biasing voltage to the next stage. The “direct coupling” approach overcomes the large die area usage when compared to either the “AC coupling” or “transformer coupling” approach since neither capacitors nor transformers are required to transfer the high frequency signals between stages.Type: GrantFiled: August 18, 2015Date of Patent: October 17, 2017Assignee: Tensorcom, Inc.Inventors: Zaw Soe, KhongMeng Tham
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Patent number: 9793885Abstract: A circuit comprises a first amplifier coupled to a first and a second node; a differential capacitive load coupled to the first and the second node, the differential capacitive load coupled between drains of transistors in a cross coupled transistor circuit; a current mirror coupled to a source of each transistor; and a capacitor coupled between the sources of the transistors. A plurality of amplifiers can be coupled to the differential capacitive load, wherein each amplifier comprises a clock-less pre-amplifier of a comparator. The amplifiers may be abutted to one another such that an active transistor of a first differential stage in a first amplifier behaves as a dummy transistor for an adjacent differential stage in a second amplifier.Type: GrantFiled: November 1, 2016Date of Patent: October 17, 2017Assignee: Tensorcom, Inc.Inventor: Dai Dai
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Publication number: 20170272109Abstract: Local oscillator (LO) leakage and Image are common and undesirable effects in typical transmitters. Typically, fairly complex hardware and algorithms are used to calibrate and reduce these impairments. A single transistor that draws essentially no dc current and occupies a very small area detects the LO leakage and Image signals. The single transistor operating as a square-law device is used to mix the signals at the input and output ports of a power amplifier. The mixed signal generated by the single transistor enables the simultaneous calibration of the LO leakage and Image Rejection.Type: ApplicationFiled: August 25, 2015Publication date: September 21, 2017Applicant: Tensorcom, Inc.Inventors: KhongMeng Tham, Huainan Ma, Zaw Soe, Ricky Lap Kei Cheung
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Publication number: 20170141746Abstract: A circuit comprises a Sallen-Key filter, which includes a source follower that implements a unity-gain amplifier; and a programmable-gain amplifier coupled to the Sallen-Key filter. The circuit enables programmable gain via adjustment to a current mirror copying ratio in the programmable-gain amplifier, which decouples the bandwidth of the circuit from its gain settings. The programmable-gain amplifier can comprise a differential voltage-to-current converter, a current mirror pair, and programmable output gain stages. The Sallen-Key filter and at least one branch in the programmable-gain amplifier can comprise transistors arranged in identical circuit configurations.Type: ApplicationFiled: November 16, 2016Publication date: May 18, 2017Applicant: Tensorcom, Inc.,Inventors: Zaw Soe, Kevin Jing, Steve Gao
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Publication number: 20170126464Abstract: A receiver comprises a Low Noise Amplifier (LNA) configured to amplify an input signal and a resonant circuit coupled to the LNA. A first switch couples current from the resonant circuit to a first capacitor integrating a first voltage, wherein the first switch is enabled with a clock signal. A second switch couples current from the resonant circuit to a second capacitor integrating a second voltage, wherein the second switch is enabled with an inverse clock signal. A differential amplifier comprises a positive input for receiving the first voltage and a negative input for receiving the second voltage in order to produce a sum and a difference frequency spectrum between a signal spectrum carried within the current and a frequency of the clock signal.Type: ApplicationFiled: November 21, 2016Publication date: May 4, 2017Applicant: Tensorcom, Inc.Inventor: Zaw Soe
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Publication number: 20170063362Abstract: A circuit comprises a first amplifier coupled to a first and a second node; a differential capacitive load coupled to the first and the second node, the differential capacitive load coupled between drains of transistors in a cross coupled transistor circuit; a current mirror coupled to a source of each transistor; and a capacitor coupled between the sources of the transistors. A plurality of amplifiers can be coupled to the differential capacitive load, wherein each amplifier comprises a clock-less pre-amplifier of a comparator.Type: ApplicationFiled: November 1, 2016Publication date: March 2, 2017Applicant: Tensorcom, Inc.Inventor: Dai Dai