Patents Assigned to Tesserae Technologies
  • Patent number: 7265440
    Abstract: An integrally packaged integrated circuit device including an integrated circuit die including a crystalline substrate having first and second generally planar surfaces and edge surfaces and an active surface formed on the first generally planar surface, at least one chip scale packaging layer formed over the active surface and at least one electrical contact formed over the at least one chip scale packaging layer, the at least one electrical contact being connected to circuitry on the active surface by at least one pad formed on the first generally planar surface.
    Type: Grant
    Filed: May 10, 2005
    Date of Patent: September 4, 2007
    Assignee: Tessera Technologies Hungary Kft.
    Inventors: Gil Zilber, Reuven Katraro, Julia Aksenton, Vage Oganesian
  • Publication number: 20070190747
    Abstract: Methods are provided for making a plurality of lidded microelectronic elements. In an exemplary embodiment, a lid wafer is assembled with a device wafer. Desirably, the lid wafer is severed into a plurality of lid elements to remove portions of the lid wafer overlying contacts at a front face of the device wafer adjacent to dicing lanes of the device wafer. Thereafter, desirably, the device wafer is severed along the dicing lanes to provide a plurality of lidded microelectronic elements.
    Type: Application
    Filed: January 19, 2007
    Publication date: August 16, 2007
    Applicant: Tessera Technologies Hungary Kft.
    Inventors: Giles Humpston, Michael Nystrom, Vage Oganesian, Yulia Aksenton, Osher Avsian, Robert Burtzlaff, Avi Dayan, Andrey Grinman, Felix Hazanovich, Ilya Hecht, Charles Rosenstein, David Ovrutsky
  • Publication number: 20070190691
    Abstract: Packaged microelectronic elements are provided. In an exemplary embodiment, a microelectronic element having a front face and a plurality of peripheral edges bounding the front face has a device region at the front face and a contact region with a plurality of exposed contacts adjacent to at least one of the peripheral edges. The packaged element may include a plurality of support walls overlying the front face of the microelectronic element such that a lid can be mounted to the support walls above the microelectronic element. For example, the lid may have an inner surface confronting the front face. In a particular embodiment, some of the contacts can be exposed beyond edges of the lid.
    Type: Application
    Filed: January 19, 2007
    Publication date: August 16, 2007
    Applicant: Tessera Technologies Hungary Kft.
    Inventors: Giles Humpston, Michael Nystrom, Vage Oganesian, Yulia Aksenton, Osher Avsian, Robert Burtzlaff, Avi Dayan, Andrey Grinman, Felix Hazanovich, Ilya Hecht, Charles Rosenstein, David Ovrutsky, Mitchell Reifel
  • Publication number: 20070138498
    Abstract: An integrally packaged integrated circuit device including an integrated circuit die including a crystalline substrate having first and second generally planar surfaces and edge surfaces and semiconductor circuitry formed over the first generally planar surface, at least one chip scale packaging layer formed over the semiconductor circuitry and the first generally planar surface, an insulation layer formed over the second generally planar surface and the edge surfaces and at least one electrical conductor formed directly on the insulation layer overlying the second generally planar surface, the at least one electrical conductor being connected to the circuitry by at least one pad formed directly on the first generally planar surface.
    Type: Application
    Filed: January 30, 2007
    Publication date: June 21, 2007
    Applicant: Tessera Technologies Hungary Kft.
    Inventors: Gil Zilber, Julia Aksenton, Vage Oganesian
  • Patent number: 7192796
    Abstract: An integrally packaged integrated circuit device including an integrated circuit die including a crystalline substrate having first and second generally planar surfaces and edge surfaces and semiconductor circuitry formed over the first generally planar surface, at least one chip scale packaging layer formed over the semiconductor circuitry and the first generally planar surface, an insulation layer formed over the second generally planar surface and the edge surfaces and at least one electrical conductor formed directly on the insulation layer overlying the second generally planar surface, the at least one electrical conductor being connected to the circuitry by at least one pad formed directly on the first generally planar surface.
    Type: Grant
    Filed: July 2, 2004
    Date of Patent: March 20, 2007
    Assignee: Tessera Technologies Hungary Kft.
    Inventors: Gil Zilber, Julia Aksenton, Vage Oganesian
  • Publication number: 20070042562
    Abstract: An integrally packaged optronic integrated circuit device (310) including an integrated circuit die (322) containing at least one of a radiation emitter and radiation receiver and having top and bottom surfaces formed of electrically insulative and mechanically protective material, at least one of the surfaces (317) being transparent to radiation, and electrically insulative edge surfaces (314) having pads.
    Type: Application
    Filed: October 26, 2006
    Publication date: February 22, 2007
    Applicant: Tessera Technologies Hungary Kft.
    Inventor: Avner Badehi
  • Publication number: 20070040180
    Abstract: An integrally packaged optronic integrated circuit device including an integrated circuit die containing at least one of a radiation emitter and radiation receiver and having a transparent packaging layer overlying a surface of the die, the transparent packaging layer having an opaque coating adjacent to edges of the layer.
    Type: Application
    Filed: October 26, 2006
    Publication date: February 22, 2007
    Applicant: Tessera Technologies Hungary Kft.
    Inventor: Avner Badehi
  • Publication number: 20070040257
    Abstract: This invention discloses a crystalline substrate based device including a crystalline substrate having formed thereon a microstructure; and at least one packaging layer which is sealed over the microstructure by means of an adhesive and defines therewith at least one gap between the crystalline substrate and the at least one packaging layer. A method of producing a crystalline substrate based device is also disclosed.
    Type: Application
    Filed: October 26, 2006
    Publication date: February 22, 2007
    Applicant: Tessera Technologies Hungary Kft.
    Inventor: Avner Badehi
  • Patent number: 7157742
    Abstract: An integrally packaged optronic integrated circuit device (310) including an integrated circuit die (322) containing at least one of a radiation emitter and radiation receiver and having top and bottom surfaces formed of electrically insulative and mechanically protective material, at least one of the surfaces (317) being transparent to radiation, and electrically insulative edge surfaces (314) having pads.
    Type: Grant
    Filed: March 11, 2003
    Date of Patent: January 2, 2007
    Assignee: Tessera Technologies Hungary Kft.
    Inventor: Avner Badehi
  • Patent number: 7144745
    Abstract: A method of producing a crystalline substrate based device includes forming a microstructure on a crystalline substrate. At least one packaging layer is sealed over the microstructure by an adhesive and defines therewith at least one gap between the crystalline substrate and the at least one packaging layer.
    Type: Grant
    Filed: August 7, 2001
    Date of Patent: December 5, 2006
    Assignee: Tessera Technologies Hungary Kft.
    Inventor: Avner Pierre Badehi
  • Patent number: 7033664
    Abstract: A crystalline substrate based device including a crystalline substrate having formed thereon a microstructure and at least one packaging layer which is formed over the microstructure and defines therewith at least one gap between the crystalline substrate and the at least one packaging layer and at least one opening in the packaging layer communicating with the at least one gap.
    Type: Grant
    Filed: October 22, 2002
    Date of Patent: April 25, 2006
    Assignee: Tessera Technologies Hungary Kft
    Inventors: Gil Zilber, Reuven Katraro, Doron Teomim