Abstract: A method of operating a network on a plurality of frequency hopping channels is disclosed. The method includes transmitting a beacon on a beacon channel different from the frequency hopping channels and receiving a request from a node to join the network in response to the beacon. The method further includes adding the node to the network in response to the step of receiving and communicating with the node on the plurality of frequency hopping channels after the step of adding.

Abstract: A circuit includes a digital-to-analog converter (DAC) and a compensation circuit. The DAC has a first terminal and a second terminal. The compensation circuit has a third terminal and a fourth terminal. The third terminal is coupled to the first terminal, and the fourth terminal is coupled to the second terminal. The compensation circuit is configured to source current into the first terminal responsive to an increase in voltage on the second terminal, and to sink current from the first terminal responsive to a decrease in voltage on the second terminal.

Abstract: In some examples, a system includes a voltage source terminal, a voltage reference terminal, a field effect transistor (FET), a current source, a comparator, and adjustment circuitry. The FET has a gate terminal and a non-gate terminal, the gate terminal coupled to the voltage source terminal. The current source is coupled to the non-gate terminal. The comparator has a comparator output and first and second comparator inputs, the first comparator input coupled to the non-gate terminal, and the second comparator input coupled to the voltage reference terminal. The adjustment circuitry has a circuitry input and a circuitry output, the circuitry input coupled to the comparator output, and the adjustment circuitry configured to adjust the circuitry output responsive to the circuitry input, in which the adjustment reduces a drive strength of the circuit.

Abstract: An inductor has first and second terminals. A first switch is coupled between the first terminal and a voltage supply terminal. A second switch is coupled between the first terminal and a negative output supply terminal. A third switch is coupled between the second terminal and a positive output supply terminal. A fourth switch is coupled between the second terminal and a ground terminal. A controller is coupled to the first, second, third and fourth switches. The controller is configured to provide: an inductor charge mode; a positive boost mode; a negative boost mode; a first rest state in which the controller closes the first switch and opens the second, third and fourth switches; and a second rest state in which the controller closes the fourth switch and opens the first, second and third switches.

Abstract: Analog gain correction circuitry and analog switching clock edge timing correction circuitry can provide coarse correction of interleaving errors in radio-frequency digital-to-analog converters (RF DACs), such as may be used in 5G wireless base stations. The analog correction can be supplemented by digital circuitry configured to “pre-cancel” an interleaving image by adding to a digital DAC input signal a signal equal and opposite to an interleaving image created by the interleaving DAC, such that the interleaving image is effectively mitigated. Error correction control parameters can be periodically adjusted for changes in temperature by a controller coupled to an on-chip temperature sensor. A model useful for understanding the sources of error in interleaving DACs is also described.

Abstract: Described example user interface control apparatus includes a first structure, with a first side, conductive capacitor plate structures spaced along a first direction on the first side, a movable second structure with an auxiliary conductive structure, and an interface circuit to provide excitation signals to, and receive sense signals from, the conductive capacitor plate structures to perform a mutual capacitance test and a self-capacitance test of individual ones of the conductive capacitor plate structures to determine a position of the second structure or a user's finger relative to the first structure along the first direction.

Abstract: Example systems and processes control transition of an electric motor from open-loop operation to closed-loop operation by detecting zero-crossing (ZC) locations of the back-electromotive force (BEMF). The rotor angle of the electric motor is changed, e.g., by changing acceleration of the electric motor to correct a phase difference based on the detected ZC locations and an open-loop profile of the electric motor. Detected ZC locations may be used to identify ZC-detected-based commutation points, and each detected ZC location may be used to update a next commutation point. During the control process the open-loop profile is updated. Transition may occur when a set number of ZC-detection-based commutation points are sufficiently aligned with corresponding updated commutation points, or such alignment is maintained for at least one electrical cycle.

Abstract: An electronic device has a substrate and first and second metallization levels with a resonant circuit. The first metallization level has a first dielectric layer on a side of the substrate, and a first metal layer on the first dielectric layer. The second metallization level has a second dielectric layer on the first dielectric layer and the first metal layer, and a second metal layer on the second dielectric layer. The electronic device includes a first plate in the first metal layer, and a second plate spaced apart from the first plate in the second metal layer to form a capacitor. The electronic device includes a winding in one of the first and second metal layers and coupled to one of the first and second plates in a resonant circuit.

Abstract: A method includes forming a first aluminum silicon layer on a metal layer and forming a titanium nitride layer (or other titanium-based layer) on a surface of the aluminum-silicon layer opposite the metal layer. The method further includes etching the titanium nitride layer to create a titanium nitride pad and forming a torsion hinge in the metal layer. The titanium nitride pad is on the torsion hinge. The method also includes depositing a sacrificial layer over the torsion hinge and titanium nitride pad, forming a via in the sacrificial layer from a surface of the sacrificial layer opposite the torsion hinge to the titanium nitride pad, depositing a metal mirror layer on a surface of the sacrificial layer opposite the torsion hinge and into the via, and removing the sacrificial layer.

Abstract: A processor includes a scalar processor core and a vector coprocessor core coupled to the scalar processor core. The scalar processor core is configured to retrieve an instruction stream from program storage, and pass vector instructions in the instruction stream to the vector coprocessor core. The vector coprocessor core includes a register file, a plurality of execution units, and a table lookup unit. The register file includes a plurality of registers. The execution units are arranged in parallel to process a plurality of data values. The execution units are coupled to the register file. The table lookup unit is coupled to the register file in parallel with the execution units. The table lookup unit is configured to retrieve table values from one or more lookup tables stored in memory by executing table lookup vector instructions in a table lookup loop.

Abstract: A system includes a multiplexer, an input/output (I/O) pin, a logic circuit, and a control register. The multiplexer has multiple inputs, an output, and a selection input. The logic circuit is coupled between the multiplexer and the I/O pin. The logic circuit hays a first input. The control register includes first and second bit fields corresponding to the I/O pin. The first bit field is coupled to the selection input of the multiplexer, and the second bit field is coupled to the first input of the logic circuit.

Abstract: A system for determining the temperature of a voice coil of a speaker includes a first pre-emphasis filter which has an input coupled to receive a digitized current sense signal. The first pre-emphasis filter applies a gain to signal components at a selected frequency band and provides a pre-emphasized current sense signal. The system includes a second pre-emphasis filter which has an input coupled to receive a digitized voltage sense signal. The second pre-emphasis filter applies a gain to the signal components at the selected frequency band and provides a pre-emphasized voltage sense signal. The system includes a first quantizer module configured to map the pre-emphasized signal to a quantized current sense signal, and includes a second quantizer module configured to map the pre-emphasized voltage sense signal to a quantized voltage sense signal.

Abstract: An AFE chip for a smoke detector includes a DC/DC boost converter having a boost input, a boost output, and a boost upper power supply input. The boost input is coupled to a first pin that is adapted for coupling to a battery through an inductor and the boost output is coupled to a second pin. The DC/DC boost converter is configured to not switch when a voltage on the second pin is greater than a programmed boost voltage. A set of power regulator circuits have a power input, which is coupled to a third pin, and a power output. The third pin is adapted for receiving an input voltage, the power output is coupled to provide an internal voltage, and the set of power regulator circuits are further coupled to the boost upper power supply input.

Abstract: Multiple sensors are coupled to a first pin of a PSI5 transceiver to receive a sensor bus signal. A Manchester decoder is coupled to a second pin and a battery is coupled to a third pin. A comparator receives a first voltage that is proportional to a current on the sensor bus signal and a second voltage that is proportional to a base current on the sensor bus signal and sends a data output signal to the second pin. A sample-and-hold circuit captures a third voltage used to effect the second voltage responsive to a high value on a base current sampling signal. A base-current-renewal circuit detects edge transitions on the data output signal and when the data output signal has no edge transitions for a period of time greater than a gap time defined in a PSI5 standard, sets the base current sampling signal high.

Abstract: Authentication of a networked device with limited computational resources for secure communications over a network. Authentication of the device begins with the supplicant node transmitting a signed digital certificate with its authentication credentials to a proxy node. Upon verifying the certificate, the proxy node then authenticates the supplicant's credentials with an authentication server accessible over the network, acting as a proxy for the supplicant node. Typically, this verification includes decryption according to a public/private key scheme. Upon successful authentication, the authentication server creates a session key for the supplicant node and communicates it to the proxy node. The proxy node encrypts the session key with a symmetric key, and transmits the encrypted session key to the supplicant node which, after decryption, uses the session key for secure communications. In some embodiments, the authentication server encrypts the session key with the symmetric key.

Abstract: Methods, apparatus, systems and articles of manufacture are disclosed to adjust an operating mode of a power converter. An example apparatus includes a first transistor having a gate terminal, a first current terminal, and a second current terminal, the first current terminal to be coupled to a second transistor and an inductor of a power converter, a capacitor coupled to the second current terminal, a logic gate having a first logic gate input, a second logic gate input, and a logic gate output, the logic gate output coupled to the gate terminal, a comparator having a comparator input and a comparator output, the comparator input coupled to the capacitor and the second current terminal, a multiplexer coupled to the comparator output, a first flip-flop coupled to the multiplexer and the second logic gate input, and a second flip-flop coupled to the multiplexer and the first flip-flop.

Abstract: In described examples, a magnetic sensor includes a waveguide that encapsulates dipolar molecules. A mm-wave electromagnetic field is launched into the waveguide, travels through the dipolar molecules, and is then received after passing through the dipolar molecules. The frequency of the mm-wave electromagnetic signal is swept across a range that includes an intrinsic quantum rotational state transition frequency (Fr) for the dipolar molecules. Absorption peaks in accordance with the Zeeman effect are determined. A strength of a magnetic field affecting the magnetic sensor is proportional to a difference in the frequencies of the absorption peaks.

Abstract: A receiver circuit comprising an equalizer and a method of correcting offset in the equalizer. In an example, the equalizer includes a plurality of delay stages for sampling and storing a sequence input samples, and a plurality of coefficient gain stages, each coupled to a corresponding delay stage to apply a gain corresponding to a coefficient value. The outputs of the coefficient gain stages are summed to produce a weighted sum for quantization by a slicer. Offset correction circuitry is provided, including memory storing a look-up table (LUT) for each coefficient gain stage, each storing offset correction values corresponding to the available coefficient values for the coefficient gain stage. Addressing circuitry retrieves the offset correction values for the coefficient values currently selected for each gain stage, and applies an offset correction corresponding to the sum of the retrieved offset correction values.

Abstract: To improve power converter ON-time generation, an example apparatus includes: a phase frequency detector to determine a phase difference between a first signal and a second signal; a first pulse generator to generate a first time signal at a second time, in which the first signal is associated with a first time delay based on the phase difference; and a second pulse generator coupled to the first pulse generator. The second pulse generator is configured to: generate a second time signal at a third time, in which the third time is after the second time; and obtain a digital word based on the phase difference at a first time, in which the first time is before the second time and the third time, and the second time signal is associated with a second time delay based on the phase difference.

Abstract: Methods and apparatus are presented for sensing current flowing in a power transistor of a switch mode converter, in which a voltage is sensed across a first field effect transistor connected in a series circuit branch in parallel with the power transistor, and the sensed voltage is used to generate output signal to indicate the current flowing in the power transistor.