Abstract: A circuit and a method for biasing a compound cascode current mirror (CCCM) that enables high-voltage swing at the output and accurate current mirroring is presented. The CCCM has mirror transistors and cascode transistors which may be of a different technology kind. The drain-source voltage Vds of the mirror transistor on the input leg of the CCCM is held at a voltage Vov that is generated by the biasing circuit; Vov is the overdrive voltage of the input mirror transistor of the CCCM and the value of Vov is maintained by the bias circuit and a feed-back amplifier such that the mirror transistor remains on the edge of its active region, over manufacture deviations and tracks even over operational conditions such as temperature and supply variations. The feed-back amplifier drives the gates of the cascode transistors and uses its feedback node to hold the Vds at Vov.

Abstract: Estimation of the code size of variable length encoding of quantized DCT coefficients by summation over histogram bins of products of number of bin members and a code size of an average run of zero coefficients coupled with a representative level from the bin. The estimation provides low-complexity feedback for quantization level adjustment to obtain variable length code size target without actual performance of a quantization level plus variable length encoding.

Abstract: The present invention provides proxy browsing on the Internet 16 whereby the user interface of one device, such as a personal computer 10 with a Web browser, causes servers 14 to interact with alternate client devices 20, 24 linked to the Internet 16 that are remotely located from the personal computer. A user may activate a proxy browser on a PC 10, select one or more files or commands from a Web server 14, and download the files or commands directly from the servers to client devices 20, 24. A user of a Web browser 26 may locate and download by proxy a digital sound file stored on a Web server 40 to play on a series of networked digital speakers 54. The user of a Proxy Browser 26 may select a recipe stored on an Web server 40 and send the recipe that has embedded commands to configure networked home appliances 52 to the correct cooking modes.

Abstract: Disclosed herein is a system and method of operating a processor before and after a reset has been asserted. Prior to a reset being asserted the processor operates in one of a plurality of states wherein primary code may be executed by the processor depending on said state. Upon a reset being asserted the processor begins executing code for a reset routine. The processor also executes a process such that the processor operates in the same state it was in prior to the reset upon the reset no longer being asserted.

Abstract: A data output system (100) is disclosed. The data output system (100) includes a number of data output paths (102a-102h) which provide data output signals (DQ0-DQ7) to a data bus. An invert data path 104 provides an invert data signal (INVOUT) that indicates when the data output signals (DQ0-DQ7) have been inverted to reduce the number of transitions on the data bus. A voter circuit (106) determines when data output signal inversion occurs, and includes a local data comparator (132a-132h) associated with each data output path (102a-102h). Each data comparator (132a-132h) compares a current data output signal (D0-D7) with a next data output signal (DN0-DN7), and in response thereto, generates a differential on a pair of data compare lines (138 and 140). The differential on the data compare lines (138 and 140) is amplified by a differential amplifier (136) to generate the invert output signal (INVN) for the following data output cycle.

Abstract: A capillary (10) is provided for use in wire bonding and may be incorporated into a wire bonding machine. The capillary (10) incorporates one or more indicators (100, 105, 110, 113) which may be positioned about the capillary. For example, the indicators may be affixed to an outer surface of the capillary. Sensing of a indicator may be achieved by a detector (160) to determine the angular position of the indicator. This may be used to determine and/or establish the angular alignment of the capillary. The angular alignment may correspond to a desired axis of a wire bonding machine table or lead frame, or to a longitudinal axis of a lead on a lead frame, in order to achieve optimum effectiveness in wire bonding between an integrated circuit chip and the leads of the lead frame. The capillary may be any of a number of differing types including those having circular and non-circular faces.

Abstract: A semiconductor storage device is provided with a storage circuit for a faulty address and a plurality of redundant word lines corresponding to the storage circuit. The storage circuit is adapted to store a faulty address required for selecting a redundant word line. The faulty address is compared with an address input at the time of memory access by a comparator. Using a coincidence signal produced from the comparator and a predetermined address signal contained in the input address, a defect relief circuit selects one of the redundant word lines in place of the faulty word line.

Abstract: Via reliability failure in ULSI devices having aluminum leads is significantly reduced by forming a thin layer of metal, such as Ti, between the aluminum conductor and its antireflection coating. Heating the metal causes it to react with the aluminum and form an intermetallic coating. Via hole formation is achieved by etching. During via formation, if the etch etchs through the antireflection coating, it should stop in the intermetallic layer as opposed to etching into the underlying aluminum conductor. The thin layer of metal may be heated to form the intermetallic during planarization when curing spin on glass, or, a separate anneal may be used with planarization such as by chemical mechanical polish.

Abstract: A method for forming contact vias in order to make electrical connection between conductive interconnection layers is disclosed. The semiconductor slice is processed so as to form the diffusions and underlying interconnection layers using well known techniques. After the deposition and patterning of the last interconnection layer prior to metallization, a layer of platinum or another metal is deposited onto the slice. The slice is sintered to form a silicide film on those portions of the interconnection layers and diffusions which were directly exposed to the sputtered platinum. A layer of phosphorous-doped dielectric is then deposited, followed by a layer of undoped oxide. Photoresist or another conformal material is spun on to the slice, resulting in a planar top surface. The slice is exposed to a plasma etch which etches both the photoresist and the undoped oxide, resulting in a top surface of the undoped oxide which is substantially planar.