Abstract: A bidirectional communication system 1 comprises a signal transmitting and receiving device 10 and a signal transmitting and receiving device 20 that perform bidirectional communication via a transmission path 30. The signal transmitting and receiving device 20 comprises a driver 21, a filter 22, a receiver 23, and a controller 24. The receiver 23 recovers a clock signal by performing frequency locking on a training pattern signal output through the filter 22, and outputs a recovered clock to the controller 24. The controller 24 receives the recovered clock output from the receiver 23, controls a cutoff frequency of the filter 22, and controls an operation of the driver 21 based on a frequency information of the recovered clock signal.

Abstract: A video signal receiver includes a clock signal receiver, a frame signal generator, and a frame signal transmitter. The clock signal receiver receives a camera video signal clock sent from a video signal transmitter in a camera module and outputs the clock to the frame signal generator. The frame signal generator generates a frame signal based on the clock received by the clock signal receiver and outputs the frame signal to the frame signal transmitter. The frame signal transmitter receives input of the frame signal output from the frame signal generator and sends the frame signal to the video signal transmitter of each camera module.

Abstract: The communication device 111 included in the active cable comprises a controller 11, a comparator 12, a resistor 13, a voltage source 14, and a redriver 16. The comparator 12 receives the voltage value of the SBU signal line and the reference voltage value output from the voltage source 14, and compares the voltage value of the SBU signal line with the reference voltage value to detect the level of the sideband signal. The controller 11 receives the detection result of the sideband signal level from the comparator 12, and sets the redriver 16, which is an active device, to the low-power-consumption state when the sideband signal level stays at L level for a predetermined period of time or longer.

Abstract: A transmitter 10B always transmits a signal (data in which a dock is embedded) generated by the serializer 11 to the communication link. The receiver 20B includes a recovery circuit 22, a deserializer 23, a selector 25, and a training signal generator 32. The training signal generator 32 generates and outputs a training signal for frequency synchronization of the recovering operation of the recovery circuit 22. The selector 25 receives the signal from the transmitter 10B via the communication link and receives the training signal output from the training signal generator 32. The selector 25 selects and outputs either the received signal or the training signal according to the level of the lock signal output from the recovery circuit 22.

Abstract: One embodiment relates to a transmitting device, a receiving device, and the like for preventing increases in the number of communication links, power consumption, and circuit layout area. The transmitting device includes a high-speed signal generator, a low-speed signal generator, and a signal superimposing unit. The high-speed signal generator generates a high-speed signal having a limited frequency band. The low-speed signal generator generates a low-speed signal having a frequency lower than the frequency band of the high-speed signal. The signal superimposing unit outputs a superimposed signal of the high-speed signal and the low-speed signal. The receiving device includes a signal separator and a recovery unit. The signal separator separates the received signal into the high-speed signal and the low-speed signal. The recovery unit performs frequency tracking based on the separated low-speed signal and performs phase tracking based on the separated high-speed signal.

Abstract: A video signal transmission and reception system includes a video signal receiver in a video signal reception module, a video signal transmitter in a camera module, and a specific video signal transmitter in a specific camera module. In the specific camera module, a frame signal generated by a frame signal generator is sent to the video signal receiver from the specific video signal transmitter. The frame signal is sent to the video signal transmitters in a plurality of the camera modules from the video signal receiver.

Abstract: A semiconductor device includes a semiconductor chip and a package. The semiconductor chip includes a signal processing circuit, a plurality of pads, and a first resistor which arc formed on a semiconductor substrate. On the semiconductor chip, there is no shot-circuiting between a first pad and a second pad of the plurality of pads. A signal input terminal of the signal processing circuit is connected to the second pad. The first resistor is provided between a reference potential supply terminal for supplying a power supply potential and the first pad. A specific terminal of the plurality of terminals of the package is connected to the first pad by a first bonding wire, and is connected to the second pad by a second bonding wire.

Abstract: A reference current source includes a reference current path, a first output current path and a second output current path. The reference current path includes a diode-connected first transistor, a diode-connected second transistor, and a first resistor that are connected in series between a first fixed potential and a second fixed potential. The first output current path includes a third transistor having a gate connected to a gate of the second transistor, forming a current mirror together with the second transistor, and a second resistor interposed between the third transistor and the first fixed potential. The second output current path includes a voltage-current conversion circuit to which a potential of a third node between the third transistor and the second resistor in the first output current path is applied and through which a reference current flows.

Abstract: A communication device includes a controller, a differential input termination resistor, a linear laser driver, transmitted signal detector, a linear transimpedance amplifier, a linear variable gain amplifier, a linear output driver, a pulse counter, a received signal detector, and an amplitude detector. The controller outputs a Term signal for setting a resistance value of the differential input termination resistor, a TxEN signal and an LS signal for controlling an operation of the linear laser driver, an RxEN signal for controlling operations of the linear TIA, the linear VGA, and the linear output driver, and a GCTL signal for controlling a gain of the linear VGA.

Abstract: An XTC circuit includes delay circuits, differentiated signal generating circuits, and an amplitude adjusting and adding circuit. A signal Da, which is one aggressor signal, is input to the differentiated signal generating circuit after being delayed by the delay circuit, and the differentiated signal generating circuit generates a differentiated signal having a differentiated waveform of the signal Da. In the amplitude adjusting and adding circuit, the differentiated signal generated by the differentiated signal generating circuit is amplitude-adjusted to become a current signal, and the differentiated signal after the amplitude adjustment is current-added to the signal Db.

Abstract: A video signal transmission and reception system includes a first video signal receiver and a second video signal receiver in a video signal reception module and a video signal transmitter in a camera module. The video signal reception module includes the first video signal receiver, the second video signal receiver, and a central operation processor. A frame signal generated in the first video signal receiver is sent to a video signal transmitter of a first group and is output to the second video signal receiver. In addition, the frame signal generated in the first video signal receiver is input into the second video signal receiver and is sent to a video signal transmitter of a second group from the second video signal receiver.

Abstract: A multi-lane serializer device 1 includes serializer circuits 101 to 10N and a controller 20. A phase difference detector of each serializer circuit detects a phase difference between a load signal and a first clock, and outputs an abnormal detection signal to the controller 20 when the detected phase difference is abnormal. When the controller 20 receives the abnormal detection signal from any of the serializer circuits, the controller 20 transmits a batch reset instruction signal to all the serializer circuits. Then, in all the serializer circuits, when a reset signal generator receives the batch reset instruction signal output from the controller 20, the reset signal generator transmits a reset instruction signal to a load signal generator to reset the operation of a load signal generation in the load signal generator.

Abstract: A transmitting and receiving device includes a controller, a driver, a specific pattern generator, a transmitting signal detector, an amplifier, a differential amplifier, an average current detector, and a received signal detector. In a non-signal period, the controller causes a current signal to be input from the driver to a laser diode and causes an optical signal to be output from the laser diode. When an optical signal of a specific pattern output from the other-side laser diode reaches a photodiode over a period of length that depends on an average value of a current signal output from the other-side photodiode that receives the optical signal, the controller adjusts a magnitude of the current signal input from the driver to the laser diode based on the length of the period of the optical signal of the specific pattern.

Abstract: The video signal transmission and reception system performs transmission of a video signal and a control signal between the video signal transmitting device and the video signal receiving device via a common transmission line. The video signal transmitting device includes a video signal transmitter, a control signal transmitter and receiver, a filter circuit, a controller, and a camera. The video signal receiving device includes a video signal receiver, a control signal transmitter and receiver, a filter circuit, and a controller. By performing time management control performed by the controller or the controller such that the period of the transient state of transmission of the video signal is within the non-communication period of the control signal, interference between the video signal and the control signal in the period of the transient state of transmission of the video signal is suppressed.

Abstract: A linear amplifier outputs differential signals corresponding to differential signals input to a first signal input terminal and a second signal input terminal, and includes a first resistor, a second resistor, a third resistor, a fourth resistor, a first capacitor, a second capacitor, a third transistor, a fourth transistor, a differential amplifier, and a signal processing circuit. The signal processing circuit includes a first transistor and a second transistor, and includes a resistor as a common voltage output part that outputs a common voltage. The differential amplifier receives the common voltage and a reference voltage, and applies a voltage corresponding to the voltage difference between the common voltage and the reference voltage to the control terminals of the transistors.

Abstract: A transmitting and receiving device includes a controller, a driver, a specific pattern generator, a transmitting signal detector, an amplifier, a differential amplifier, an average current detector, and a received signal detector. In a non-signal period, the controller causes a current signal to be input from the driver to a laser diode and causes an optical signal to be output from the laser diode. When an optical signal of a specific pattern output from the other-side laser diode reaches a photodiode over a period of length that depends on an average value of a current signal output from the other-side photodiode that receives the optical signal, the controller adjusts a magnitude of the current signal input from the driver to the laser diode based on the length of the period of the optical signal of the specific pattern.

Abstract: A PLL circuit includes a phase comparator, a charge pump, a loop filter, a voltage-controlled oscillator, a frequency divider, a frequency difference determination unit, and an FV characteristics adjustment unit. The frequency difference determination unit determines whether or not a frequency difference between a feedback oscillation signal and an input signal is equal to or smaller than a threshold value. The FV characteristics adjustment unit selects a frequency band in the voltage-controlled oscillator and adjusts FV characteristics.

Abstract: A transmitter 10B always transmits a signal (data in which a dock is embedded) generated by the serializer 11 to the communication link. The receiver 20B includes a recovery circuit 22, a deserializer 23, a selector 25, and a training signal generator 32. The training signal generator 32 generates and outputs a training signal for frequency synchronization of the recovering operation of the recovery circuit 22. The selector 25 receives the signal from the transmitter 10B via the communication link and receives the training signal output from the training signal generator 32. The selector 25 selects and outputs either the received signal or the training signal according to the level of the lock signal output from the recovery circuit 22.

Abstract: This embodiment relates to a transmitter and the like that prevent an increase of the number of cables of an external interface even when the types of signals to be transmitted increase. The transmitter includes a latch circuit, an encoder, a serializer, and a selector. The latch circuit keeps a level of each of a plurality of signals at the timing specified by a sampling clock, and then, outputs the plurality of signals as a parallel data signal. The encoder generates an encoded parallel data signal based on the parallel data signal from the latch circuit. The serializer generates a serial data signal based on the encoded parallel data signal from the encoder. The sampling clock has a frequency higher than a transmission rate of the fastest signal of the plurality of signals.

Abstract: A semiconductor device includes a semiconductor chip and a package. The semiconductor chip includes a signal processing circuit, a plurality of pads, and a first resistor which arc formed on a semiconductor substrate. On the semiconductor chip, there is no shot-circuiting between a first pad and a second pad of the plurality of pads. A signal input terminal of the signal processing circuit is connected to the second pad. The first resistor is provided between a reference potential supply terminal for supplying a power supply potential and the first pad. A specific terminal of the plurality of terminals of the package is connected to the first pad by a first bonding wire, and is connected to the second pad by a second bonding wire.