Patents Assigned to Tokyo Electron Limited
-
Patent number: 8662811Abstract: Manufacturing cost or energy consumption of a substrate processing apparatus can be reduced. The substrate processing apparatus includes a substrate loading/unloading unit (a substrate transit chamber 12) that transfers a substrate 2 accommodated in a carrier 3; a substrate transfer chamber 14 (25) communicating with the substrate loading/unloading unit via a substrate loading/unloading port 37 (39); a plurality of substrate processing chambers 15 to 24 (26 to 35) arranged along the substrate transfer chamber 14 (25); a substrate transfer device 36 (38) provided in the substrate transfer chamber 14 (25) and configured to transfer the substrate 2 between the substrate loading/unloading unit and the substrate processing chambers 15 to 24 (26 to 35); and a clean air flowing unit 41 (42) that allows clean air to flow along the substrate transfer chamber 14 (25).Type: GrantFiled: November 2, 2010Date of Patent: March 4, 2014Assignee: Tokyo Electron LimitedInventors: Junya Minamida, Issei Ueda
-
Patent number: 8664106Abstract: A method of manufacturing a semiconductor device, wherein a first substrate where first electrode pads are formed and a second substrate where second electrode pads are formed are stacked and the first electrode pads and the corresponding second electrode pads are electrically connected thereby forming the semiconductor device is disclosed. The method includes steps of performing a first hydrophilic treatment with respect to the first electrode pads; supplying liquid to a surface where the first electrode pads are formed in the first substrate; and placing the second substrate on the first substrate to which the liquid is supplied so that the surface where the first electrode pads are formed opposes a surface where the second electrode pads are formed, thereby aligning the first electrode pads and the second electrode pads by the liquid that gathers in the first electrode pads that have been subject to the first hydrophilic treatment.Type: GrantFiled: September 7, 2010Date of Patent: March 4, 2014Assignee: Tokyo Electron LimitedInventor: Haruo Iwatsu
-
Patent number: 8663489Abstract: A method for replacing plural substrates to be processed by a substrate processing apparatus which includes a substrate processing chamber, a load lock chamber, and a conveying apparatus including first and second conveying members for conveying the plural substrates into and out from the substrate processing chamber and the load lock chamber. The method includes the steps of a) conveying a first substrate out from the substrate processing chamber with the first conveying member, b) conveying a second substrate into the substrate processing chamber with the second conveying member, c) conveying the second substrate out from the load lock chamber with the second conveying member, and d) conveying the first substrate into the load lock chamber with the first conveying member. The steps c) and d) are performed between step a) and step b).Type: GrantFiled: March 26, 2010Date of Patent: March 4, 2014Assignee: Tokyo Electron LimitedInventors: Shigeru Ishizawa, Hiroshi Koizumi, Tatsuya Ogi
-
Patent number: 8664117Abstract: Provided is a semiconductor device manufacturing method enabling miniaturization by forming a hole in a vertical shape, capable of reducing the number of processes as compared to conventional methods, and capable of increasing productivity. The semiconductor device manufacturing method includes: forming a hole in a substrate; forming a polyimide film within the hole; anisotropically etching the substrate without using a mask covering a sidewall portion of the polyimide film within the hole and removing at least a part of a bottom portion of the polyimide film within the hole while the sidewall portion of the polyimide film remains within the hole; and filling the hole with a conductive metal.Type: GrantFiled: March 4, 2011Date of Patent: March 4, 2014Assignee: Tokyo Electron LimitedInventors: Katsuyuki Ono, Yusuke Hirayama, Hideyuki Hatoh
-
Patent number: 8664125Abstract: A method for performing a spacer etch process is described. The method includes conformally applying a spacer material over a gate structure on a substrate, and performing a spacer etch process sequence to partially remove the spacer material from a capping region of the gate structure and a substrate region on the substrate adjacent a base of the gate structure, while retaining a spacer sidewall positioned along a sidewall of the gate structure.Type: GrantFiled: December 23, 2011Date of Patent: March 4, 2014Assignee: Tokyo Electron LimitedInventors: Angelique Denise Raley, Takuya Mori, Hiroto Ohtake
-
Patent number: 8661704Abstract: Provided is substrate processing apparatus including processing chamber that dries substrate W using high temperature and high pressure fluid, raw material accommodating unit that accommodates raw material in liquid state, and supplying unit that supplies the high temperature and high pressure fluid to the processing chamber. The supplying unit includes sealable outer vessel connected to the processing chamber and the raw material accommodating unit, and inner vessel provided within the outer vessel and configured to receive the raw material. The inner vessel is provided with opened holes portions configured to drop down the raw material toward a portion of the outer vessel to be heated. After the raw material is accommodated in the inner vessel, the raw material is contacted with the portion to be heated and then heated. A high temperature and high pressure fluid is then obtained and supplied to the processing chamber.Type: GrantFiled: September 25, 2012Date of Patent: March 4, 2014Assignee: Tokyo Electron LimitedInventor: Mikio Nakashima
-
Patent number: 8664013Abstract: In a continuous processing system, a controller of a heat treatment apparatus calculates a weight of each layer from input target film thicknesses of a phosphorous-doped polysilicon film (D-poly film) and an amorphous silicon film (a-Si film), and calculates activation energy of stacked films based on the calculated weight and activation energy. The controller prepares a stacked film model based on the calculated activation energy and a relationship of a temperature of each zone and film thicknesses of the D-poly film and the a-Si film, and calculates an optimum temperature of each zone by using the prepared stacked film model. The controller controls power controllers of heaters to set a temperature in a reaction tube to be the calculated temperature of each zone and forms stacked films on a semiconductor wafer by controlling a pressure adjusting unit, flow rate adjusting units, etc.Type: GrantFiled: March 14, 2013Date of Patent: March 4, 2014Assignee: Tokyo Electron LimitedInventors: Yuichi Takenaga, Yukio Tojo
-
Publication number: 20140053882Abstract: A liquid processing apparatus including: a second housing; a first housing capable of being brought into contact with the second housing; a holding part configured to hold an object to be processed; a rotation driving part configured to rotate the object to be processed held by the holding part; front-side process-liquid supply nozzle configured to supply a process liquid onto a peripheral portion of a front surface of the object to be processed held by the holding part; and a storage part disposed on a side of a rear surface of the object to be processed held by the holding part, the storage part being configured to store the process liquid having been passed through the object to be processed. The respective first housing and the second housing can be moved in one direction, so that the first housing and the second housing can be brought into contact and separated from each other.Type: ApplicationFiled: October 29, 2013Publication date: February 27, 2014Applicant: Tokyo Electron LimitedInventors: Yoshifumi AMANO, Satoshi KANEKO
-
Publication number: 20140054463Abstract: According to an embodiment of the present disclosure, an apparatus of inspecting an overlapped substrate obtained by bonding substrates together is provided. The apparatus includes a first holding unit configured to hold and rotate the overlapped substrate, and a displacement gauge configured to measure displacements of peripheral sides of a first substrate and a second substrate constituting the overlapped substrate while rotating the overlapped substrate held by the first holding unit.Type: ApplicationFiled: August 15, 2013Publication date: February 27, 2014Applicant: Tokyo Electron LimitedInventors: Shinji KOGA, Akinori MIYAHARA, Hiroshi TOMITA, Shuji IWANAGA, Takeshi TAMURA
-
Publication number: 20140056328Abstract: A temperature measurement apparatus includes a light source; a first splitter that splits a light beam into a measurement beam and a reference beam; a reference beam reflector that reflects the reference beam; an optical path length adjustor; a second splitter that splits the reflected reference beam into a first reflected reference beam and a second reflected reference beam; a first photodetector that measures an interference between the first reflected reference beam and a reflected measurement beam obtained by the measurement beam reflected from a target object; a second photodetector that measures an intensity of the second reflected reference beam; and a temperature calculation unit. The temperature calculation unit calculates a location of the interference by subtracting an output signal of the second photodetector from an output signal of the first photodetector, and calculates a temperature of the target object from the calculated location of the interference.Type: ApplicationFiled: November 4, 2013Publication date: February 27, 2014Applicant: TOKYO ELECTRON LIMITEDInventors: Jun ABE, Tatsuo MATSUDO, Chishio KOSHIMIZU
-
Publication number: 20140055599Abstract: An inspection device for inspecting the interior of an overlapped substrate produced by bonding one substrate and another substrate, comprising: a first holding unit configured to hold the rear surface of the overlapped substrate and include a cutout formed to expose a portion of the rear surface of the overlapped substrate when viewed from the top; a second holding unit configured to hold and rotate the overlapped substrate; an infrared irradiator configured to irradiate the rear surface or front surface exposed from the cutout of the overlapped substrate held on the first holding unit with an infrared ray; and an image pickup unit configured to receive the infrared ray emitted from the infrared irradiator and image the overlapped substrate held on the first holding unit in division for each of regions exposed from the cutout.Type: ApplicationFiled: August 15, 2013Publication date: February 27, 2014Applicant: TOKYO ELECTRON LIMITEDInventors: Shinji KOGA, Akinori MIYAHARA, Hiroshi TOMITA, Shuji IWANAGA, Takeshi TAMURA
-
Patent number: 8658951Abstract: In-plane temperature of each substrate is uniformly controlled at the time of heating substrates placed on a plurality of susceptors, respectively. A heat treatment apparatus is provided with susceptors, i.e., conductive members for placing wafers thereon, having an induction heating body electrically divided into a center portion thereof and a peripheral portion thereof; a quartz boat supporting the susceptors arranged in a row; an induction coil, which is arranged inside a processing chamber to surround the circumference of each of the susceptors and configured such that the temperature of the induction coil can be freely adjusted; and a control unit which performs temperature control by changing the ratio between heat value at the center portion of the induction heating body and that at the peripheral portion, by controlling two high frequency currents of different frequencies to be applied to the induction coil from a high frequency current circuit.Type: GrantFiled: April 22, 2011Date of Patent: February 25, 2014Assignee: Tokyo Electron LimitedInventors: Tomihiro Yonenaga, Yumiko Kawano
-
Patent number: 8658436Abstract: [Problems] There are provided a chip separation method and a chip transfer method using features of dry etching. [Means for Solving the Problems] In the chip separation method, a multiple number of semiconductor devices or semiconductor integrated circuits are separated from a wafer 100 on which the multiple number of semiconductor devices or semiconductor integrated circuits are formed. The method includes forming, on a surface of the wafer 100, a mask layer through which a line-shaped pattern to be removed for separating the semiconductor devices or semiconductor integrated circuits is exposed; and etching the exposed pattern to a depth equal to or larger than about ? of a thickness of the wafer. One group of separated semiconductor devices or semiconductor integrated circuits has a distinguishable shape from another group of separated semiconductor devices or semiconductor integrated circuits.Type: GrantFiled: April 19, 2011Date of Patent: February 25, 2014Assignee: Tokyo Electron LimitedInventors: Masahiro Yamada, Kenya Iwasaki, Hiroshi Nishikawa
-
Patent number: 8658247Abstract: A disclosed film deposition method comprises alternately repeating an adsorption step and a reaction step with an interval period therebetween. The adsorption step includes opening a first on-off valve of a source gas supplying system for a predetermined time period thereby to supply a source gas to a process chamber, closing the first valve after the predetermined time period elapses, and confining the source gas within the process tube, thereby allowing the source gas to be adsorbed on an object to be processed, while a third on-off valve of a vacuum evacuation system is closed. The reaction step includes opening a second on-off valve of a reaction gas supplying system thereby to supply a reaction gas to the process chamber, thereby allowing the source gas and the reaction gas to react with each other thereby to produce a thin film on the object to be processed.Type: GrantFiled: July 25, 2011Date of Patent: February 25, 2014Assignee: Tokyo Electron LimitedInventors: Toshiyuki Ikeuchi, Pao-Hwa Chou, Kazuya Yamamoto, Kentaro Sera
-
Patent number: 8660805Abstract: Disclosed are a method and system for measuring the electron energy distribution function (EEDF) in a plasma which has a pronounced drifting Maxwellian component of the EEDF. The method comprises fitting an acquired unfiltered electron current vs. bias voltage curve to a functional form which assumes an EEDF comprising at least one stationary Maxwellian component and at least one drifting Maxwellian component. The method and system allow more accurate characterization of plasmas with electron components with pronounced drift, such as plasmas in microwave surface wave plasma (SWP) sources.Type: GrantFiled: October 4, 2011Date of Patent: February 25, 2014Assignee: Tokyo Electron LimitedInventors: Ronald Victor Bravenec, Jianping Zhao
-
Publication number: 20140048211Abstract: An inductively coupled plasma process can effectively and properly control plasma density distribution within donut-shaped plasma in a processing chamber is provided. In an inductively coupled plasma processing apparatus, a RF antenna 54 disposed above a dielectric window 52 is segmented in a diametrical direction into an inner coil 58, an intermediate coil 60, and an outer coil 62 in order to generate inductively coupled plasma. Between a first node NA and a second node NB provided in high frequency transmission lines of the high frequency power supply unit 66, a variable intermediate capacitor 86 and a variable outer capacitor 88 are electrically connected in series to the intermediate coil 60 and the outer coil 62, respectively, and a fixed or semi-fixed inner capacitor 104 is electrically connected to the inner coil 58.Type: ApplicationFiled: October 28, 2013Publication date: February 20, 2014Applicant: TOKYO ELECTRON LIMITEDInventor: Yohei YAMAZAWA
-
Publication number: 20140052286Abstract: Disclosed are an object transfer method and an object processing apparatus. The object transfer method includes: extending a first transfer arm into a processing chamber, and retracting the same after a first pick picking up an processed object accommodated in the processing chamber; rotating the first and second transfer arms to move a second pick holding an unprocessed object to a transfer position in front of the processing chamber and to move the first pick holding the processed object to a position adjacent to a transfer position in front of a load-lock chamber; extending the second transfer arm into the processing chamber, and retracting the same after accommodating the unprocessed object held by the second pick in the processing chamber; and rotating the second transfer arm to move the second pick holding no object to the transfer position in front of the load-lock chamber.Type: ApplicationFiled: February 14, 2012Publication date: February 20, 2014Applicant: TOKYO ELECTRON LIMITEDInventor: Hiromitsu Sakaue
-
Publication number: 20140048210Abstract: A substrate processing apparatus includes a chamber accommodating a wafer, a susceptor disposed inside the chamber and on which the wafer is held, an upper electrode facing the susceptor, and a second high frequency power source connected to the susceptor, wherein the upper electrode is electrically connected to a ground and is moveable with respect to the susceptor. The substrate processing apparatus divides a potential difference between plasma generated in a processing space and the ground into a potential difference between the plasma and a dielectric and a potential difference between the dielectric and the ground by burying the dielectric in the upper electrode, and changes a gap between the upper electrode and the susceptor.Type: ApplicationFiled: October 23, 2013Publication date: February 20, 2014Applicant: TOKYO ELECTRON LIMITEDInventors: Nobuhiro WADA, Makoto KOBAYASHI, Hiroshi TSUJIMOTO, Jun TAMURA, Mamoru NAOI, Jun OYABU
-
Publication number: 20140048885Abstract: Embodiments of the invention provide dual workfunction semiconductor devices and methods for manufacturing thereof. According to one embodiment, the method includes providing a substrate containing first and second device regions, depositing a dielectric film on the substrate, and forming a first metal-containing gate electrode film on the dielectric film, wherein a thickness of the first metal-containing gate electrode film is less over the first device region than over the second device region. The method further includes depositing a second metal-containing gate electrode film on the first metal-containing gate electrode film, patterning the second metal-containing gate electrode film, the first metal-containing gate electrode film, and the dielectric film to form a first gate stack above the first device region and a second gate stack above the second device region.Type: ApplicationFiled: September 30, 2012Publication date: February 20, 2014Applicant: TOKYO ELECTRON LIMITEDInventors: Genji Nakamura, Toshio Hasegawa
-
Publication number: 20140051263Abstract: This film forming method comprises: a first material gas supply step (A) wherein a first raw material gas is supplied over the substrate to be processed so that a first chemical adsorption layer, which is adsorbed on the substrate by means of the first raw material gas is formed on the substrate to be processed, a second material gas supply step (C) wherein a second raw material that is different from the first raw material gas is supplied over the substrate, on which the first chemical adsorption layer has been formed, so that a second chemical adsorption layer, which is adsorbed by means of the second raw material gas, is formed on the first chemical adsorption layer; and a plasma processing step (E) wherein a plasma processing is carried on at least the first and second chemical adsorption layers using microwave plasma.Type: ApplicationFiled: April 23, 2012Publication date: February 20, 2014Applicant: TOKYO ELECTRON LIMITEDInventors: Kouji Tanaka, Hirokazu Ueda