Patents Assigned to Tokyo Electron Ltd.
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Patent number: 7515283Abstract: In processing requests for wafer structure profile determination from optical metrology measurements, a plurality of measured diffraction signal of a plurality of structures formed on one or more wafers is obtained. The plurality of measured diffraction signals is distributed to a plurality of instances of a profile search module. The plurality of instances of the profile search model is activated in one or more processing threads of one or more computer systems. The plurality of measured diffraction signals is processed in parallel using the plurality of instances of the profile search module to determine profiles of the plurality of structures corresponding to the plurality of measured diffraction signals.Type: GrantFiled: July 11, 2006Date of Patent: April 7, 2009Assignee: Tokyo Electron, Ltd.Inventors: Tri Thanh Khuong, Junwei Bao, Jeffrey Alexander Chard, Wei Liu, Ying Zhu, Sachin Deshpande, Pranav Sheth, Hong Qiu
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Patent number: 7501352Abstract: The present invention generally provides a method for preparing an oxynitride film on a substrate. A surface of the substrate is exposed to oxygen radicals formed by ultraviolet (UV) radiation induced dissociation of a first process gas comprising at least one molecular composition comprising oxygen to form an oxide film on the surface. The oxide film is exposed to nitrogen radicals formed by plasma induced dissociation of a second process gas comprising at least one molecular composition comprising nitrogen using plasma based on microwave irradiation via a plane antenna member having a plurality of slits to nitridate the oxide film and form the oxynitride film.Type: GrantFiled: March 30, 2005Date of Patent: March 10, 2009Assignees: Tokyo Electron, Ltd., International Business Machines Corporation (“IBM”)Inventors: Masanobu Igeta, Cory Wajda, David L. O'Meara, Kristen Scheer, Toshihara Eurakawa
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Patent number: 7502709Abstract: A method of monitoring a dual damascene procedure that includes calculating a pre-processing confidence map for a damascene process, the pre-processing confidence map including confidence data for a first set of dies on the wafer. An expanded pre-processing measurement recipe is established for the damascene process when one or more values in the pre-processing confidence map are not within confidence limits established for the damascene process. A reduced pre-processing measurement recipe for the first damascene process is established when one or more values in the pre-processing confidence map are within confidence limits established for the damascene process.Type: GrantFiled: March 28, 2006Date of Patent: March 10, 2009Assignees: Tokyo Electron, Ltd., International Business Machines CorporationInventors: Merritt Funk, Radha Sundararajan, Daniel Joseph Prager, Wesley Natzle
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Patent number: 7469192Abstract: A system to process requests for wafer structure profile determination from optical metrology measurements off a plurality of structures formed on one or more wafer includes a diffraction signal processor, a diffraction signal distributor, and a plurality of profile search servers. The diffraction signal processor is configured to obtain a plurality of measured diffraction signals of the plurality of structures. The diffraction signal distributor is coupled to the diffraction signal processor. The diffraction signal processor is configured to transmit the plurality of measured diffraction signals to the diffraction signal distributor. The plurality of profile search servers is coupled to the diffraction signal distributor. The diffraction signal distributor is configured to distribute the plurality of measured diffraction signals to the plurality of profile search servers.Type: GrantFiled: July 11, 2006Date of Patent: December 23, 2008Assignee: Tokyo Electron Ltd.Inventors: Tri Thanh Khuong, Junwei Bao, Jeffrey A. Chard, Wei Liu, Ying Zhu, Sachin Deshpande, Pranav Sheth, Hong Qiu
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Patent number: 7407324Abstract: A method and apparatus for determining thickness of a metallic layer being deposited on a collector. The method includes applying an electromagnetic field to a conductive layer on the collector. Then the temperature or the change in temperature of the collector is determined. The metal thickness is determined as a function of the temperature or change in temperature. The apparatus includes a collector, a thermocouple associated with the collector, and a source of an electromagnetic field.Type: GrantFiled: August 10, 2005Date of Patent: August 5, 2008Assignee: Tokyo Electron, Ltd.Inventor: Jozef Brcka
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Patent number: 7323220Abstract: A method of operating a gas phase growth system is disclosed. The method includes a processing stage and a stabilizer feeding stage. In a non-limiting embodiment of the disclosure, an organometallic complex is vaporized by a vaporizer, and subsequently fed to a reaction chamber through a gas line communicating the vaporizer with the reaction chamber, whereby a film is formed on a substrate in the reaction chamber. During the stabilizer feeding stage, a stabilizer for the organometallic complex is fed in a gaseous state during normal operation of the vaporizer, wherein the stabilizer feeding stage is executed when the vaporizer is not vaporizing the organometallic complex.Type: GrantFiled: November 30, 2004Date of Patent: January 29, 2008Assignee: Tokyo Electron Ltd.Inventors: Yasuhiko Kojima, Vincent Vezin, Tomohisa Hoshino
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Patent number: 7300891Abstract: A method and system are described for increasing the tensile stress in thin films formed on a substrate, such as silicon nitride films. The thin film may be a planar film, or a non-planar film, such as a nitride film formed over a NMOS gate. The thin film is exposed to electro-magnetic (EM) radiation, such as EM radiation having a wavelength component less than about 500 nm. The EM source can include a multi-frequency source of radiation. Additionally, the source of radiation is collimated in order to selectively treat regions of a non-planar film.Type: GrantFiled: March 29, 2005Date of Patent: November 27, 2007Assignee: Tokyo Electron, Ltd.Inventors: Igeta Masonobu, Cory Wajda, Gert Leusink
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Publication number: 20070257685Abstract: The objective of present invention is to obtain high positioning accuracy while securing moving space for a probe positioned by insertion into a through-hole. For this reason, a probe having a perpendicular portion where a lower face contacts an electrode, and a beam formed in a horizontal direction from a top edge of the perpendicular portion. A locking portion protrudes outward and is formed on the perpendicular portion. A taper portion, having a diameter gradually increasing from a lower side of the locking portion is formed on the perpendicular portion. This taper portion is formed on the face on the opposite of the direction in which the beam portion is formed on the perpendicular portion. When the perpendicular portion of the probe is inserted into a through-hole, the perpendicular portion is guided by the taper portion, and locked to the upper end of the through-hole by the locking portion.Type: ApplicationFiled: December 27, 2006Publication date: November 8, 2007Applicant: Tokyo Electron LTD.Inventor: Jun Mochizuki
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Publication number: 20070239369Abstract: A method of creating a virtual profile library includes obtaining a reference signal. The reference signal was generated by measuring a signal off a reference structure on a semiconductor wafer with a metrology device. The reference signal is compared to a plurality of signals in a first library. The comparison is stopped if a first matching criteria is met. The reference signal is compared to a plurality of signals in a second library. The comparison is stopped if a second matching criteria is met. A virtual profile data space is created when the first and second matching criteria are not met. The virtual profile data space is created using differences between a profile data space associated with the first library and a profile data space associated with the second library. A first virtual profile signal is created in the virtual profile data space. A virtual profile shape and/or virtual profile parameters is created based on the first virtual profile signal.Type: ApplicationFiled: March 31, 2006Publication date: October 11, 2007Applicant: Tokyo Electron, Ltd.Inventors: Merritt Funk, Daniel Prager
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Publication number: 20070239383Abstract: A method of refining a virtual profile library includes obtaining a reference signal measured off a reference structure on a semiconductor wafer with a metrology device. A best match is selected of the reference signal in a virtual profile data space. The virtual profile data space has data points with specified accuracy values. The data points represent virtual profile parameters and associated virtual profile signals. The virtual profile parameters characterize the profile of an integrated circuit structure. The best match being a data point of the profile data space with a signal closest to the reference signal. Refined virtual profile parameters are determined corresponding to the reference signal based on the virtual profile parameters of the selected virtual profile signal using a refinement procedure.Type: ApplicationFiled: March 31, 2006Publication date: October 11, 2007Applicant: Tokyo Electron, Ltd.Inventors: Merritt Funk, Daniel Prager
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Patent number: 7279427Abstract: A process is provided for substrate ashing following the etching of features in a low dielectric constant (low-k) layer. The low-k layer can include ultra-low-k material, or a porous low-k material. The process may be configured to remove etch byproducts while preserving feature critical dimension. The ashing process comprises the use of a nitrogen and hydrogen containing chemistry with a passivation chemistry that includes oxygen, such as O2, CO, or CO2, or any combination thereof.Type: GrantFiled: August 3, 2005Date of Patent: October 9, 2007Assignee: Tokyo Electron, Ltd.Inventors: Masaru Nishino, Douglas M Trickett
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Publication number: 20070232045Abstract: A method of assessing damage of a dual damascene structure includes obtaining a wafer after the wafer has been processed using a dual damascene process. A first damage-assessment procedure is performed on the wafer using an optical metrology process to gather damage-assessment data for a first set of measurements sites on the wafer. For each measurement site in the first set of measurement sites, the optical metrology process determines an amount of damage of a damaged area of a periodic grating in the measurement site. The damage-assessment data includes the amount of damage determined by the optical metrology process. A first damage-assessment map is created for the dual damascene process. The first damage-assessment includes the damage-assessment data and the locations of the first set of measurement sites on the wafer. One or more values in the damage-assessment map are compared to damage-assessment limits established for the dual damascene process to identify the wafer as a damaged or undamaged wafer.Type: ApplicationFiled: March 30, 2006Publication date: October 4, 2007Applicant: Tokyo Electron, Ltd.Inventors: Kevin Lally, Merritt Funk, Radha Sundararajan
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Publication number: 20070229806Abstract: A method of measuring a damaged structure formed on a semiconductor wafer using optical metrology includes directing an incident beam on the damaged structure. A diffracted beam is received from the damaged structure. The received diffracted beam is processed to determine a profile of an undamaged portion of the damaged structure and to measure an amount of dielectric damage of the damaged structure.Type: ApplicationFiled: March 30, 2006Publication date: October 4, 2007Applicant: Tokyo Electron, Ltd.Inventors: Kevin Lally, Merritt Funk, Radha Sundararajan
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Publication number: 20070233404Abstract: A method of creating a library for measuring a plurality of damaged structures formed on a semiconductor wafer using optical metrology includes directing an incident beam on a first damaged structure. The first damaged structure was formed by modifying at least one process parameter in a dual damascene procedure. A diffracted beam is received from the first damaged structure. A measured diffraction signal is obtained based on the received diffracted beam. A first simulated diffraction signal is calculated. The first simulated diffraction signal corresponds to a hypothetical profile of the first damaged structure. The hypothetical profile includes an undamaged dielectric portion and a damaged dielectric portion. The measured diffraction signal is compared to the first simulated diffraction signal.Type: ApplicationFiled: March 30, 2006Publication date: October 4, 2007Applicant: Tokyo Electron, Ltd.Inventors: Kevin Lally, Merritt Funk, Radha Sundararajan
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Publication number: 20070229807Abstract: A method of measuring a damaged structure formed on a semiconductor wafer using optical metrology, the method includes obtaining a measured diffraction signal from a damaged periodic structure. A hypothetical profile of the damaged periodic structure is defined. The hypothetical profile having an undamaged portion, which corresponds to an undamaged area of a first material in the damaged periodic structure, and a damaged portion, which corresponds to a damaged area of the first material in the damaged periodic structure. The undamaged portion and the damaged portion have different properties associated with them. A simulated diffraction signal is calculated for the hypothetical damaged periodic structure using the hypothetical profile. The measured diffraction signal is compared to the simulated diffraction signal.Type: ApplicationFiled: March 30, 2006Publication date: October 4, 2007Applicant: Tokyo Electron, Ltd.Inventors: Kevin Lally, Merritt Funk, Radha Sundararajan
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Publication number: 20070233426Abstract: A method of using a virtual profile library to determine the profile of an integrated circuit structure includes measuring a signal off the structure with a metrology device. The measurement generates a measured signal. The measured signal is compared to a plurality of signals in at least one library. The comparison is stopped if a matching criteria is met. A subset of a virtual profile data space associated with the virtual profile library is determined when a matching criteria is not met. The subset is determined using profile data space associated with the at least one library. A virtual profile signal of the subset of the virtual profile data space is selected. A virtual profile shape and/or virtual profile parameters are determined based on the virtual profile signal. A difference is calculated between the measured signal and the virtual profile signal. The difference is compared to a virtual profile library creation criteria.Type: ApplicationFiled: March 31, 2006Publication date: October 4, 2007Applicant: Tokyo Electron, Ltd.Inventors: Merritt Funk, Daniel Prager
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Publication number: 20070204959Abstract: A method of processing a for an electronic device, comprising, at least: a nitridation step (a) of supplying nitrogen radicals on the surface of the electronic device substrate, to thereby form a nitride film on the surface thereof; and a hydrogenation step (b) of supplying hydrogen radicals to the surface of the electronic device substrate. By use of this method, it is possible to recover the degradation in the electric property of an insulating film due to a turnaround phenomenon which can occur at the time of nitriding an Si substrate, etc.Type: ApplicationFiled: May 11, 2007Publication date: September 6, 2007Applicant: TOKYO ELECTRON LTD.Inventors: Toshio NAKANISHI, Takuya Sugawara, Seiji Matsuyama, Masaru Sasaki
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Patent number: 7265066Abstract: A method and system are described for increasing the tensile stress in thin films formed on a substrate, such as silicon nitride films. The thin film may be a planar film, or a non-planar film, such as a nitride film formed over a NMOS gate. The thin film is exposed to collimated electro-magnetic (EM) radiation to anisotropically expose the film. The EM radiation can have a component having a wavelength less than about 500 nm. The EM source can include a multi-frequency source of radiation.Type: GrantFiled: March 29, 2005Date of Patent: September 4, 2007Assignee: Tokyo Electron, Ltd.Inventors: Igeta Masonobu, Cory Waida, Gert Leusink
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Patent number: 7199046Abstract: An interconnect structure in back end of line (BEOL) applications comprising a tunable etch resistant anti-reflective (TERA) coating is described. The TERA coating can, for example, be incorporated within a single damascene structure, or a dual damascene structure. The TERA coating can serve as part of a lithographic mask for forming the interconnect structure, or it may serve as a hard mask, a chemical mechanical polishing (CMP) stop layer, or a sacrificial layer during CMP.Type: GrantFiled: November 14, 2003Date of Patent: April 3, 2007Assignee: Tokyo Electron Ltd.Inventors: Jeffrey T. Wetzel, David C. Wang, Eric M. Lee, Dorel Ioan Toma
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Patent number: 7161360Abstract: An electrostatic capacitance sensor, includes an electrostatic capacitance detector, an operational amplifier in which a feedback impedance circuit is connected between an output terminal and an inverse input terminal of the operational amplifier, a signal line connected between the inverse input terminal of the operational amplifier and the electrostatic capacitance detector, an alternating-current signal generator connected to a non-inverse input terminal of the operational amplifier, and a shield for shielding at least a portion of the signal line, the shield being connected to the non-inverse input terminal of the operational amplifier and the alternating-current signal generator. The electrostatic capacitance detector includes a detecting electrode and a shield electrode. The detecting electrode includes a detector-detecting electrode for detecting an object to be detected and an electrode introducer-detecting electrode for introducing an electrode to the detector-detecting electrode.Type: GrantFiled: December 3, 2004Date of Patent: January 9, 2007Assignee: Tokyo Electron Ltd.Inventors: Yoshihiro Hirota, Toshiyuki Matsumoto, Tatsuo Hiroshima