Patents Assigned to Tokyo
  • Patent number: 10906009
    Abstract: A method for producing a gas separation membrane, including the following steps: step (a): treating the surfaces of silica nanoparticles dispersed in a first solvent with a reactive functional group-containing compound, while nanoparticles are being dispersed in the solvent, to thereby prepare a first solvent dispersion of reactive functional group-modified silica nanoparticles; step (b): replacing the first solvent dispersion's dispersion medium of reactive functional group-modified silica nanoparticles prepared in step (a) with a second solvent without drying of dispersion medium, and then reacting functional group-modified silica nanoparticles with dendrimer-forming monomer or hyperbranched polymer-forming monomer in the second solvent's presence so that dendrimer or hyperbranched polymer is added to reactive functional group, to thereby prepare dendrimer- or hyperbranched polymer-bound silica nanoparticles; step (c): mixing dendrimer- or hyperbranched polymer-bound silica nanoparticles prepared in step (b
    Type: Grant
    Filed: April 17, 2017
    Date of Patent: February 2, 2021
    Assignees: NISSAN CHEMICAL CORPORATION, TOKYO METROPOLITAN UNIVERSITY
    Inventors: Hiroyoshi Kawakami, Manabu Tanaka, Yuri Kameyama, Azusa Osawa, Tadayuki Isaji, Takamasa Kikuchi
  • Publication number: 20210024805
    Abstract: Provided are a chemical heat storage material having excellent cyclic durability and a method for producing the same. A chemical heat storage material includes: a surface layer formed of silica and/or calcium silicate; and calcium oxide particles with the surface layer.
    Type: Application
    Filed: March 12, 2019
    Publication date: January 28, 2021
    Applicants: SHIRAISHI CENTRAL LABORATORIES CO., LTD., TOKYO INSTITUTE OF TECHNOLOGY
    Inventors: Masahiko Tajika, Yukitaka Kato, Naoto Uchiyama, Hiroki Takasu
  • Publication number: 20210024694
    Abstract: A polymer compound selected from a homopolymer of (a) and a block copolymer of (b). (a) A homopolymer comprising a polyether segment having a side chain including a primary amine. (b) A block copolymer of a polyether segment having a side chain including a primary amine, and a poly(ethylene glycol) chain.
    Type: Application
    Filed: February 1, 2019
    Publication date: January 28, 2021
    Applicant: THE UNIVERSITY OF TOKYO
    Inventors: Horacio CABRAL, Satoshi UCHIDA, Takuya MIYAZAKI
  • Publication number: 20210028169
    Abstract: Aspects of the disclosure provide a method for forming a semiconductor apparatus. The method includes forming a first field-effect transistor (FET) that includes a first gate on a substrate of the semiconductor apparatus. The method includes forming a second FET that is stacked on the first FET along a direction substantially perpendicular to the substrate and includes a second gate. The method includes forming a first routing track and a second routing track that is electrically isolated from the first routing track. Each of the first and second routing tracks is provided on a routing plane stacked on the second FET along the direction. A first conductive trace configured to conductively couple the first gate of the first FET to the first routing track can be formed. A second conductive trace configured to conductively couple the second gate of the second FET to the second routing track can be formed.
    Type: Application
    Filed: September 30, 2020
    Publication date: January 28, 2021
    Applicant: Tokyo Electron Limited
    Inventors: Jeffrey Smith, Anton J. deVilliers, Kandabara N. TAPILY, Subhadeep KAL, Gerrit J. LEUSINK
  • Publication number: 20210027994
    Abstract: A shutter mechanism for opening and closing an opening of a cylindrical chamber of a substrate processing apparatus is provided. The shutter mechanism includes a valve body having a circumferential length of at least half of an inner circumference of the chamber, and two or more elevating mechanisms connected to a lower portion of the valve body and configured to vertically move the valve body.
    Type: Application
    Filed: July 20, 2020
    Publication date: January 28, 2021
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Suguru MOTEGI, Nobutaka SASAKI
  • Publication number: 20210027806
    Abstract: The present invention provides a recording method and a recording device in which information can be easily recorded even in a magnetic recording medium using epsilon iron oxide particles having a high coercive force as a magnetic recording material. A recording device of the invention applies an external magnetic field H0 that inclines magnetization of epsilon iron oxide particles to a particle dispersion element containing epsilon iron oxide particles, and irradiates the particle dispersion element with light that excites the magnetization. Accordingly, the recording device is capable of inverting magnetization that is not capable of being inverted only by the external magnetic field, in accordance with a synergetic effect between the inclination of the magnetization and the light excitation of the magnetization.
    Type: Application
    Filed: September 28, 2020
    Publication date: January 28, 2021
    Applicants: THE UNIVERSITY OF TOKYO, OSAKA UNIVERSITY, FUJIFILM Corporation
    Inventors: Shin-ichi OHKOSHI, Makoto NAKAJIMA, Masashi SHIRATA, Hiroaki DOSHITA
  • Publication number: 20210023231
    Abstract: The invention provides a bio-related substance bonded to a high-molecular-weight polyethylene glycol derivative that does not cause vacuolation of cells. The bio-related substance bonded to a degradable polyethylene glycol derivative is represented by the formula (A): wherein m is 1-7, n1 and n2 are each independently 45-682, p is 1-4, R is an alkyl group having 1-4 carbon atoms, Z is an oligopeptide with 2-8 residues composed of neutral amino acids excluding cysteine, Q is a residue of a compound having 2-5 active hydrogens, D is the bio-related substance, L1, L2, L3, L4 and L5 are each independently a single bond or a divalent spacer, and y is 1-40.
    Type: Application
    Filed: March 29, 2019
    Publication date: January 28, 2021
    Applicants: NOF CORPORATION, TOKYO INSTITUTE OF TECHNOLOGY
    Inventors: Hiroki YOSHIOKA, Masaki KAMIYA, Yuji YAMAMOTO, Midori HIRAI, Akiko SASAKI, Nobuhiro NISHIYAMA, Makoto MATSUI, Hiroyasu TAKEMOTO, Kazuki MIYAUCHI, Takahiro NOMOTO, Keishiro TOMODA
  • Publication number: 20210024929
    Abstract: Developed and provided is: a nucleic acid agent that is efficiently delivered to the central nervous system, to which drug delivery is inhibited by the blood brain barrier mechanism, and that provides an antisense effect to a target transcription product at the delivery site; and a composition containing such a nucleic acid agent. Provided is a double-stranded nucleic acid complex consisting of a first nucleic acid strand and a second nucleic acid strand that are annealed to each other; wherein the first nucleic acid strand hybridizes with part of a target transcription product and has an antisense effect on the target transcription product; and wherein the second nucleic acid strand includes a base sequence complementary to the first nucleic acid strand and is conjugated to a phosphatidylethanolamine or an analog thereof.
    Type: Application
    Filed: March 13, 2019
    Publication date: January 28, 2021
    Applicants: National University Corporation Tokyo Medical and Dental University, Takeda Pharmaceutical Company Limited
    Inventors: Takanori Yokota, Tetsuya Nagata, Hideki Furukawa, Yasuo Nakagawa, Takatoshi Yogo, Ryosuke Tokunoh, Shigekazu Sasaki, Kosuke Hidaka, Tomohiro Seki, Kenichi Miyata, Akio Uchida
  • Publication number: 20210027980
    Abstract: A plasma etching apparatus includes a chamber, a susceptor in the chamber, an electrostatic chuck provided on the susceptor, and a high frequency power supply for supplying a high frequency power for generating a plasma in the chamber. The plasma etching apparatus also includes a gas inlet port provided in the chamber and configured to supply an etching gas, and a ring disposed in an outer periphery of a substrate supported by the electrostatic chuck that is positioned over the susceptor. An inner diameter of the ring is larger than an outer diameter of the substrate. The ring is separately positioned at a separation distance over the susceptor. The substrate is etched by using the plasma generated by the high frequency power that is supplied by the high frequency power supply. The separation distance between the ring and the susceptor is adjustable when the substrate is etched.
    Type: Application
    Filed: October 12, 2020
    Publication date: January 28, 2021
    Applicant: Tokyo Electron Limited
    Inventors: Chishio KOSHIMIZU, Naoki MATSUMOTO, Satoshi TANAKA, Toru ITO
  • Publication number: 20210025060
    Abstract: An apparatus for processing a substrate is provided. The apparatus includes a processing apparatus and a controller. The processing apparatus includes a chamber. The controller includes a memory and a processor coupled to the memory. The memory stores computer-executable instructions for controlling the processor to control a process of the processing apparatus. The process includes first forming a first film in a first region of the substrate in the chamber by chemical vapor deposition. The process further includes second forming a second film in a second region of the substrate in the chamber by atomic layer deposition. The first forming and the second forming are performed without moving the substrate out of the chamber.
    Type: Application
    Filed: August 21, 2020
    Publication date: January 28, 2021
    Applicant: TOKYO ELECTRON LIMITED
    Inventor: Masahiro TABATA
  • Patent number: 10903084
    Abstract: First and second silicon containing films can be etched selectively against each other with high efficiency. A method includes preparing a processing target object within a chamber; etching the first silicon containing film of the processing target object by generating plasma of a processing gas within the chamber in a state that a temperature of the processing target object is set to a first temperature; and etching the second silicon containing film of the processing target object by generating the plasma of the processing gas within the chamber in a state that the temperature of the processing target object is set to a second temperature higher than the first temperature.
    Type: Grant
    Filed: April 19, 2019
    Date of Patent: January 26, 2021
    Assignee: TOKYO ELECTRON LIMITED
    Inventors: Taku Gohira, Sho Tominaga
  • Patent number: 10903049
    Abstract: A plasma processing apparatus 10 includes a chamber 17 in which an internal space is provided and a target object carried into the internal space is processed with plasma in the internal space; a high frequency power source 14 configured to supply a high frequency power for plasma generation within the chamber 17; a matching circuit 15 configured to match an impedance of the plasma within the chamber 17 with an impedance of the high frequency power source 14; a signal synchronizer 20 configured to calculate the impedance of the plasma within the chamber 17; a control amount calculator 12 configured to control a frequency and a magnitude of the high frequency power, and an impedance of the matching circuit 15 based on the impedance calculated by the signal synchronizer 20. Further, the signal synchronizer 20 and the control amount calculator 12 are provided on a single substrate 11.
    Type: Grant
    Filed: October 10, 2018
    Date of Patent: January 26, 2021
    Assignee: TOKYO ELECTRON LIMITED
    Inventor: Ryuta Higuchi
  • Patent number: 10901028
    Abstract: Provided is a substrate inspection method capable of accurately performing inspection. A wafer inspection device includes a chuck top on which a wafer having a semiconductor device formed thereon is mounted and a probe card disposed above the chuck top so as to face the chuck top. The probe card includes a plurality of contact probes protruding toward the wafer. When bringing the chuck top close to the probe card, a tubular expandable/contractible bellows extending downward from the probe card side so as to surround the contact probes is attracted to the chuck top via a lip seal before the contact probes come into contact with the semiconductor device.
    Type: Grant
    Filed: August 25, 2017
    Date of Patent: January 26, 2021
    Assignee: TOKYO ELECTRON LIMITED
    Inventors: Hiroshi Yamada, Jun Fujihara
  • Patent number: 10903083
    Abstract: There is provided a substrate processing method which includes: treating a substrate using a fluorine-containing gas; and exposing the substrate to a moisture-containing atmosphere.
    Type: Grant
    Filed: January 10, 2017
    Date of Patent: January 26, 2021
    Assignee: TOKYO ELECTRON LIMITED
    Inventors: Keiko Hada, Akitaka Shimizu, Koichi Nagakura, Mitsuhiro Tachibana
  • Patent number: 10901320
    Abstract: There is provided a method of developing an exposed resist film formed on a surface of a substrate to form a resist pattern, which includes: rotating the substrate about a rotation axis that extends in a direction perpendicular to the surface of the substrate that is horizontally supported; supplying a developing solution through a discharge hole positioned above the substrate onto the resist film such that the developing solution is widely spread on a surface of the resist film; and positioning a wetted part having a surface that faces the surface of the substrate, above a preceding region in the surface of the substrate, the preceding region being a region to which the developing solution is preferentially supplied through the discharge hole.
    Type: Grant
    Filed: September 7, 2018
    Date of Patent: January 26, 2021
    Assignee: TOKYO ELECTRON LIMITED
    Inventors: Tomohiro Iseki, Hirofumi Takeguchi, Yuichi Terashita
  • Patent number: 10903077
    Abstract: Embodiments are described herein that form silicon germanium nano-wires while reducing or eliminating erosion of nitride layers (e.g., masks and spacers) caused during selective etching of silicon with respect to silicon germanium during formation of silicon germanium nano-wires. oxide layers are used to protect nitride layers during formation of silicon germanium (SiGe) nano-wires. In particular, multilayer spacers including oxide/nitride/oxide layers are formed to protect the nitride layers during selective silicon etch processes that are used to form silicon germanium nano-wires, for example, for field effect transistors (FETs). The multilayer spacers allow for target levels of erosion to be achieved for the nitride layers.
    Type: Grant
    Filed: July 15, 2019
    Date of Patent: January 26, 2021
    Assignee: TOKYO ELECTRON LIMITED
    Inventors: Yusuke Yoshida, Christopher Catano, Christopher Talone, Nicholas Joy, Sergey Voronin
  • Patent number: 10903057
    Abstract: A temperature adjustment device includes a pedestal to receive a substrate thereon, a first temperature control unit to set a first medium at a first temperature, and a second temperature control unit to set a second medium at a second temperature that is higher than the first temperature. A pedestal flow passage is provided inside the pedestal to allow the first medium and the second medium to flow therethrough by switching between the first medium and the second medium. A first flow passage through which the first medium flowing from the pedestal flow passage is allowed to flow is provided. A second flow passage through which the second medium flowing from the pedestal flow passage is allowed to flow is provided. A heat pump is connected to the first flow passage and the second flow passage to transfer heat between the first medium and the second medium.
    Type: Grant
    Filed: September 16, 2016
    Date of Patent: January 26, 2021
    Assignee: Tokyo Electron Limited
    Inventor: Hideki Wakai
  • Patent number: 10903051
    Abstract: A method of performing impedance matching between a power supply section of a plasma processing apparatus and a chamber in the plasma processing apparatus is provided. The plasma processing apparatus includes multiple matchers, each configured to perform impedance matching between the power supply section and the chamber, and the power supply section is configured to output superimposed voltage in which radio frequency voltage is superimposed on pulsating DC voltage. According to the method, the superimposed voltage from the power supply section is applied to the chamber, through one of the provided matchers, and the matcher through which the superimposed voltage is applied to the chamber is then switched in accordance with a state of the pulsating DC voltage.
    Type: Grant
    Filed: April 13, 2020
    Date of Patent: January 26, 2021
    Assignee: Tokyo Electron Limited
    Inventor: Masato Kon
  • Patent number: 10903085
    Abstract: There is provided a method for etching an organic region of a substrate. In the method, an organic film is formed on a surface in a chamber of a plasma processing apparatus. The surface extends out around a region where the substrate is to be disposed in the chamber of the plasma processing apparatus, and the organic region is etched by chemical species from plasma in the chamber.
    Type: Grant
    Filed: April 22, 2019
    Date of Patent: January 26, 2021
    Assignee: TOKYO ELECTRON LIMITED
    Inventors: Ryuichi Asako, Masahiro Tabata, Takao Funakubo
  • Patent number: 10903081
    Abstract: A substrate processing method is provided for performing a plating processing on a substrate having, on a surface thereof, an impurity-doped polysilicon film containing a high concentration of impurities. The substrate processing method includes forming a catalyst layer by supplying, onto the substrate, an alkaline catalyst solution containing a complex of a palladium ion and a monocyclic 5- or 6-membered heterocyclic compound having one or two nitrogen atoms as a heteroatom; and forming a plating layer through electroless plating by supplying a plating liquid onto the substrate after the forming of the catalyst layer.
    Type: Grant
    Filed: December 29, 2017
    Date of Patent: January 26, 2021
    Assignee: TOKYO ELECTRON LIMITED
    Inventors: Tomohisa Hoshino, Keiichi Fujita, Masato Hamada