Patents Assigned to Tokyo
  • Patent number: 10896842
    Abstract: A manufacturing method of sample table is provided. The sample table holds a semiconductor wafer on which a plasma process is to be performed, and the manufacturing method includes: preparing an adsorption plate that has a contact surface on which a lapping process has been performed and surface-contacting the semiconductor wafer, and that adsorbs the semiconductor wafer; and preparing a supporting substrate which has a recess surface to which a noncontact surface of the adsorption plate is adhered, wherein a difference between a depth of an approximate center portion of the recess surface and a depth of a distant portion spaced apart from the approximate center portion is larger than a difference between a thickness of the adsorption plate at a portion contacting the approximate center portion and a thickness of the adsorption plate at a portion contacting the distant portion.
    Type: Grant
    Filed: April 30, 2018
    Date of Patent: January 19, 2021
    Assignee: TOKYO ELECTRON LIMITED
    Inventors: Wataru Yoshikawa, Kazuki Moyama, Nobuyuki Okayama, Kenji Sudou, Yasuhiro Otsuka
  • Patent number: 10897808
    Abstract: A filter device includes a plurality of coils of which central axes are spaced apart from one another and in parallel to one another and a plurality of ground members spaced apart from one another and extending in parallel to the central axes of the coils outside of the coils. Each of the coils is spaced apart from another coil closest thereto by a first distance. Each of the ground members is spaced apart from a coil closest thereto by a second distance. The number of ground members spaced apart from each of the coils by the second distance is the same.
    Type: Grant
    Filed: November 3, 2017
    Date of Patent: January 19, 2021
    Assignee: TOKYO ELECTRON LIMITED
    Inventors: Nozomu Nagashima, Naohiko Okunishi
  • Patent number: 10894270
    Abstract: A liquid jet discharge device includes: a narrow tube having a tube shaped body that is open at both ends, and in which a discharge liquid being disposed therein, the discharge liquid contacting at least at an inner face of the narrow tube at a contact angle of less than 90 degrees; a container in which a transmission medium being disposed at a base side thereof where one end of the narrow tube is disposed, so as to enable pressure to be transmitted to the discharge liquid; an adjustment mechanism that causes a liquid surface of the discharge liquid inside the narrow tube and an interface of the transmission medium outside the narrow tube and inside the container to be staggered in position along an axial direction of the narrow tube; and a generation mechanism that generates a pressure wave in the transmission medium such that a liquid jet is discharged from the discharge liquid inside the narrow tube.
    Type: Grant
    Filed: May 13, 2016
    Date of Patent: January 19, 2021
    Assignee: NATIONAL UNIVERSITY CORPORATION TOKYO UNIVERSITY OF AGRICULTURE AND TECHNOLOGY
    Inventors: Yoshiyuki Tagawa, Hajime Onuki
  • Patent number: 10897059
    Abstract: The problem of the present invention is to provide a sulfide solid electrolyte material with favorable reduction resistance. The present invention solves the problem by providing a sulfide solid electrolyte material having a peak at a position of 2?=30.26°±1.00° in X-ray diffraction measurement using a CuK? ray, and having a composition of Li(4?x?4y)Si(1?x+y)P(x)S(4?2a?z)O(2a+z) (a=1?x+y, 0.65?x?0.75, ?0.025?y?0.1, ?0.2?z?0).
    Type: Grant
    Filed: July 1, 2016
    Date of Patent: January 19, 2021
    Assignees: TOKYO INSTITUTE OF TECHNOLOGY, TOYOTA JIDOSHA KABUSHIKI KAISHA
    Inventors: Ryoji Kanno, Satoshi Hori, Yuki Kato
  • Patent number: 10896824
    Abstract: Methods are disclosed that illuminate etch solutions to provide controlled etching of materials. An etch solution (e.g., gaseous, liquid, or combination thereof) with a first level of reactants is applied to the surface of a material to be etched. The etch solution is illuminated to cause the etch solution to have a second level of reactants that is greater than the first level. The surface of the material is modified (e.g., oxidized) with the illuminated etch solution, and the modified layer of material is removed. The exposing and removing can be repeated or cycled to etch the material. Further, for oxidation/dissolution embodiments the oxidation and dissolution can occur simultaneously, and the oxidation rate can be greater than the dissolution rate. The material can be a polycrystalline material, a polycrystalline metal, and/or other material. One etch solution can include hydrogen peroxide that is illuminated to form hydroxyl radicals.
    Type: Grant
    Filed: February 27, 2019
    Date of Patent: January 19, 2021
    Assignee: Tokyo Electron Limited
    Inventors: Omid Zandi, Jacques Faguet
  • Patent number: 10897050
    Abstract: An object of the present disclosure is to provide a fuel cell separator having a low contact resistance due to a tin oxide film and having an excellent corrosion resistance. An embodiment is a method for manufacturing a fuel cell separator including a stainless steel substrate. The method includes forming the tin oxide film on a surface of the stainless steel substrate; and attaching phosphoric acid or phosphate to at least a defective portion in the tin oxide film.
    Type: Grant
    Filed: June 18, 2019
    Date of Patent: January 19, 2021
    Assignees: TOYOTA JIDOSHA KABUSHIKI KAISHA, TOKYO UNIVERSITY OF SCIENCE FOUNDATION
    Inventors: Satoshi Takata, Masayuki Itagaki
  • Publication number: 20210010120
    Abstract: The present invention provides a shape-memory alloy including a Au—Cu—Al alloy having 20 at % or more and 40 at % or less Cu and 15 at % or more and 30 at % or less Al, with the balance being Au and inevitable impurities. The shape-memory alloy has a Vickers hardness of 360 Hv or less. The Au—Cu—Al alloy of the present invention is an alloy capable of developing both biocompatibility and a shape-memory effect, and further capable of achieving artifactlessness in a magnetic environment. The Au—Cu—Al alloy can be produced by heat-treating a clad material formed of a combination of a hollow material made of a Au—Cu alloy and a core material made of metallic Al at 500° C. or more and 700° C. or less.
    Type: Application
    Filed: February 28, 2019
    Publication date: January 14, 2021
    Applicants: TOKYO INSTITUTE OF TECHNOLOGY, TANAKA KIKINZOKU KOGYO K.K.
    Inventors: Hideki HOSODA, Akira UMISE, Kenji GOTO
  • Publication number: 20210010000
    Abstract: An object of the invention is to provide a low toxicity antisense nucleic acid medicine that can modulate expression of a target transcriptional product in the central nervous system and other sites of a subject. Provided is a low toxicity composition for modulating expression of a target transcriptional product in a site such as the central nervous system of a subject, having a nucleic acid complex formed by annealing together a first nucleic acid strand having an antisense oligonucleotide region with respect to the target transcriptional product, and a second nucleic acid strand having a complementary region that is complementary to at least part of the first nucleic acid strand.
    Type: Application
    Filed: March 19, 2019
    Publication date: January 14, 2021
    Applicant: NATIONAL UNIVERSITY CORPORATION TOKYO MEDICAL AND DENTAL UNIVERSITY
    Inventors: Takanori YOKOTA, Tetsuya NAGATA, Kotaro YOSHIOKA
  • Publication number: 20210012936
    Abstract: There is provided a magnetic material that has an excellent electromagnetic wave absorption performance in a wide frequency range even under low temperature and high temperature environments and that ensures the absorption performance, and provided a magnetic material as a mixture of a magnetic material having positive slope of change in coercive force dependent on temperature, and a magnetic material having negative slope of change in coercive force dependent on temperature.
    Type: Application
    Filed: February 14, 2019
    Publication date: January 14, 2021
    Applicants: The University of Tokyo, DOWA ELECTRONICS MATERIALS CO., LTD.
    Inventors: Shin-ichi OHKOSHI, Asuka NAMAI, Marie YOSHIKIYO, Masahiro GOTOH, Toshihiko UEYAMA, Takayuki YOSHIDA
  • Publication number: 20210013015
    Abstract: An apparatus includes a plasma processing container; a workpiece placement table disposed in the plasma processing container; a dielectric member having a facing surface that faces the workpiece placement table; an antenna provided on a surface of the dielectric member opposite to the facing surface and configured to introduce an induced electric field for plasma excitation into the plasma processing container via the dielectric member; an electromagnet group disposed along an outer circumference of the plasma processing container and configured to form a magnetic field in the plasma processing container; and a controller configured to control magnitudes of electric currents flowing through respective electromagnets of the electromagnet group differently from each other, to generate a magnetic gradient along a circumferential direction in the magnetic field that exists only in an outer circumferential space in the plasma processing container.
    Type: Application
    Filed: September 24, 2020
    Publication date: January 14, 2021
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Kazuya NAGASEKI, Shinji HIMORI, Mitsunori OHATA
  • Publication number: 20210013111
    Abstract: A method for microfabrication of a three dimensional transistor stack having gate-all-around field-effect transistor devices. The channels hang between source/drain regions. Each channel is selectively deposited with layers of materials designed for adjusting the threshold voltage of the channel. The layers may be oxides, high-k materials, work function materials and metallization. The three dimensional transistor stack forms an array of high threshold voltage devices and low threshold voltage devices in a single package.
    Type: Application
    Filed: July 9, 2020
    Publication date: January 14, 2021
    Applicant: Tokyo Electron Limited
    Inventors: Jeffrey SMITH, Kandabara TAPILY, Lars LIEBMANN, Daniel CHANEMOUGAME, Mark GARDNER, H. Jim FULFORD, Anton J. DEVILLIERS
  • Publication number: 20210013016
    Abstract: A processing method includes a), b), and c). The a) includes measuring a load imposed on a lift pin when the lift pin lifts a processed substrate from an electrostatic chuck holding the substrate. The b) includes calculating a difference of the load is calculated based on the measured load and an initial load imposed on the lift pins when the lift pins lift the substrate without any residual adsorption force between the electrostatic chuck and the substrate. The c) includes exposing a surface of the electrostatic chuck to first plasma when the difference of the load is equal to or greater than a preset first threshold.
    Type: Application
    Filed: July 8, 2020
    Publication date: January 14, 2021
    Applicant: Tokyo Electron Limited
    Inventor: Takashi TSUTO
  • Publication number: 20210013012
    Abstract: A performance calculation method is provided. In the performance calculation method, shipment inspection data of multiple flow rate controllers are acquired. Further, first performance values indicating, as deviation values, performance of the flow rate controllers are calculated based on the acquired shipment inspection data and first coefficients for items indicating the performance of the flow rate controllers. Further, second performance values indicating, as deviation values, performance of a processing apparatus using the flow rate controllers are calculated based on the calculated first performance values and second coefficients for items indicating the performance of the processing apparatus.
    Type: Application
    Filed: July 7, 2020
    Publication date: January 14, 2021
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Atsushi Sawachi, Norihiko Amikura
  • Publication number: 20210011763
    Abstract: In a substrate processing device, a technique that achieves OR transfer satisfying a specified condition is provided. The substrate processing device includes an identifying unit configured to refer to usage states of a plurality of process modules at process time slots to identify one or more process modules that can execute processes of substrates included in a control job to be processed among process modules that can be used at the process time slots, a calculating unit configured to assign the processes of the substrates to respective process time slots of the one or more process modules identified by the identifying unit to calculate a time duration from a start to an end of the processes of the substrates, and a determining unit configured to determine start timing of starting the processes of the substrates so that the time duration calculated by the calculating unit satisfies a specified condition.
    Type: Application
    Filed: June 20, 2019
    Publication date: January 14, 2021
    Applicant: Tokyo Electron Limited
    Inventor: Ken WATANABE
  • Publication number: 20210011304
    Abstract: Provided are stereoscopic eyeglasses capable of reducing visual fatigue in binocular stereoscopic display by a simple configuration. In stereoscopic eyeglasses, in order to expand a tolerance of match between vergence and accommodation enabling comfortable stereovision in eyeglasses-using stereoscopic display, wide-focus lenses ranging in focal length are incorporated so as to overlap optical filters in light transmission directions, and accordingly, visual fatigue to be caused by vergence-accommodation conflict during stereoscopic image observation is reduced.
    Type: Application
    Filed: June 7, 2019
    Publication date: January 14, 2021
    Applicants: National University Corporation Tokyo University of Agriculture and Technology, Itoh Optical Industrial Co., Ltd.
    Inventors: Yasuhiro Takaki, Yasushi Miyajima
  • Publication number: 20210013107
    Abstract: Three-dimensional integration can overcome scaling limitations by increasing transistor density in volume rather than area. To provided gate-all-around field-effect-transistor devices with different threshold voltages and doping types on the same substrate, methods are provided for growing adjacent nanosheet stacks having channels with different doping profiles. In one example, a first nanosheet stack is formed having channels with first doping characteristics. Then the first nanosheet stack is etched, and a second nanosheet stack is formed in plane with the first nanosheet stack. The second nanosheet stack has channels with different doping characteristics. This process can be repeated for additional nanosheet stacks. In another example, the formation of the nanosheet stacks with channels having different doping characteristics is performed by restricting layer formation to predefined locations using a patterned layer (e.g.
    Type: Application
    Filed: October 28, 2019
    Publication date: January 14, 2021
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Mark Gardner, Jim Fulford
  • Publication number: 20210013326
    Abstract: Microfabrication of a collection of transistor types on multiple transistor planes in which both HV (high voltage transistors) and LV (low-voltage transistors) stacks are designed on a single substrate. As high voltage transistors require higher drain-source voltages (Vds), higher gate voltages (Vg), and thus higher Vt (threshold voltage), and relatively thicker 3D gate oxide thicknesses, circuits made as described herein provide multiple different threshold voltages devices for both low voltage and high voltage devices for NMOS and PMOS, with multiple different gate oxide thickness values to enable multiple transistor planes for 3D devices.
    Type: Application
    Filed: December 18, 2019
    Publication date: January 14, 2021
    Applicant: Tokyo Electron Limited
    Inventors: Mark I. Gardner, H. Jim Fulford
  • Patent number: 10890845
    Abstract: A chemically amplified positive-type photosensitive resin composition capable of suppressing occurrence of footing in which the width of the bottom becomes narrower than that of the top in a nonresist section, denaturation of the surface of the metal substrate, and occurrence of a development residue, when a resist pattern serving as a template for a plated article is formed on a metal surface of the substrate having the metal surface by using the composition; a method for manufacturing a substrate with a template by using the composition; and a method for manufacturing a plated article using the substrate with the template. A mercapto compound having a specific structure is contained in the chemically resin composition which includes an acid generator, and a resin whose solubility in alkali increases under the action of acid.
    Type: Grant
    Filed: April 27, 2017
    Date of Patent: January 12, 2021
    Assignee: Tokyo Ohka Kogyo Co., Ltd.
    Inventors: Kazuaki Ebisawa, Yuta Yamamoto
  • Patent number: 10890520
    Abstract: A flow cytometer including a flow cell in which an imaging object flows; a laser beam irradiator configured to radiate laser beam; a camera including an image sensor of N×M pixels; and an optical system configured to introduce the laser beam from the laser beam irradiator to imaging range of flow cell and to introduce signal light, such as transmitted, reflected or scattered light, from imaging range of flow cell, to camera. Optical system includes a mirror device that is placed on a Fourier plane of imaging optical system, that has at least one mirror specularly reflecting the signal light, and that is driven and rotated in conjunction with a flow in flow cell, such that each part of an image formed by the signal light is introduced into an identical pixel of the image sensor for at least a predetermined time period from a predetermined timing.
    Type: Grant
    Filed: September 5, 2017
    Date of Patent: January 12, 2021
    Assignee: THE UNIVERSITY OF TOKYO
    Inventors: Keisuke Goda, Yasuyuki Ozeki, Hideharu Mikami
  • Patent number: 10890528
    Abstract: Provided are a fluorescent testing system, a molecular testing method, and a fluorescent testing method that can avoid enlargement and complication. A fluorescent testing system (1) includes: an excitation light source (23) that radiates excitation light (L1) to protein to which a fluorescent probe is added; a silicon integrated circuit (10) including a photon detection unit (13) that detects light by a photodiode (12); a holding layer (30) including a microwell (31) that is provided above the photodiode (12) and holds the protein to which the fluorescent probe is added; and a control unit (24) that causes the excitation light source (23) to radiate the excitation light (L1) to the protein which. is held and to which the fluorescent probe is added and causes the photon detection unit (13), after extinguishment of the excitation light (L1), to detect fluorescence emitted from the protein to which the fluorescent probe is added.
    Type: Grant
    Filed: July 20, 2017
    Date of Patent: January 12, 2021
    Assignees: SHARP KABUSHIKI KAISHA, The University of Tokyo
    Inventors: Kunihiko Iizuka, Yoshihisa Fujimoto, Soo-Hyeon Kim, Teruo Fujii