Abstract: A circuit board module includes a circuit board and a heat-dissipating device. The circuit board includes a ceramic substrate, and a circuit pattern formed on a surface of the ceramic substrate. The circuit board is sinter-bonded to a main body of the heat-dissipating device. A method of making the circuit board module is also disclosed.

Abstract: A circuit board module includes a circuit board and a heat-dissipating device. The circuit board includes a ceramic substrate, and a circuit pattern formed on a surface of the ceramic substrate. The circuit board is sinter-bonded to a main body of the heat-dissipating device. A method of making the circuit board module is also disclosed.

Abstract: A ceramic circuit board for use in packaging an electronic element includes a ceramic-copper plate, and a heat-dissipating unit that is adapted for dissipating heat from the electronic element. The ceramic-copperplate includes a ceramic substrate that has opposite first and second surfaces, and a through-hole formed through the first and second surfaces, a top copper pattern that overlies the first surface of the ceramic substrate and that has at least two conducting portions spaced apart from each other, and a bottom copper layer that underlies the second surface of the ceramic substrate. The heat-dissipating unit includes a heat-dissipating layer that is disposed in the through-hole of the ceramic substrate above the bottom copper layer and that has a thermal conductivity larger than that of the ceramic substrate. A method of making the ceramic circuit board is also disclosed.

Abstract: The invention provides a semiconductor package structure, comprising: a substrate having a first surface and a second surface; a first conductive layer plated on the first surface; a semiconductor element attached to the first conductive layer on the first surface of the substrate for electrically connecting; a second conductive layer plated on the first surface and surrounded the semiconductor element and the first conductive layer, wherein the height of the second conductive layer is higher than the first conductive layer; and a lid attached to the top of the second conductive layer for sealing the semiconductor element.

Abstract: The present invention provides a solar cell flip chip package structure, comprising: a substrate having a first surface, a second surface and an opening extending from the first surface to the second surface; a conducting layer disposed on the first surface of the substrate; a solar cell flip chip bonded on the conducting layer; a transparent layer attached on the second surface of the substrate; and a storage space formed between the opening extending from the first surface to the second surface, the solar cell flip chip and the transparent layer.

Abstract: A packaging substrate device includes: a first laminate including a first ceramic substrate and a first copper pattern disposed on an upper surface of the first ceramic substrate; and a second laminate disposed over the first copper pattern and including a second ceramic substrate, a second copper pattern that is disposed on an upper surface of the second ceramic substrate, and a through hole extending through the second ceramic substrate and the second copper pattern to expose a copper portion of the first copper pattern. A light emitting semiconductor die can be mounted on the copper portion within the through hole. Efficient heat dissipation can be achieved through the first laminate.

Abstract: An image sensor module includes a substrate, a circuit layer, a flip chip, an insulating layer, and a conducting layer. The substrate has at least one transparent area and defines a first surface and a second surface. The circuit layer is provided on the first surface of the substrate. The flip chip is connected to the circuit layer. The insulating layer substantially encases the flip chip and a part of the circuit layer, wherein the insulating layer has at least one groove at a lateral side of said insulating layer thereof each provided with a metal layer. The conducting layer is provided on a top surface of the insulating layer, wherein the conducting layer is electrically connected to the circuit layer via the metal layer.

Abstract: A ceramic plate with reflective film and method of manufacturing the same are provided. The ceramic plate with reflective film at least comprises a ceramic substrate and a reflective film. The reflective film at least includes a glass layer and a metal film with metal crystals. Each of the metal crystals possesses a particular diameter for providing high infrared reflectivity with a particular wavelength.

Abstract: An image sensing device and packaging method thereof is disclosed. The packaging method includes the steps of a) providing an image sensing module, having a light-receiving region exposed, on a first substrate; b) forming a plurality of first contacts around the light-receiving region on the image sensing module; c) providing a second substrate, having a plurality of second contacts corresponding to the plurality of first contacts and an opening for allowing the light-receiving region to be exposed while the second substrate is placed over the image sensing module, the plurality of second contacts being disposed around the opening; d) connecting the plurality of first contacts and the plurality of second contacts; and e) disposing a transparent lid above the light-receiving region, on a side of the second substrate which is opposite to the plurality of second contacts.

Abstract: An image sensing device and a packaging method thereof is disclosed. The packaging method includes the steps of providing an adhesive layer; placing a substrate, having an opening, on the adhesive layer; disposing an image sensor within the opening on the adhesive layer; adding a filler between the image sensor and the substrate; connecting the image sensor and the substrate via a plurality of bonding wires; and removing the adhesive layer.

Abstract: A pin grid array package having a substrate formed from a ceramics containing a 90% or higher alumina composition. The substrate has an palladium-silver layer on an upper surface thereof with a silver layer further provided on the Pd-Ag layer and a gold bonding pad on a outer periphery of a cavity of the substrate so as to provide electrical connection between pins and chip. The Ag layer is covered with a dielectric layer to prevent contamination from moisture.