Patents Assigned to Trio Kabushiki Kaisha
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Patent number: 4223237Abstract: A trigger pulse forming circuit comprising a first power supply; a second power supply whose voltage is less than that of the first power supply, a differential amplifier including a first transistor whose operating voltage is supplied from the first power supply and a second transistor whose operating voltage is supplied from a second power supply, at least the first transistor being adapted for application thereto of an input pulse signal; a load resistor connected to an output terminal of the first transistor; an integrating circuit connected to an output terminal of the second transistor; and a third transistor whose base and collector are connected respectively to opposite ends of the integrating circuit and its emitter is connected to the output terminal of the first transistor whereby the trigger pulse output is obtained from the output terminal of the first transistor.Type: GrantFiled: December 8, 1978Date of Patent: September 16, 1980Assignee: Trio Kabushiki KaishaInventors: Tsuneo Yamada, Yukihiko Miyamoto
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Patent number: 4216437Abstract: Circuitry for protecting the output transistors in a double power source, single ended, push-pull amplifier when a reactive load is employed, the load is short circuited, the transistors are overdriven, etc. Various embodiments are described for effecting the foregoing.Type: GrantFiled: October 11, 1978Date of Patent: August 5, 1980Assignee: Trio Kabushiki KaishaInventor: Kaku Sakaida
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Patent number: 4212490Abstract: A head shell for pick-up arms and method of making same comprising a flat part for mounting a cartridge formed by machine-pressing a part of a tubular member and a connector mounted at the opening of the remaining tubular part.Type: GrantFiled: September 13, 1978Date of Patent: July 15, 1980Assignee: Trio Kabushiki KaishaInventors: Mitsuyoshi Morinaga, Yasuo Kishida
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Patent number: 4212470Abstract: A head shell for pick-up arms and method of making same comprising a flat part for mounting a cartridge formed by machine-pressing a part of a tubular member and a connector mounted at the opening of the remaining tubular part.Type: GrantFiled: September 13, 1978Date of Patent: July 15, 1980Assignee: Trio Kabushiki KaishaInventor: Mitsuyoshi Morinaga
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Patent number: 4211356Abstract: A package and a blank for forming the package, the blank having buffer blocks so attached thereto as to facilitate the placement of an article within the package and the protection of the article once the package is closed.Type: GrantFiled: October 17, 1978Date of Patent: July 8, 1980Assignee: Trio Kabushiki KaishaInventors: Yoichiro Tsuchiya, Kazuhiro Kyoya
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Patent number: 4209714Abstract: A logarithmic amplifier comprising a common-emitter type transistor amplifier circuit with an emitter resistor and a collector load. A bias voltage is applied to the base of the transistor through a diode so that the overall input-output transfer characteristic of the amplifier exhibits a logarithmic characteristic for a relatively wide range of input signals. A cascade connection of several of the basic amplifier circuits enlarges the dynamic range over which a logarithmic transfer characteristic is achieved.Type: GrantFiled: June 13, 1977Date of Patent: June 24, 1980Assignee: Trio Kabushiki KaishaInventor: Yukihiko Miyamoto
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Patent number: 4205272Abstract: A phase-locked loop (PLL) circuit and a synthesizer tuner incorporating the PLL circuit where a second DC control signal is applied to the PLL voltage controlled oscillator to reduce the phase error output signal from the PLL phase detector to near zero volts and thereby improve the performance of the voltage controlled oscillator and the S/N ratio of the tuner. Various circuits are disclosed for deriving the above second DC control signal. Further improvement in the S/N ratio is effected by switching in a narrow capture range for the PLL circuit when the desired signal is received and when the PLL phase detector output is operated near zero volts. Also when the station is changed, detuning is detected to switch in a broader capture range.Type: GrantFiled: April 13, 1978Date of Patent: May 27, 1980Assignee: Trio Kabushiki KaishaInventor: Morio Kumagai
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Patent number: 4202550Abstract: Improved lead wires for use with a stereo record playback system where at least a pair of left channel wires and at least a pair of right channel wires extend from a pick-up device through a tone arm to a stereo amplifier, the lead wires including a ground wire and the left and right channel wires, the ground wire being disposed between the left channel wires and the right channel wires to provide electrical isolation therebetween and the ground wire and left and right channel wires being bonded together as a single unit so that the electrical isolation is implemented within the tone arm without the addition of undue weight to the arm. The right channel wires may be twisted together as may the left channel wires. The ground wire and left and right ground wires may all be separated and unbonded from one another at least at the area of the pivot of the tone arm to facilitate rotation thereof.Type: GrantFiled: April 13, 1978Date of Patent: May 13, 1980Assignee: Trio Kabushiki KaishaInventor: Mitsuyoshi Morinaga
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Patent number: 4199732Abstract: An amplifying circuit comprising an input terminal to which an alternating current signal is applied; a first transistor; a second transistor where one of the first and second transistors is a NPN transistor and the other is a PNP transistor; an output terminal to which is connected the respective collectors of the first and second transistors means for operating the second transistor as a constant current source; and connecting means for connecting the alternating current signal at the input terminal to the respective bases of the first and second transistors where the connecting means includes a capacitor connected between the input terminal and the base of the second transistor to thereby connect to the second transistor substantially only those frequencies of the alternating current signal which are at least as high as the cut-off frequency of the first transistor although frequencies below the cut-off frequency may also be coupled to the second transistor in a further embodiment of this invention.Type: GrantFiled: May 31, 1978Date of Patent: April 22, 1980Assignee: Trio Kabushiki KaishaInventor: Tatsuhiko Okuma
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Patent number: 4194166Abstract: In a differential amplifier having a current mirror circuit, the improvement where the collectors of a pair of transistors comprising the current mirror circuit are respectively connected to the bases of a pair of transistors of polarity reverse that of the current mirror transistors, the collectors of the reversed polarity transistors are connected to a power supply, the emitters of the reversed polarity transistors are connected to corresponding active elements of the differential amplifier, and resistors are respectively connected between the bases and emitters of the reversed polarity transistors.Type: GrantFiled: February 1, 1978Date of Patent: March 18, 1980Assignee: Trio Kabushiki KaishaInventors: Kazumasa Sakai, Hiroshi Watanuki
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Patent number: 4194087Abstract: Circuitry for generating from an input signal having leading and trailing edges at least two output control signals where the leading and trailing edges of the first one of the two output control signals respectively precede and follow the leading and trailing edges of the second one of the two output control signals, the circuitry comprising a first transistor responsive to the input signal; time constant circuit means having a predetermined time constant connected to the first transistor; a second and third transistors responsive to the first transistor and the time constant circuit means; bias means for so establishing different operating voltages for the second and third transistors that, upon application of the input signal to the first transistor, the first and second output control signals are respectively outputted by second and third transistors due to the fact that they are actuated at different times by the output signal from the first transistor and the time constant circuit depending on whether tType: GrantFiled: May 8, 1978Date of Patent: March 18, 1980Assignee: Trio Kabushiki KaishaInventor: Kaku Sakaida
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Patent number: 4182963Abstract: A pulse shaping circuit comprising a difference amplifier having an input terminal for receiving an input pulse to be shaped and first and second output terminals, an integration circuit connected to the second output terminal, and an AND circuit connected to the first output terminal and the integration circuit for developing an output pulse corresponding to the shaped input pulse.Type: GrantFiled: December 12, 1977Date of Patent: January 8, 1980Assignee: Trio Kabushiki KaishaInventors: Tsuneo Yamada, Yukihiko Miyamoto
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Patent number: 4180777Abstract: A tuning meter circuit for use with a pulse count FM demodulator of an FM receiver.Type: GrantFiled: December 12, 1977Date of Patent: December 25, 1979Assignee: Trio Kabushiki KaishaInventors: Tsuneo Yamada, Yukihiko Miyamoto
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Patent number: 4158179Abstract: An amplifier circuit having an input adapted to receive a signal to be amplified from a signal source, at least two sets of combined amplifying transistors and associated power sources for the amplifying transistors, the two sets constituting first and second amplifying stages, a switching transistor for automatically switching the amplifying operation of the amplifier circuit from the first amplifying stage to the second amplifying stage depending upon the amplitude of the input signal to the amplifier and a load to which the amplifying transistors are connected in parallel.Type: GrantFiled: April 19, 1977Date of Patent: June 12, 1979Assignee: Trio Kabushiki KaishaInventors: Kazumasa Sakai, Tatsuhiko Okuma
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Patent number: 4153879Abstract: A switch-off shock muting circuit for use in an AM receiver comprising a muting element disposed in a signal transmission path extending from the antenna through the demodulation and low frequency amplifying sections to the speaker of the receiver, a power switch and control switching means interlocked with the power switch, the control switching means being operated at an earlier time than the turning off of the power switch to thereby control the muting element, whereby spark noise caused by the power switch is prevented by controlling the muting element from the control switching means to thereby interrupt the signal transmission line earlier than the turning off of the power switch.Type: GrantFiled: August 8, 1977Date of Patent: May 8, 1979Assignee: Trio Kabushiki KaishaInventor: Kaku Sakaida
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Patent number: 4152662Abstract: In a preamplifier having integrated circuitry, the improvement where the active elements of the first stage amplification of the preamplifier and the resistor which establishes the current flowing through these active elements are mounted on the outside of the integrated circuitry and the connecting terminals for the active elements and resistor are disposed with the remaining preamplifier components inside the integrated circuitry.Type: GrantFiled: February 1, 1978Date of Patent: May 1, 1979Assignee: Trio Kabushiki KaishaInventors: Kazumasa Sakai, Hiroshi Watanuki
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Patent number: 4147986Abstract: An AM-FM receiver has switching elements such as field effect transistors inserted in a signal path of the FM circuit. A switch for applying bias voltage to the AM or FM front end circuit is arranged to operate synchronously with switching of the bias voltage to the switching elements. A time constant circuit comprising a series-connected resistor and a capacitor is inserted between the switch and the switching elements to delay application of the bias voltage to the switching elements only when the switch is thrown to bias the switching elements in order to suppress shock noises during AM-FM switching operation.Type: GrantFiled: December 17, 1976Date of Patent: April 3, 1979Assignee: Trio Kabushiki KaishaInventor: Kaku Sakaida
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Patent number: 4146111Abstract: A speaker system comprising a speaker cabinet having a forward baffle plate, two side plates and a rear plate, a passive diaphragm, a speaker mounted in the baffle plate of the speaker cabinet, an opening disposed in the baffle plate next to the speaker as an outlet for the sound radiated from the passive diaphragm, a dividing plate slantedly disposed between the baffle plate and the rear plate of the speaker cabinet, the dividing plate dividing the speaker cabinet into a first part including the speaker and a second part including the opening, the passive diaphragm being mounted in the dividing plate.Type: GrantFiled: January 12, 1977Date of Patent: March 27, 1979Assignee: Trio Kabushiki KaishaInventors: Yutaka Mae, Shiro Iwakura, Sigeyuki Koga, Hideki Ogawa, Hideaki Kanda
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Patent number: 4146847Abstract: Power limiting circuitry for use with a power amplifier, the power amplifier having (a) a power supply voltage source connected thereto and (b) a load impedance, the power limiting circuitry comprising detecting means for detecting the magnitude of the load impedance; and control means responsive to the detecting means for controlling the magnitude of the power supply voltage applied to the power amplifier; means for sensing the temperature at a predetermined point in the power amplifier and generating an output signal when the temperature exceeds a predetermined amount; and AND circuit means responsive to the detecting means and the temperature sensing means for actuating the control means in response thereto.Type: GrantFiled: October 28, 1977Date of Patent: March 27, 1979Assignee: Trio Kabushiki KaishaInventors: Kazumasa Otao, Kaku Sakaida
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Patent number: 4140928Abstract: A monostable multivibrator including a gate circuit, a time constant circuit, and an inverter circuit. An input signal to the gate circuit causes the time constant circuit which preferably includes a resistor and a capacitor to charge or discharge. A signal derived from the time constant circuit is applied to an input bias circuit including an emitter follower type transistor circuit associated with a differential amplifier within the inverter circuit to control the duration of the monostable output pulse.Type: GrantFiled: June 13, 1977Date of Patent: February 20, 1979Assignee: Trio Kabushiki KaishaInventor: Yukihiko Miyamoto