Abstract: A switching circuit is described having an input stage having an input referred offset voltage associated therewith. An output stage has an output offset voltage associated therewith which is due at least in part to the input referred offset associated with the input stage. Offset cancellation circuitry is operable to cancel a portion of the input referred offset voltage before switching of the output stage is enabled thereby resulting in cancellation of the portion of the output offset voltage after switching of the output stage begins. The offset cancellation circuitry is further operable to release the input referred offset voltage after switching of the output stage begins thereby allowing the output offset voltage to drift.

Abstract: An amplifier having output switch circuitry is described. A sense resistor is operable to transmit an output current associated with the output switch circuitry. Low-voltage circuitry is operable to provide a drive signal to the output switch circuitry. Isolation circuitry is operable to provide DC isolation between the low-voltage circuitry and the output switch circuitry. Current sensing circuitry is directly connected to the sense resistor and is operable to sense the output current in the sense resistor and generate a fault signal in response to an overcurrent condition. The fault signal is characterized by a signal level which is compatible with the low-voltage circuitry without additional DC isolation.

Abstract: Techniques for DC offset cancellation are described. According to one embodiment, an amplifier has at least one output and first and second supply rails. The amplifier includes offset cancellation logic which is operable in a calibration mode to generate a first offset cancellation signal when the at least one output is coupled to a first voltage corresponding to the first supply rail, and a second offset cancellation signal when the at least one output is coupled to a second voltage corresponding to the second supply rail. The offset cancellation logic is further operable to facilitate at least partial cancellation of an offset voltage associated with the at least one output during a normal operation mode using a third offset cancellation signal which substantially corresponds to an average of the first and second offset cancellation signals.

Abstract: According to the present invention, methods and apparatus are provided for improving the signal quality of received transmission. An adaptive equalizer includes multiple output delay lines. One output delay line is configured to provide gradient elements. Another output delay line is configured with coefficient multipliers calculated using the gradient elements. The coefficient multipliers are used to alter a received signal to more closely correspond to an expected signal. The adaptive equalizer can be used in systems such as optical transceivers.

Abstract: A switching circuit for generating first and second output signals for differentially driving a load is described. The switching circuit is operable to enforce a minimum pulse width on each of the first and second output signals. The second output signal substantially corresponds to an inverted version of the first output signal delayed by a delay time substantially corresponding to the minimum pulse width.

Abstract: An overvoltage protection circuit for interposing between an input voltage and a supply voltage is described. The overvoltage protection circuit includes switch circuitry connected to and passing current between an input voltage node and a supply voltage node, the input voltage node corresponding to the input voltage and the supply voltage node corresponding to the supply voltage. Switch control circuitry senses the supply voltage and regulates current flow through the switch circuitry in response thereto.

Abstract: Techniques for DC offset cancellation are described. According to one embodiment, an amplifier has at least one output and first and second supply rails. The amplifier includes offset cancellation logic which is operable in a calibration mode to generate a first offset cancellation signal when the at least one output is coupled to a first voltage corresponding to the first supply rail, and a second offset cancellation signal when the at least one output is coupled to a second voltage corresponding to the second supply rail. The offset cancellation logic is further operable to facilitate at least partial cancellation of an offset voltage associated with the at least one output during a normal operation mode using a third offset cancellation signal which substantially corresponds to an average of the first and second offset cancellation signals.

Abstract: A bandpass amplifier for use in a communication system is described. The amplifier includes a frequency selective network having a feedback path. The frequency selective network has first filtering circuitry for selectively passing the transmit band, and second filtering circuitry for selectively passing the receive band. The first filtering circuitry and the second filtering circuitry pass frequencies in the transmit band and reject frequencies in the receive band. A sampling analog-to-digital converter is coupled to the frequency selective network. A switching device is coupled to the sampling analog-to-digital converter for producing a continuous-time output signal. A feedback path is provided for continuously sensing and feeding back the continuous-time output signal to the frequency selective network.

Abstract: Apparatus and methods for enabling and disabling an amplifier is described. Amplifiers can be enabled and disabled for the sake of power and energy savings and reduction of dissipated heat. The circuit is based on a gain stage and threshold circuitry. A signal associated with an amplifier is introduced into the gain stage. The gain stage amplifies the signal level and provides the amplified signal level to threshold circuitry. The threshold circuitry references the amplified signal level and determines signal states. The control circuitry interprets these signal states to determine when to enable or disable an amplifier. The output of the threshold circuitry can be used to adjust the amplified signal level to oppose drift in the gain stage.

Abstract: A switching circuit is described which includes an output switch having a drive terminal and a power supply terminal. Driver circuitry provides a drive signal to the output switch. Isolation circuitry provides DC isolation between the driver circuitry and the output switch. Transient control circuitry controls the drive terminal, thereby keeping the output switch off during stabilization of a supply voltage at the power supply terminal.

Abstract: An integrated circuit is described having a substrate, a power transistor in a first region of the subtracted, and a plurality of barrier regions of the substrate around the first region. Each barrier region includes a barrier transistor and at least one substrate connection connecting the barrier transistor to at least one floating region of the substrate adjacent the barrier region.

Abstract: A differential amplifier includes first and second outputs and first and second supply rails. The differential amplifier further includes offset cancellation circuitry. The offset cancellation circuitry is operable during a calibration mode to generate an offset cancellation signal when the first and second outputs are both coupled to a voltage between the first supply rail and the second supply rail. The offset cancellation signal is for facilitating at least partial cancellation of an offset voltage associated with the first and second outputs during a normal operation mode of the differential amplifier.

Abstract: A switching circuit is described which includes an output switch having a drive terminal and a power supply terminal. Driver circuitry provides a drive signal to the output switch. Isolation circuitry provides DC isolation between the driver circuitry and the output switch. Transient control circuitry controls the drive terminal, thereby keeping the output switch off during stabilization of a supply voltage at the power supply terminal.

Abstract: A control circuit for controlling a level of an audio signal and transmitting the signal to an amplifier is described. The control circuit is based on an R-2R resistor network having a first plurality of resistor nodes and a parallel resistor network having a second plurality of resistor nodes. Each of the resistors in the parallel network has a value equal to one-half of the value of the preceding resistor. A plurality of switches alternately connects each of the plurality of resistor nodes to one of a plurality of low impedance nodes and a low impedance input node associated with the amplifier. Switch control circuitry selectively controls the plurality of switches to transmit the audio signal to the low impedance input node.

Abstract: A bandpass amplifier for use in a communication system is described. The amplifier includes a filter, a quantizer, a driver, and a feedback loop. The filter filters the input signal, thereby generating a filtered signal. The quantizer quantizes the filtered signal into one of two values, thereby generating a quantized signal. The driver amplifies the quantized signal, thereby generating the output signal. The feedback loop feeds the output signal to the filter. The quantizer has characteristics in which the quantized signal does not fluctuate between the two values when the input signal is substantially stable.

Abstract: Band pass amplifiers and methods for driving the same are described. According to one embodiment, a frequency selective network is provided in a feedback loop. An analog-to-digital converter is coupled to the frequency selective network. A switching stage is coupled to the analog-to-digital converter for producing a continuous-time output signal. The switching stage includes at least one resonance circuit configured to resonate at a resonance frequency and thereby generate at least a portion of the continuous-time output signal. A continuous-time feedback path continuously senses and feeds back the continuous-time output signal to the frequency selective network.

Abstract: An amplifier is described having an amplification stage in a first feedback loop. The amplification stage is operable to open the first feedback loop during operation of the amplifier. The amplifier further comprises a feed forward path bypassing the amplification stage. The feed forward path is operable to provide a second feedback loop when the first feedback loop is open.

Abstract: The field effect transistor of the present invention includes a body diffusion region having a source diffusion region therein. The field effect transistor further includes a metal source contact adjacent the body diffusion region and the source diffusion region. The metal source contact forms a Schottky type contact with the body diffusion region.

Abstract: A noise shaped differential amplifier having a reduced common mode signal in accordance with an embodiment of the invention is described. In the described embodiment, the noise shaped differential amplifier includes a noise shaper having a common mode signal controlled by an attenuation operational amplifier that is coupled to a voltage divider circuit and a sense resistor divider. In this arrangement, the attenuation operational amplifier controls a virtual ground applied to the sense resistor divider.

Abstract: A switching amplifier is described which includes an input stage having a first node associated therewith and a power stage having a second node associated therewith. An actual loop delay is defined with reference to the first and second nodes. Delay detection circuitry compares the actual loop delay to a reference loop delay. A dynamic delay line controlled by the delay detection circuitry controls the actual loop delay to correspond to the reference loop delay.