Patents Assigned to Tritech Microelectronics
  • Patent number: 6184704
    Abstract: This invention describes an improved design of CMOS. digital input circuits. This improvement reduces the switching level uncertainty range and thus increases the noise margin, compensating for manufacturing process variations. This improvement is achieved by providing resistive compensation devices in series with the P-type and the N-type CMOS transistors in the first stage of a multistage digital input circuit. These resistive devices can be implemented by means of resistors or by means of MOSFET devices which provide the required resistive function. These compensation devices modify the input-output voltage transfer characteristics of the first stage so as to reduce the switching level variation at the input to the circuit. The resulting digital input circuit has a greater tolerance to input noise levels. The improvement provided by this invention is particularly important as integrated circuits design trend is to operate with lower supply voltages.
    Type: Grant
    Filed: February 8, 1999
    Date of Patent: February 6, 2001
    Assignee: Tritech Microelectronics
    Inventors: Hongwei Wang, Yu David Hu, Chan Chee Oei
  • Patent number: 6061051
    Abstract: A method and system for issuing pen-input commands from a computer system to a controller for a touchpad to initialize the controller to the desired operating mode for the touchpad. The touchpad may emulate the function of a mouse pointing device or provide absolute coordinates of a pointed object such as human finger, a stylus, or a pen upon the touchpad.
    Type: Grant
    Filed: January 17, 1997
    Date of Patent: May 9, 2000
    Assignee: Tritech Microelectronics
    Inventors: Chow Fong Chan, Maisy Mun Lan Ng, Eng Yue Ong, Xia Geng, Swee Hock Alvin Lim
  • Patent number: 5684483
    Abstract: A digital to analog converter (DAC) is shown which converts a floating point digital signal into an analog output. This is accomplishing by using one R-2R ladder network having more nodes than there are current generators to be connected to the nodes. The current generators representing the mantissa part of the digital signal are connected to the nodes of the single ladder network in a contiguous block arrangement and in order from the LSB to the MSB of the mantissa. The position of the block of current generators is controlled by the exponent part resulting in the proper scaling of the mantissa value in the output analog signal. Thus using fewer parts that must be accurately matched to provide a consistent accuracy and resolution over a wide range of input signal.
    Type: Grant
    Filed: June 17, 1996
    Date of Patent: November 4, 1997
    Assignee: Tritech Microelectronics
    Inventor: Horia Giuroiu